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    Low power quantizer with passive summers and interpolated dynamic comparators
    2.
    发明授权
    Low power quantizer with passive summers and interpolated dynamic comparators 有权

    公开(公告)号：US09935649B1

    公开(公告)日：2018-04-03

    申请号：US15681710

    申请日：2017-08-21

    Applicant: SILICON LABORATORIES INC.

    Inventor： Axel Thomsen ,  Chao Yang ,  Xiaodong Wang

    IPC: H03M3/00 ,  H03M1/36 ,  H03K5/24 ,  H03M1/00 ,  H03M1/08

    CPC classification number: H03M3/452 ,  H03K5/24 ,  H03M1/002 ,  H03M1/0854 ,  H03M1/368

    Abstract: A quantizer including passive summers, dynamic comparators and a clock generator. Each passive summer samples the input voltages and a reference voltage scaled by one of multiple graduated gains, and subtracts the scaled reference voltage from the sum of the input voltages. The graduated gains divide a predetermined voltage range into multiple voltage subranges, each between sequential pairs of the passive summers. The dynamic comparators compare each sequential pair of passive summer output voltages according to multiple splitting ratios and provide corresponding quantization bits. The dynamic comparators are activated in groups to reduce comparator kickback. Each dynamic comparator recharges the passive summer output voltages coupled to its inputs back to their initial voltage values to reduce kickback residual. The passive summers eliminate the need for a resistor string to generate the reference voltages. Staggered activation and comparator recharging replace preamplifiers used to suppress kickback and kickback residuals.

    SUPPLY VOLTAGE CIRCUIT
    6.
    发明申请
    SUPPLY VOLTAGE CIRCUIT 审中-公开
    供电电路

    公开(公告)号：US20140354258A1

    公开(公告)日：2014-12-04

    申请号：US13905260

    申请日：2013-05-30

    Applicant: Silicon Laboratories Inc.

    Inventor： Axel Thomsen

    IPC: H02M3/156

    CPC classification number: H02M3/07 ,  G06F1/26 ,  H03K17/063 ,  H03K2217/0081

    Abstract: A method includes using a charge pump to receive a first supply voltage and generate a voltage in response thereto. The method includes using the voltage generated by the charge pump to bias a supply voltage circuit to generate a second supply voltage. The second supply voltage is greater than the first supply voltage.

    Abstract translation: 一种方法包括使用电荷泵接收第一电源电压并响应于此产生电压。 该方法包括使用由电荷泵产生的电压来偏置电源电压电路以产生第二电源电压。 第二电源电压大于第一电源电压。

    Incremental analog to digital converter with efficient residue conversion
    7.
    发明授权
    Incremental analog to digital converter with efficient residue conversion 有权

    公开(公告)号：US09866238B1

    公开(公告)日：2018-01-09

    申请号：US15499540

    申请日：2017-04-27

    Applicant: SILICON LABORATORIES INC.

    Inventor： Axel Thomsen ,  Xiaodong Wang

    IPC: H03M1/12 ,  H03M3/00

    CPC classification number: H03M3/462 ,  H03M3/422 ,  H03M3/452

    Abstract: An incremental analog to digital converter for digitizing an analog voltage including an Mth order delta sigma modulator, an Mth order digital decimation filter, a controller, and a digital combiner. The controller operates the modulator to convert the analog voltage into multiple digital samples, and operates the digital decimation filter to convert the digital samples into a preliminary digital output value. The controller further operates the delta sigma modulator during a residue phase for M clock cycles in which the modulator provides a digital residue value. The digital combiner combines the preliminary digital output value with the digital residue value to provide an initial digital output value. For an Mth order system, only M additional cycles are needed to extract the residual value to increase the resolution of the digital output by an amount based on the resolution of a modulator quantizer.

    Apparatus for gain selection with compensation for parasitic elements and associated methods
    8.
    发明授权
    Apparatus for gain selection with compensation for parasitic elements and associated methods 有权
    用于增益选择的装置，用于补偿寄生元件和相关方法

    公开(公告)号：US09515671B1

    公开(公告)日：2016-12-06

    申请号：US14732701

    申请日：2015-06-06

    Applicant: Silicon Laboratories Inc.

    Inventor： Axel Thomsen ,  Alan L. Westwick ,  Ricky Setiawan ,  Rex Wong Tak Ying

    IPC: H03M1/00 ,  H03M1/06 ,  H03K5/003 ,  H03M1/66

    CPC classification number: H03M1/0607 ,  H03K5/003 ,  H03M1/00 ,  H03M1/002 ,  H03M1/0609 ,  H03M1/66 ,  H03M1/664 ,  H03M1/682 ,  H03M1/747 ,  H03M1/808

    Abstract: Apparatus and associated methods are disclosed for gain programming or selection with parasitic element compensation. In one exemplary embodiment, an apparatus includes a first circuit that has a first programmable gain, and includes a first set of components having parasitic elements. The apparatus also includes a second circuit that has a second programmable gain, and includes a second set of components having parasitic elements. The apparatus has a gain that is a product of the first and second programmable gains. A gain error because of the parasitic elements of the first and second sets of components is canceled by setting the first programmable gain as a reciprocal of the second programmable gain.

    Abstract translation: 公开了用于利用寄生元件补偿进行增益编程或选择的装置和相关方法。 在一个示例性实施例中，装置包括具有第一可编程增益的第一电路，并且包括具有寄生元件的第一组分量。 该装置还包括具有第二可编程增益的第二电路，并且包括具有寄生元件的第二组分量。 该装置具有作为第一和第二可编程增益的乘积的增益。 通过将第一可编程增益设置为第二可编程增益的倒数来消除由于第一和第二组分组的寄生元件引起的增益误差。

    Dual-path comparator and method
    10.
    发明授权
    Dual-path comparator and method 有权
    双路比较器和方法

    公开(公告)号：US09041584B2

    公开(公告)日：2015-05-26

    申请号：US14016948

    申请日：2013-09-03

    Applicant: Silicon Laboratories Inc.

    Inventor： Xiaodong Wang ,  Shouli Yan ,  Axel Thomsen

    IPC: H03M1/12 ,  H03M1/42 ,  H03M1/38 ,  H03M1/40

    CPC classification number: H03M1/42 ,  H03M1/0692 ,  H03M1/188 ,  H03M1/38 ,  H03M1/403 ,  H03M1/466

    Abstract: A method includes receiving a differential voltage signal at first and second inputs of a comparator and selectively providing the differential voltage signal to one of a first conversion path and a second conversion path of the comparator during a conversion phase to determine a digital value corresponding to the differential voltage signal. The first and second conversion paths including first and second pluralities of gain stages, respectively. The method further includes coupling the selected one of the first conversion path and the second conversion path to an output to provide the digital value.

    Abstract translation: 一种方法包括在比较器的第一和第二输入处接收差分电压信号，并且在转换阶段期间选​​择性地将差分电压信号提供给比较器的第一转换路径和第二转换路径中的一个，以确定对应于 差分电压信号。 第一和第二转换路径分别包括第一和第二多个增益级。 该方法还包括将所选择的第一转换路径和第二转换路径中的一个耦合到输出以提供数字值。

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