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    Memory system and electronic device
    2.
    再颁专利
    Memory system and electronic device 有权

    公开(公告)号：USRE49151E1

    公开(公告)日：2022-07-26

    申请号：US16381104

    申请日：2019-04-11

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sun-Young Lim ,  Dong-Yang Lee ,  Young-Jin Cho ,  Oh-Seong Kwon

    IPC: G11C7/10 ,  G06F13/16

    Abstract: An electronic device includes a memory controller; a first memory device coupled to the memory controller; a second memory device coupled to the memory controller, the second memory device being a different type of memory from the first memory device; and a conversion circuit between the memory controller and the second memory device. The memory controller is configured to send a first command and first data to the first memory device according to a first timing scheme to access the first memory device, and send a second command and a packet to the conversion circuit according to the first timing scheme to access the second memory device. The conversion circuit is configured to receive the second command and the packet, and access the second memory device based on the second command and the packet.

    Operation method of nonvolatile memory device
    5.
    发明授权
    Operation method of nonvolatile memory device 有权

    公开(公告)号：US11527296B2

    公开(公告)日：2022-12-13

    申请号：US17232370

    申请日：2021-04-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Doo-Yeun Jung ,  Young-Jin Cho ,  Bu-Il Nam ,  Nari Lee ,  Yeji Nam ,  Sangyong Yoon

    IPC: G11C16/34 ,  G11C16/24 ,  G11C16/30 ,  G11C16/10 ,  G11C16/08 ,  G11C16/16

    Abstract: An operation method of a nonvolatile memory device which includes a memory block having wordlines includes performing an erase on the memory block, performing a block verification on the memory block by using a 0-th erase verification voltage, performing a delta verification on the memory block by using a first erase verification voltage different from the 0-th erase verification voltage when a result of the block verification indicates a pass, and outputting information about an erase result of the memory block based on the result of the block verification or a result of the delta verification. The delta verification includes generating delta counting values respectively corresponding to wordline groups by using the first erase verification voltage, generating a delta value based on the delta counting values, and comparing the delta value and a first reference value.

    Memory system and electronic device
    6.
    发明授权
    Memory system and electronic device 有权

    公开(公告)号：US09620180B2

    公开(公告)日：2017-04-11

    申请号：US14722158

    申请日：2015-05-27

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sun-Young Lim ,  Dong-Yang Lee ,  Young-Jin Cho ,  Oh-Seong Kwon

    IPC: G11C7/10

    CPC classification number: G11C7/10 ,  G06F13/1694 ,  G11C7/1063 ,  G11C7/109

    Abstract: An electronic device includes a memory controller; a first memory device coupled to the memory controller; a second memory device coupled to the memory controller, the second memory device being a different type of memory from the first memory device; and a conversion circuit between the memory controller and the second memory device. The memory controller is configured to send a first command and first data to the first memory device according to a first timing scheme to access the first memory device, and send a second command and a packet to the conversion circuit according to the first timing scheme to access the second memory device. The conversion circuit is configured to receive the second command and the packet, and access the second memory device based on the second command and the packet.

    Source Driving Integrated Circuits Including an Electrostatic Discharge Circuit and Related Layout Method
    7.
    发明申请
    Source Driving Integrated Circuits Including an Electrostatic Discharge Circuit and Related Layout Method 有权
    源驱动集成电路包括静电放电电路及相关布局方法

    公开(公告)号：US20140301001A1

    公开(公告)日：2014-10-09

    申请号：US14231921

    申请日：2014-04-01

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Young-Jin Cho ,  Hong-Yeon Kim ,  Youn-Ho Hwang

    IPC: H02H9/04 ,  H01L21/768

    CPC classification number: H01L21/76895 ,  H01L27/0255 ,  H01L27/0296 ,  H02H9/046

    Abstract: A source driving integrated circuit is provided. The source driving integrated circuit includes a source driver area, an electrostatic discharge (ESD) circuit area and a fan-out area. The source driver area includes a plurality of source driver units. The ESD circuit area includes a plurality of ESD units. The fan-out area includes conduction lines for electrically connecting respective ones of the source driver units of the source driver area to ones of the plurality of the ESD units of the ESD circuit area. In a horizontal structure of a semiconductor integrated circuit, the fan-out area at least partially overlaps the ESD circuit area.

    Abstract translation: 提供源极驱动集成电路。 源极驱动集成电路包括源极驱动器区域，静电放电（ESD）电路区域和扇出区域。 源极驱动器区域包括多个源极驱动器单元。 ESD电路区域包括多个ESD单元。 扇出区域包括用于将源极驱动器区域的源极驱动器单元中的各个源极与ESD电路区域的多个ESD单元中的一个电连接的导线。 在半导体集成电路的水平结构中，扇出区域至少部分地与ESD电路区域重叠。

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