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    HIGH ASPECT RATIO MEMS DEVICES AND METHODS FOR FORMING THE SAME
    2.
    发明申请
    HIGH ASPECT RATIO MEMS DEVICES AND METHODS FOR FORMING THE SAME 有权
    高比例MEMS器件及其形成方法

    公开(公告)号：US20130230939A1

    公开(公告)日：2013-09-05

    申请号：US13412257

    申请日：2012-03-05

    Applicant: Te-Hao LEE

    Inventor： Te-Hao LEE

    IPC: H01L21/02

    CPC classification number: B81C1/00619 ,  B81C2201/0122 ,  B81C2201/0178

    Abstract: An HF vapor etch etches high aspect ratio openings to form MEMS devices and other tightly-packed semiconductor devices with 0.2 μm air gaps between structures. The HF vapor etch etches oxide plugs and gaps with void portions and oxide liner portions and further etches oxide layers that are buried beneath silicon and other structures and is ideally suited to release cantilevers and other MEMS devices. The HF vapor etches at room temperature and atmospheric pressure in one embodiment. A process sequence is provided that forms MEMS devices including cantilevers and lateral, in-plane electrodes that are stationary and vibration resistant.

    Abstract translation: HF蒸汽蚀刻蚀刻高纵横比开口以形成MEMS器件和其他紧密堆积的半导体器件，其中在结构之间具有0.2μm的气隙。 HF蒸汽蚀刻蚀刻具有空隙部分和氧化物衬垫部分的氧化物塞和间隙，并进一步蚀刻氧化物层，其被埋在硅和其它结构之下，并且理想地适合于释放悬臂和其它MEMS器件。 在一个实施方案中，HF蒸气在室温和大气压下蚀刻。 提供了一种形成MEMS器件的工艺顺序，其包括静止和抗振动的悬臂和侧向平面内的电极。

    Method of fabricating micro-electromechanical switches on CMOS compatible substrates
    3.
    发明授权
    Method of fabricating micro-electromechanical switches on CMOS compatible substrates 有权
    在CMOS兼容基板上制造微机电开关的方法

    公开(公告)号：US06635506B2

    公开(公告)日：2003-10-21

    申请号：US10014660

    申请日：2001-11-07

    Applicant: Richard P. Volant ,  John C. Bisson ,  Donna R. Cote ,  Timothy J. Dalton ,  Robert A. Groves ,  Kevin S. Petrarca ,  Kenneth J. Stein ,  Seshadri Subbanna

    Inventor： Richard P. Volant ,  John C. Bisson ,  Donna R. Cote ,  Timothy J. Dalton ,  Robert A. Groves ,  Kevin S. Petrarca ,  Kenneth J. Stein ,  Seshadri Subbanna

    IPC: H01L2100

    CPC classification number: B81C1/00246 ,  B81B2201/016 ,  B81B2201/018 ,  B81B2203/0127 ,  B81B2207/07 ,  B81C1/00611 ,  B81C2201/0122 ,  B81C2203/0735 ,  H01G5/40 ,  H01H59/0009

    Abstract: A method of fabricating micro-electromechanical switches (MEMS) integrated with conventional semiconductor interconnect levels, using compatible processes and materials is described. The method is based upon fabricating a capacitive switch that is easily modified to produce various configurations for contact switching and any number of metal-dielectric-metal switches. The process starts with a copper damascene interconnect layer, made of metal conductors inlaid in a dielectric. All or portions of the copper interconnects are recessed to a degree sufficient to provide a capacitive air gap when the switch is in the closed state, as well as provide space for a protective layer of, e.g., Ta/TaN. The metal structures defined within the area specified for the switch act as actuator electrodes to pull down the movable beam and provide one or more paths for the switched signal to traverse. The advantage of an air gap is that air is not subject to charge storage or trapping that can cause reliability and voltage drift problems. Instead of recessing the electrodes to provide a gap, one may just add dielectric on or around the electrode. The next layer is another dielectric layer which is deposited to the desired thickness of the gap formed between the lower electrodes and the moveable beam that forms the switching device. Vias are fabricated through this dielectric to provide connections between the metal interconnect layer and the next metal layer which will also contain the switchable beam. The via layer is then patterned and etched to provide a cavity area which contains the lower activation electrodes as well as the signal paths. The cavity is then back-filled with a sacrificial release material. This release material is then planarized with the top of the dielectric, thereby providing a planar surface upon which the beam layer is constructed.

    Abstract translation: 描述了使用兼容工艺和材料制造与常规半导体互连级别集成的微机电开关（MEMS）的方法。 该方法基于制造容易修改以产生用于接触切换和任何数量的金属 - 介电金属开关的各种配置的电容开关。 该过程开始于铜镶嵌互连层，由金属导体嵌入电介质中。 铜互连的全部或部分凹陷到足以在开关处于闭合状态时提供电容气隙的程度，并为例如Ta / TaN的保护层提供空间。 在为开关指定的区域内限定的金属结构用作致动器电极以下拉可移动光束并且提供一个或多个路径用于开关信号横越。 气隙的优点是空气不会受到可能导致可靠性和电压漂移问题的电荷储存或捕集。 代替使电极凹陷以提供间隙，可以仅在电极上或周围添加电介质。 下一层是另一介质层，其被沉积到形成在下电极和形成开关器件的可移动梁之间的间隙的期望厚度上。 通过该电介质制造通孔以提供金属互连层和还包含可切换光束的下一个金属层之间的连接。 然后对通孔层进行图案化和蚀刻以提供包含下部激活电极以及信号路径的空腔区域。 然后用牺牲脱模材料填充空腔。 然后将该释放材料与电介质的顶部平坦化，由此提供构造波束层的平坦表面。

    Production method of a micromachine
    4.
    发明申请
    Production method of a micromachine 失效
    微机械的生产方法

    公开(公告)号：US20020037601A1

    公开(公告)日：2002-03-28

    申请号：US09956799

    申请日：2001-09-21

    Applicant: AISIN SEIKI KABUSHIKI KAISHA

    Inventor： Satoru Nomoto ,  Masayoshi Takeuchi ,  Shuji Noda

    IPC: H01L021/00

    CPC classification number: B81C1/00611 ,  B81C1/00365 ,  B81C2201/0122 ,  B81C2201/0164

    Abstract: A production method of a micromachine includes a polysilicon film forming step which overlays grooves, defined in an upper surface of a sacrificial layer on a silicon substrate, with polysilicon layer so as to be flat. The production method includes a first processing step for filling the grooves by adding a lower laid portion of the polysilicon layer onto a sacrificial layer. The lower laid portion has a thickness greater than 0.625 times relative to a width of the grooves. The production method of the micromachine further includes a second processing step for making the polysilicon layer to have a predetermined thickness by adding a upper laid portion of the polysilicon layer on the lower laid portion to form the polysilicon layer, the upper laid portion formed by depositing polysilicon which has the same impurity concentration as the lower laid portion does.

    Abstract translation: 微机械的制造方法包括：多晶硅膜形成工序，其覆盖限定在硅衬底上的牺牲层的上表面中的沟槽，其中多晶硅层为平坦的。 制造方法包括：通过在牺牲层上添加多晶硅层的下部放置部来填充槽的第一处理工序。 下部铺设部分的厚度相对于槽的宽度大于0.625倍。 微机械的制造方法还包括第二处理步骤，用于通过在下敷层部分上添加多晶硅层的上敷层来形成多晶硅层以形成预定厚度，以形成多晶硅层， 具有与下部敷设部分相同的杂质浓度的多晶硅。

    High aspect ratio MEMS devices and methods for forming the same
    5.
    发明授权
    High aspect ratio MEMS devices and methods for forming the same 有权
    高纵横比MEMS器件及其形成方法

    公开(公告)号：US08828772B2

    公开(公告)日：2014-09-09

    申请号：US13412257

    申请日：2012-03-05

    Applicant: Te-Hao Lee

    Inventor： Te-Hao Lee

    IPC: H01L21/316

    CPC classification number: B81C1/00619 ,  B81C2201/0122 ,  B81C2201/0178

    Abstract: An HF vapor etch etches high aspect ratio openings to form MEMS devices and other tightly-packed semiconductor devices with 0.2 um air gaps between structures. The HF vapor etch etches oxide plugs and gaps with void portions and oxide liner portions and further etches oxide layers that are buried beneath silicon and other structures and is ideally suited to release cantilevers and other MEMS devices. The HF vapor etches at room temperature and atmospheric pressure in one embodiment. A process sequence is provided that forms MEMS devices including cantilevers and lateral, in-plane electrodes that are stationary and vibration resistant.

    Abstract translation: HF蒸汽蚀刻蚀刻高纵横比开口以形成MEMS器件和其他紧密堆积的半导体器件，其中在结构之间具有0.2um的气隙。 HF蒸汽蚀刻蚀刻具有空隙部分和氧化物衬垫部分的氧化物塞和间隙，并进一步蚀刻氧化物层，其被埋在硅和其它结构之下，并且理想地适合于释放悬臂和其它MEMS器件。 在一个实施方案中，HF蒸气在室温和大气压下蚀刻。 提供了一种形成MEMS器件的工艺顺序，其包括静止和抗振动的悬臂和侧向平面内的电极。

    METHOD OF FABRICATING MICRO-ELECTROMECHANICAL SWITCHES ON CMOS COMPATIBLE SUBSTRATES
    6.
    发明申请
    METHOD OF FABRICATING MICRO-ELECTROMECHANICAL SWITCHES ON CMOS COMPATIBLE SUBSTRATES 有权
    在CMOS兼容基板上制作微电子开关的方法

    公开(公告)号：US20030148550A1

    公开(公告)日：2003-08-07

    申请号：US10014660

    申请日：2001-11-07

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

    Inventor： Richard P. Volant ,  John C. Bisson ,  Donna R. Cote ,  Timothy J. Dalton ,  Robert A. Groves ,  Kevin S. Petrarca ,  Kenneth J. Stein ,  Seshadri Subbanna

    IPC: H01L021/00

    CPC classification number: B81C1/00246 ,  B81B2201/016 ,  B81B2201/018 ,  B81B2203/0127 ,  B81B2207/07 ,  B81C1/00611 ,  B81C2201/0122 ,  B81C2203/0735 ,  H01G5/40 ,  H01H59/0009

    Abstract: A method of fabricating micro-electromechanical switches (MEMS) integrated with conventional semiconductor interconnect levels, using compatible processes and materials is described. The method is based upon fabricating a capacitive switch that is easily modified to produce various configurations for contact switching and any number of metal-dielectric-metal switches. The process starts with a copper damascene interconnect layer, made of metal conductors inlaid in a dielectric. All or portions of the copper interconnects are recessed to a degree sufficient to provide a capacitive air gap when the switch is in the closed state, as well as provide space for a protective layer of, e.g., Ta/TaN. The metal structures defined within the area specified for the switch act as actuator electrodes to pull down the movable beam and provide one or more paths for the switched signal to traverse. The advantage of an air gap is that air is not subject to charge storage or trapping that can cause reliability and voltage drift problems. Instead of recessing the electrodes to provide a gap, one may just add dielectric on or around the electrode. The next layer is another dielectric layer which is deposited to the desired thickness of the gap formed between the lower electrodes and the moveable beam that forms the switching device. Vias are fabricated through this dielectric to provide connections between the metal interconnect layer and the next metal layer which will also contain the switchable beam. The via layer is then patterned and etched to provide a cavity area which contains the lower activation electrodes as well as the signal paths. The cavity is then back-filled with a sacrificial release material. This release material is then planarized with the top of the dielectric, thereby providing a planar surface upon which the beam layer is constructed.

    Abstract translation: 描述了使用兼容工艺和材料制造与常规半导体互连级别集成的微机电开关（MEMS）的方法。 该方法基于制造容易修改以产生用于接触切换和任何数量的金属 - 介电金属开关的各种配置的电容开关。 该过程开始于铜镶嵌互连层，由金属导体嵌入电介质中。 铜互连的全部或部分凹陷到足以在开关处于闭合状态时提供电容气隙的程度，并为例如Ta / TaN的保护层提供空间。 在为开关指定的区域内限定的金属结构用作致动器电极以下拉可移动光束并且提供一个或多个路径用于开关信号横越。 气隙的优点是空气不会受到可能导致可靠性和电压漂移问题的电荷储存或捕集。 代替使电极凹陷以提供间隙，可以仅在电极上或周围添加电介质。 下一层是另一介质层，其被沉积到形成在下电极和形成开关器件的可移动梁之间的间隙的期望厚度上。 通过该电介质制造通孔以提供金属互连层和还包含可切换光束的下一个金属层之间的连接。 然后对通孔层进行图案化和蚀刻以提供包含下部激活电极以及信号路径的空腔区域。 然后用牺牲脱模材料填充空腔。 然后将该释放材料与电介质的顶部平坦化，由此提供构造波束层的平坦表面。

    Production method of a micromachine
    8.
    发明授权
    Production method of a micromachine 失效

    公开(公告)号：US06503775B2

    公开(公告)日：2003-01-07

    申请号：US09956799

    申请日：2001-09-21

    Applicant: Satoru Nomoto ,  Masayoshi Takeuchi ,  Shuji Noda

    Inventor： Satoru Nomoto ,  Masayoshi Takeuchi ,  Shuji Noda

    IPC: H01L2100

    CPC classification number: B81C1/00611 ,  B81C1/00365 ,  B81C2201/0122 ,  B81C2201/0164

    Abstract: A production method of a micromachine includes a polysilicon film forming step which overlays grooves, defined in an upper surface of a sacrificial layer on a silicon substrate, with polysilicon layer so as to be flat. The production method includes a first processing step for filling the grooves by adding a lower laid portion of the polysilicon layer onto a sacrificial layer. The lower laid portion has a thickness greater than 0.625 times relative to a width of the grooves. The production method of the micromachine further includes a second processing step for making the polysilicon layer to have a predetermined thickness by adding a upper laid portion of the polysilicon layer on the lower laid portion to form the polysilicon layer, the upper laid portion formed by depositing polysilicon which has the same impurity concentration as the lower laid portion does.

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