公开(公告)号：US4859806A

公开(公告)日：1989-08-22

申请号：US194666

申请日：1988-05-17

Applicant: Robert T. Smith

Inventor： Robert T. Smith

IPC: H01R9/28 ,  H05K1/00 ,  H05K1/02 ,  H05K3/22 ,  H05K3/40 ,  H05K3/42

CPC classification number: H05K3/222 ,  H01R12/523 ,  H05K1/0289 ,  H01R9/28 ,  H05K1/0218 ,  H05K1/0287 ,  H05K1/0292 ,  H05K2201/0715 ,  H05K2201/10287 ,  H05K2203/175 ,  Y10T29/49156

Abstract: A discretionary interconnect which includes orthogonal arrays of conductors sandwiched between conductive planes and accessible through a number of selectively arranged vias for interconnection and interruption. Also disclosed is a process of personalizing an interconnect of this type by selectively connecting and disconnecting the conductors.

Abstract translation: 一种酌情互连，其包括夹在导电平面之间的导体的正交阵列，并且可通过多个选择性布置的通孔进行互连和中断。 还公开了通过选择性地连接和断开导体来个性化这种互连的过程。

公开(公告)号：US4845335A

公开(公告)日：1989-07-04

申请号：US149449

申请日：1988-01-28

Applicant: Daniel M. Andrews ,  Philip J. Spletter ,  Richard L. Simmons

Inventor： Daniel M. Andrews ,  Philip J. Spletter ,  Richard L. Simmons

IPC: B23K1/005 ,  H01L21/00 ,  H01L21/60 ,  H01L21/68

CPC classification number: H01L21/68 ,  B23K1/0056 ,  H01L21/67138 ,  H01L24/86 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12042 ,  H01L2924/14

Abstract: A method and apparatus of bonding two electrical members together uses a pulsed YAG laser. Various apparatus and methods may be used to hold the electrical members in contact under pressure to insure uniform bonding. Automation production equipment provides for the automatic bonding of the flat electrical leads of a TAB tape to the flat electrical bumps on a plurality of integrated circuit dies.

公开(公告)号：US5659224A

公开(公告)日：1997-08-19

申请号：US484444

申请日：1995-06-07

Applicant: Nalin Kumar ,  Chenggang Xie

Inventor： Nalin Kumar ,  Chenggang Xie

IPC: H01J1/304 ,  H01J9/02 ,  H01J31/12 ,  H01J61/067 ,  H01J63/00 ,  H01J63/06 ,  H01J1/30

CPC classification number: H01J63/06 ,  H01J1/304 ,  H01J1/3042 ,  H01J31/127 ,  H01J61/0677 ,  H01J63/00 ,  H01J9/027 ,  H01J2201/304 ,  H01J2201/30426 ,  H01J2201/30457 ,  H01J2329/00 ,  H01J2329/8625 ,  Y10T428/292

Abstract: A display device for use in conjunction with a computer system includes a cathode having a layer of conductive material and a layer of low-effective work function material deposited over the conductive material wherein the low-effective work function material has an emission surface comprising a plurality of distributed localized electron emission sites. The emission sites may have electrical properties which are discontinuous from each other. The emission surface may be relatively flat.

Abstract translation: 与计算机系统一起使用的显示装置包括具有导电材料层的阴极和沉积在导电材料上的低效功函数材料层，其中低效功函数材料具有包含多个 的分布式局部电子发射位点。 发射部位可以具有彼此不连续的电特性。 发射表面可以相对平坦。

公开(公告)号：US5574814A

公开(公告)日：1996-11-12

申请号：US381168

申请日：1995-01-31

Applicant: Kenneth C. Noddings ,  Robert C. Gardner ,  Thomas J. Hirsch ,  Charles L. Spooner ,  Michael A. Olla ,  Jason J. Yu

Inventor： Kenneth C. Noddings ,  Robert C. Gardner ,  Thomas J. Hirsch ,  Charles L. Spooner ,  Michael A. Olla ,  Jason J. Yu

IPC: G02B6/42 ,  G02B6/36

CPC classification number: G02B6/4231 ,  G02B6/4249

Abstract: An assembly of an optical interconnect module adaptable for mating with an optical connector having at least one optical fiber and an alignment pin. A method of assembly includes the steps of (1) mounting an optical device onto a connector body, wherein the connector body is a portion of the optical interconnect module, and wherein the optical device is operable for transmitting or receiving optical signals to/from the optical fiber, (2) inputting a relative position between the alignment pin and an end of the optical fiber, (3) and forming a slot in the connector body by using the measured relative position between the alignment pin and the end of the optical fiber, wherein a relative position between the slot and the optical transceiver mirrors the relative position between the alignment pin and the end of the optical fiber so that the optical device and the end of the optical fiber are substantially aligned to permit transmission of the optical signals when the optical connector and the optical interconnect module are mated, wherein the slot is adaptable for receiving the alignment pin.

Abstract translation: 光学互连模块的组件，其适于与具有至少一个光纤和对准销的光学连接器配合。 一种组装方法包括以下步骤：（1）将光学装置安装到连接器主体上，其中连接器主体是光互连模块的一部分，并且其中光学装置可操作用于向/从 光纤，（2）在对准销和光纤端部之间输入相对位置，（3）并且通过使用测量的对准销与光纤端部之间的相对位置在连接器主体中形成槽 ，其中所述槽和所述光收发器之间的相对位置反映所述对准引脚和所述光纤端部之间的相对位置，使得所述光学器件和所述光纤的端部基本上对准以允许所述光信号的传输， 光学连接器和光学互连模块配合，其中槽适于接收对准销。

公开(公告)号：US5543684A

公开(公告)日：1996-08-06

申请号：US343262

申请日：1994-06-20

Applicant: Nalin Kumar ,  Chenggang Xie

Inventor： Nalin Kumar ,  Chenggang Xie

IPC: G09G3/22 ,  H01J1/304 ,  H01J1/316 ,  H01J9/02 ,  H01J29/08 ,  H01J31/12 ,  H01J61/067 ,  H01J63/06 ,  H01J1/30

CPC classification number: H01J1/316 ,  G09G3/22 ,  H01J1/304 ,  H01J1/3042 ,  H01J29/085 ,  H01J31/127 ,  H01J61/0677 ,  H01J63/06 ,  H01J9/027 ,  H01J2201/304 ,  H01J2201/30426 ,  H01J2201/30457 ,  H01J2201/319 ,  H01J2329/8625 ,  H01J2329/864 ,  Y10S977/891

Abstract: A field emission cathode is provided which includes a substrate and a conductive layer disposed adjacent the substrate. An electrically resistive pillar is disposed adjacent the conductive layer, the resistive pillar having a substantially flat surface spaced from and substantially parallel to the substrate. A layer of diamond is disposed adjacent the surface of the resistive pillar.

Abstract translation: 提供场发射阴极，其包括衬底和邻近衬底设置的导电层。 电阻柱设置在导电层附近，电阻柱具有与衬底间隔开并基本上平行于衬底的基本平坦的表面。 金刚石层邻近电阻柱的表面设置。

公开(公告)号：US5462217A

公开(公告)日：1995-10-31

申请号：US306548

申请日：1994-09-15

Applicant: Richard L. Simmons ,  Michael J. Bertram

Inventor： Richard L. Simmons ,  Michael J. Bertram

IPC: B23K20/02 ,  H01L21/603

CPC classification number: B23K20/02 ,  B23K2201/40 ,  H01L2224/16225

Abstract: A high force flip chip bonding method and system that precisely and forcefully engage a flip chip device with a corresponding wiring pattern on a substrate in a manner that prevents flip chip device and substrate shifting during force application. The method includes the steps of determining the centroid of the pattern formed by the interconnects on the flip chip device. The flip chip device is directed toward the substrate for contacting the corresponding wiring pattern with the interconnects and then the interconnects are compressed into the corresponding wiring pattern using a bonding force. The bonding force is directed along a neutral axis of deflection that is coincident with the centroid. Applying the bonding force along the neutral axis of deflection at the centroid minimizes lateral shifting of the flip chip device relative to the substrate to precisely bond the interconnects to the corresponding wiring pattern.

Abstract translation: 一种大力倒装芯片接合方法和系统，其以在应力施加期间防止倒装芯片器件和衬底移位的方式精确地强制地将倒装芯片器件与衬底上的相应布线图案接合。 该方法包括确定由倒装芯片器件上的互连形成的图案的质心的步骤。 倒装芯片器件被引导到用于使相应布线图案与互连件接触的基板，然后使用结合力将互连件压缩成相应的布线图案。 接合力沿着与质心一致的中立偏转轴线引导。 沿着中心的偏转中性轴施加接合力使倒装芯片器件相对于衬底的横向偏移最小化，以将互连精确地结合到相应的布线图案。

公开(公告)号：US5424656A

公开(公告)日：1995-06-13

申请号：US59476

申请日：1993-05-07

Applicant: David A. Gibson ,  Uttam S. Ghoshal

Inventor： David A. Gibson ,  Uttam S. Ghoshal

IPC: H03K19/0185 ,  H03K19/195

CPC classification number: H03K19/018521 ,  H03K19/195

Abstract: Apparatus for converting superconductor low level signals to semiconductor signal levels utilizing a continuous superconductor to semiconductor converter circuit biased for maximum gain and without the need for a clocked reset signal. Employing a unique biasing arrangement utilizing two capacitors and one transistor, this circuit has long term bias voltage retention and good power supply noise rejection ratio.

Abstract translation: 用于将超导体低电平信号转换为半导体信号电平的装置，其利用连续的超导体至半导体转换器电路，偏置用于最大增益并且不需要时钟复位信号。 采用两个电容器和一个晶体管的独特的偏置布置，该电路具有长期的偏置电压保持和良好的电源噪声抑制比。

公开(公告)号：US5341063A

公开(公告)日：1994-08-23

申请号：US981958

申请日：1992-11-24

Applicant: Nalin Kumar

Inventor： Nalin Kumar

IPC: H01J1/304 ,  H01J9/02 ,  H01J1/02 ,  H01J1/14

CPC classification number: H01J1/3042 ,  H01J9/025 ,  H01J2201/30403 ,  H01J2201/30457

Abstract: A field emitter comprising a conductive metal and a diamond emission tip with negative electron affinity in ohmic contact with and protruding above the metal. The field emitter is fabricated by coating a substrate with an insulating diamond film having negative electron affinity and a top surface with spikes and valleys, depositing a conductive metal on the diamond film, and applying an etch to expose the spikes without exposing the valleys, thereby forming diamond emission tips which protrude a height above the conductive metal less than the mean free path of electrons in the diamond film.

Abstract translation: 一种场致发射器，包括导电金属和具有负电子亲和力的金刚石发射尖端，与金属欧姆接触并在其上突出。 通过用具有负电子亲和性的绝缘金刚石膜和具有尖峰和谷的顶表面涂覆衬底，在金刚石膜上沉积导电金属以及施加蚀刻以暴露尖峰而不暴露谷来制造场致发射体，从而 形成金刚石发射尖端，其突出在导电金属之上的高度小于金刚石膜中电子的平均自由程。

公开(公告)号：US5334245A

公开(公告)日：1994-08-02

申请号：US539259

申请日：1990-06-18

Applicant: Mary A. Hartnett ,  Kimberly J. Sherman

Inventor： Mary A. Hartnett ,  Kimberly J. Sherman

IPC: B29C41/12 ,  B29C41/20 ,  B29C70/78 ,  B05C11/00 ,  B05C3/09 ,  B05C5/02

CPC classification number: B29C41/12 ,  B29C41/20 ,  B29C70/78 ,  B29L2031/3406

Abstract: A method and apparatus for dispensing a thin coating of a highly viscous encapsulant liquid on to the top surface of a semiconductor device having been inner lead bonded. The coating is dispensed with a controlled thickness and is substantially planar. A liquid encapsulant having optimum thermal, chemical and mechanical properties is selected for protecting the electrical device and which is suitably controlled in an automated liquid dispensed process. The process is directed to various parameters which are required for achieving the desired quality, reliability, and automatic processing capability.

Abstract translation: 一种用于将高粘度密封剂液体的薄涂层分配到已经内引线键合的半导体器件的顶表面上的方法和装置。 该涂层被省去了受控的厚度并且基本上是平面的。 选择具有最佳热，化学和机械性能的液体密封剂用于保护电气设备，并且其被适当地控制在自动化液体分配过程中。 该过程针对实现所需质量，可靠性和自动处理能力所需的各种参数。

公开(公告)号：US5309321A

公开(公告)日：1994-05-03

申请号：US949300

申请日：1992-09-22

Applicant: Michael A. Olla ,  Thomas P. Dolbear ,  Seyed H. Hashemi

Inventor： Michael A. Olla ,  Thomas P. Dolbear ,  Seyed H. Hashemi

IPC: H01L23/29 ,  H01L23/373 ,  H01L23/433 ,  H01L23/552 ,  H05K7/20

CPC classification number: H01L23/293 ,  H01L23/3733 ,  H01L23/4334 ,  H01L23/552 ,  H01L2224/32225 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3025

Abstract: An encapsulated integrated circuit package having an integrated circuit chip with a plurality of electrical leads connected thereto and at least one thermally conductive screen mesh positioned adjacent to the chip. A non-electrically conductive thermosetting or thermoplastic material forms a housing enclosing the chip and bonded to the screen mesh. Preferably one of the layers is exposed to the outside of the housing and the screen mesh is secured to a substrate supporting the chip.

Abstract translation: 一种封装的集成电路封装，其具有集成电路芯片，其中连接有多个电引线和至少一个邻近芯片定位的导热屏蔽网。 非导电的热固性或热塑性材料形成包围芯片并结合到筛网的壳体。 优选地，一个层暴露于壳体的外部，并且筛网被固定到支撑芯片的基板上。