公开(公告)号：US10236256B2

公开(公告)日：2019-03-19

申请号：US15899685

申请日：2018-02-20

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Xunyuan Zhang ,  Shao Beng Law

IPC: H01L23/528 ,  H01L21/768

Abstract: Methods of forming self-aligned cuts and structures formed with self-aligned cuts. A dielectric layer is formed on a metal hardmask layer, and a mandrel is formed on the dielectric layer. A cut is formed that extends through the dielectric layer to the metal hardmask layer. A section of a metal layer is formed on an area of the metal hardmask layer exposed by the cut in the dielectric layer. After the metal layer is formed, a spacer is formed on a vertical sidewall of the mandrel.

公开(公告)号：US20190027401A1

公开(公告)日：2019-01-24

申请号：US15653638

申请日：2017-07-19

Applicant: GLOBALFOUNDRIES INC.

Inventor： James McMahon ,  Ryan S. Smith ,  Nicholas V. LiCausi ,  Errol Todd Ryan ,  Xunyuan Zhang ,  Shao Beng Law

IPC: H01L21/768 ,  H01L23/522

Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to dielectric repair for via and skip via structures and methods of manufacture. The method includes: etching a via structure in a dielectric layer; repairing sidewalls of the via structure with a repair agent; and extending the via structure with an additional etching into a lower dielectric layer to form a skip via structure exposing a metallization layer.

公开(公告)号：US20190013240A1

公开(公告)日：2019-01-10

申请号：US15643843

申请日：2017-07-07

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Nicholas V. LiCausi ,  Xunyuan Zhang ,  Errol Todd Ryan

IPC: H01L21/768 ,  H01L21/3215 ,  H01L21/3213 ,  H01L23/532 ,  H01L23/522

Abstract: Interconnects and methods for forming interconnects. An interconnect opening is formed in a dielectric layer, and a conductive layer is formed in the interconnect opening. A modified section is formed in the conductive layer near a top surface of the conductive layer. After the modified section is formed, the modified section of the conductive layer is recessed with an etching process that at least partially removes the modified section. The modified section may have a composition that includes niobium.

公开(公告)号：US10164104B2

公开(公告)日：2018-12-25

申请号：US15343590

申请日：2016-11-04

Applicant: GLOBALFOUNDRIES INC.

Inventor： Xunyuan Zhang ,  Ruilong Xie

IPC: H01L29/78 ,  H01L29/66 ,  H01L29/51

Abstract: A device includes an air-gap (i.e., air-gap spacer) formed in situ during the selective, non-conformal deposition of a conductive material. The air-gap is disposed between source/drain contacts and a gate conductor of the device and beneath a portion of the conductive material, and is configured to decrease capacitive coupling between adjacent conductive elements. Prior to deposition of the conductive material, source/drain contact structures are recessed and a selective etch is used to remove sidewall spacers that are disposed between the source/drain contacts and the gate structures.

公开(公告)号：US20180337126A1

公开(公告)日：2018-11-22

申请号：US16049303

申请日：2018-07-30

Applicant: GLOBALFOUNDRIES INC.

Inventor： Xunyuan Zhang ,  Moosung M. Chae

IPC: H01L23/528 ,  H01L29/66 ,  H01L29/45 ,  H01L29/417 ,  H01L21/768 ,  H01L27/088 ,  H01L23/485 ,  H01L21/8234 ,  H01L29/40

Abstract: Embodiments of the present disclosure may provide a method of forming an integrated circuit (IC) structure, the method including: forming a doped metal layer within a contact opening in an inter-level dielectric (ILD) material on a conductive region, such that the doped metal layer overlies the conductive region, the doped metal layer including a first metal doped with a second metal; and forming a contact to the conductive region within the contact opening of the ILD material by annealing the doped metal layer such that the second metal diffuses into the ILD material to form an interface liner directly between the annealed doped metal layer and the ILD material, the interface liner formed only on sidewalls of the contact opening and in direct contact with the ILD material and only at an interface of the doped metal layer and the ILD material.

公开(公告)号：US10109490B1

公开(公告)日：2018-10-23

申请号：US15627879

申请日：2017-06-20

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Sean X. Lin ,  Xunyuan Zhang

IPC: H01L21/768 ,  H01L21/28 ,  H01L29/66 ,  C23C16/06 ,  C22B23/00 ,  C01G51/00

Abstract: Methods for forming interconnects that include cobalt. An interconnect opening is formed in a dielectric layer that penetrates from a top surface of the dielectric layer into the dielectric layer. A first cobalt layer is formed at a bottom of the interconnect opening and partially fills the interconnect opening. A second cobalt layer is selectively deposited on the first cobalt layer and grows upwardly from the first cobalt layer at the bottom of the interconnect opening.

公开(公告)号：US20180301413A1

公开(公告)日：2018-10-18

申请号：US15899685

申请日：2018-02-20

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Xunyuan Zhang ,  Shao Beng Law

IPC: H01L23/528 ,  H01L21/768

CPC classification number: H01L23/5283 ,  H01L21/76804 ,  H01L21/7685 ,  H01L21/76883

Abstract: Methods of forming self-aligned cuts and structures formed with self-aligned cuts. A dielectric layer is formed on a metal hardmask layer, and a mandrel is formed on the dielectric layer. A cut is formed that extends through the dielectric layer to the metal hardmask layer. A section of a metal layer is formed on an area of the metal hardmask layer exposed by the cut in the dielectric layer. After the metal layer is formed, a spacer is formed on a vertical sidewall of the mandrel.

公开(公告)号：US20180144979A1

公开(公告)日：2018-05-24

申请号：US15359037

申请日：2016-11-22

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Shao Beng Law ,  Genevieve Beique ,  Frank W. Mont ,  Lei Sun ,  Xunyuan Zhang

IPC: H01L21/768 ,  H01L21/3065 ,  H01L21/308

CPC classification number: H01L21/76877 ,  H01L21/3065 ,  H01L21/3081 ,  H01L21/76802

Abstract: Methods of lithographic patterning. A metal hardmask layer is formed on a dielectric layer and a patterned layer is formed on the metal hardmask layer. A metal layer is formed on an area of the metal hardmask layer exposed by an opening in the patterned layer. After the metal layer is formed, the patterned layer is removed from the metal hardmask layer. After the patterned layer is removed, the metal hardmask layer is patterned with the metal layer masking the metal hardmask layer over the area.

公开(公告)号：US09853110B2

公开(公告)日：2017-12-26

申请号：US14927765

申请日：2015-10-30

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Xunyuan Zhang ,  Ruilong Xie ,  Sean X. Lin

IPC: H01L29/417 ,  H01L29/40 ,  H01L21/288 ,  H01L29/66 ,  H01L29/49 ,  H01L29/423 ,  H01L29/78 ,  H01L29/45

CPC classification number: H01L29/41791 ,  H01L21/288 ,  H01L29/401 ,  H01L29/41766 ,  H01L29/42372 ,  H01L29/456 ,  H01L29/495 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851

Abstract: One illustrative method disclosed includes, among other things, forming a gate contact opening in a layer of insulating material, performing at least one etching process through the gate contact opening to remove a gate cap layer and to expose the gate structure, selectively growing a metal material that is conductively coupled to an upper surface of the gate structure such that the grown metal material contacts all of the sidewalls of the gate contact opening and an air space is formed between a bottom of the grown metal material and a conductive source/drain structure, and forming one or more conductive materials in the gate contact opening above the grown metal material.

公开(公告)号：US09831124B1

公开(公告)日：2017-11-28

申请号：US15338070

申请日：2016-10-28

Applicant: GLOBALFOUNDRIES INC.

Inventor： Xunyuan Zhang ,  Frank W. Mont

IPC: H01L21/67 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/76886 ,  H01L21/768 ,  H01L21/76802 ,  H01L21/76849 ,  H01L21/76877 ,  H01L23/5226 ,  H01L23/53209 ,  H01L23/53228 ,  H01L23/53295

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to interconnect structures and methods of manufacture. The structure includes: a cobalt metallization structure with a modified surface of etch chemistries; a layer of material on the modified surface; and an interconnect structure in direct contact with the material.