公开(公告)号：US20160078912A1

公开(公告)日：2016-03-17

申请号：US14947978

申请日：2015-11-20

Applicant: Micron Technology, Inc.

Inventor： Jun Liu ,  Steve Kramer ,  Gurtej Sandhu

IPC: G11C11/16

CPC classification number: G11C11/161 ,  G11C11/16 ,  G11C11/1675 ,  H01L27/228 ,  H01L43/08

Abstract: A magnetic memory cell including a piezoelectric material, and methods of operating the memory cell are provided. The memory cell includes a stack, and the piezoelectric material may be formed as a layer in the stack or adjacent the layers of the cell stack. The piezoelectric material may be used to induce a transient stress during programming of the memory cell to reduce the critical switching current of the memory cell.

公开(公告)号：US09224742B2

公开(公告)日：2015-12-29

申请号：US14633189

申请日：2015-02-27

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Gurtej Sandhu ,  Scott Sills

IPC: H01L27/108 ,  H01L21/3213 ,  H01L21/768 ,  H01L23/528 ,  H01L21/308 ,  H01L21/28 ,  H01L21/285 ,  H01L21/8238

CPC classification number: H01L27/10885 ,  H01L21/28008 ,  H01L21/28035 ,  H01L21/28518 ,  H01L21/3081 ,  H01L21/32139 ,  H01L21/76877 ,  H01L21/76895 ,  H01L21/823871 ,  H01L23/528 ,  H01L23/5283 ,  H01L27/10888 ,  H01L27/10891 ,  H01L2224/06138 ,  H01L2924/12044

Abstract: An integrated circuit and a method of formation provide a contact area formed at an angled end of at least one linearly extending conductive line. In an embodiment, conductive lines with contact landing pads are formed by patterning lines in a mask material, cutting at least one of the material lines to form an angle relative to the extending direction of the material lines, forming extensions from the angled end faces of the mask material, and patterning an underlying conductor by etching using said material lines and extension as a mask. In another embodiment, at least one conductive line is cut at an angle relative to the extending direction of the conductive line to produce an angled end face, and an electrical contact landing pad is formed in contact with the angled end face.

公开(公告)号：US09209904B2

公开(公告)日：2015-12-08

申请号：US14534635

申请日：2014-11-06

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Roy Meade ,  Gurtej Sandhu

IPC: H04B10/516 ,  G02B6/12 ,  G02B6/122 ,  G02F1/035 ,  G02F1/225 ,  G02B6/293

CPC classification number: H04B10/516 ,  G02B6/12007 ,  G02B6/122 ,  G02B6/29343 ,  G02F1/035 ,  G02F1/2252

Abstract: A method of operating an optical waveguide for transmitting an optical signal input to the optical waveguide with a first frequency. The optical waveguide includes a plurality of modulator circuits configured along an optical transmission channel. Each modulator circuit includes at least one resonant structure that resonates at the first frequency when the modulator circuit that includes the at least one resonant structure is at a resonant temperature. Each modulator circuit has a different resonant temperature.

Abstract translation: 一种操作光波导的方法，用于以第一频率将输入到光波导的光信号传输。 光波导包括沿着光传输通道配置的多个调制器电路。 每个调制器电路包括当包括至少一个谐振结构的调制器电路处于共振温度时以第一频率谐振的至少一个谐振结构。 每个调制器电路具有不同的谐振温度。

公开(公告)号：US09034724B2

公开(公告)日：2015-05-19

申请号：US14446744

申请日：2014-07-30

Applicant: Micron Technology, Inc.

Inventor： Roy Meade ,  Gurtej Sandhu

IPC: H01L21/76 ,  H01L29/00 ,  H01L21/762 ,  G02B6/136 ,  H01L27/146 ,  H01L29/06 ,  G02B6/12

CPC classification number: H01L21/76229 ,  G02B6/1225 ,  G02B6/13 ,  G02B6/136 ,  G02B2006/121 ,  H01L21/3086 ,  H01L21/76232 ,  H01L21/76283 ,  H01L27/092 ,  H01L27/14689 ,  H01L29/0649

Abstract: A method of forming a substrate with isolation areas suitable for integration of electronic and photonic devices is provided. A common reticle and photolithographic technique is used to fabricate a mask defining openings for etching first and second trench isolation areas in a substrate, with the openings for the second trench isolation areas being wider than the openings for the first trench isolation areas. The first and second trench isolation areas are etched in the substrate through the mask. The second trench isolation areas are further etched to the deeper than the first trench isolation areas. The trench isolation areas are filled with oxide material. Electrical devices can be formed on the substrate and electrically isolated by the first trench isolation areas and photonic devices can be formed over the second trench isolation areas and be optically isolated from the substrate.

Abstract translation: 提供了一种形成具有适用于电子和光子器件集成的隔离区的衬底的方法。 常用的掩模版和光刻技术用于制造掩模，其限定用于蚀刻衬底中的第一和第二沟槽隔离区的开口，其中用于第二沟槽隔离区的开口比第一沟槽隔离区的开口宽。 通过掩模在衬底中蚀刻第一和第二沟槽隔离区域。 第二沟槽隔离区域被进一步蚀刻到比第一沟槽隔离区域更深的位置。 沟槽隔离区填充氧化物材料。 电子器件可以形成在衬底上并由第一沟槽隔离区域电隔离，并且光子器件可以形成在第二沟槽隔离区域上并且与衬底光学隔离。

公开(公告)号：US20150108658A1

公开(公告)日：2015-04-23

申请号：US14586412

申请日：2014-12-30

Applicant: Micron Technology, Inc.

Inventor： Gurtej Sandhu

IPC: H01L23/522

CPC classification number: H01L23/5226 ,  H01L21/0337 ,  H01L21/31144 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for creating structures in a semiconductor assembly is provided. The method includes etching apertures into a dielectric layer and applying a polymer layer over the dielectric layer. The polymer layer is applied uniformly and fills the apertures at different rates depending on the geometry of the apertures, or on the presence or absence of growth accelerating material. The polymer creates spacers for the etching of additional structure in between the spacers. The method is capable of achieving structures smaller than current lithography techniques.

Abstract translation: 提供了一种用于在半导体组件中产生结构的方法。 该方法包括将孔蚀刻到电介质层中，并在该介电层上施加聚合物层。 均匀地施加聚合物层，并根据孔的几何形状，或者存在或不存在生长促进材料，以不同的速率填充孔。 该聚合物产生用于蚀刻间隔物之间​​的附加结构的间隔物。 该方法能够实现比当前光刻技术更小的结构。

公开(公告)号：US09005458B2

公开(公告)日：2015-04-14

申请号：US13776836

申请日：2013-02-26

Applicant: Micron Technology, Inc.

Inventor： Gurtej Sandhu ,  Roy Meade

IPC: B29D11/00 ,  H01L21/308 ,  G02B6/136 ,  G02B6/12

CPC classification number: G02B6/1225 ,  G02B6/12004 ,  G02B6/136 ,  G02B2006/12097 ,  H01L21/308

Abstract: Disclosed method and apparatus embodiments provide a photonic device with optical isolation from a supporting substrate. A generally rectangular cavity in cross section is provided below an element of the photonic device and the element may be formed from a ledge of the supporting substrate which is over the cavity.

Abstract translation: 公开的方法和设备实施例提供了一种具有与支撑衬底的光学隔离的光子器件。 在光子器件的元件的下方提供横截面的大致矩形的空腔，并且元件可以由在空腔上的支撑衬底的凸缘形成。

公开(公告)号：US08895232B2

公开(公告)日：2014-11-25

申请号：US13941155

申请日：2013-07-12

Applicant: Micron Technology, Inc.

Inventor： Mirzafer K. Abatchev ,  Gurtej Sandhu

IPC: G03F7/26 ,  H01L21/308 ,  H01L21/3213 ,  H01L21/033 ,  H01L21/311

CPC classification number: H01L21/308 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/32139

Abstract: The dimensions of mask patterns, such as pitch-multiplied spacers, are controlled by controlled growth of features in the patterns after they are formed. A pattern of mandrels is formed overlying a semiconductor substrate. Spacers are then formed on sidewalls of the mandrels by depositing a blanket layer of material over the mandrels and preferentially removing spacer material from horizontal surfaces. The mandrels are selectively removed, leaving behind a pattern of freestanding spacers. The spacers comprise a material, such as polysilicon and amorphous silicon, known to increase in size upon being oxidized. The spacers are oxidized and grown to a desired width. The spacers can then be used as a mask to pattern underlying layers and the substrate. Advantageously, because the spacers are grown by oxidation, thinner blanket layers can be deposited over the mandrels, allowing the deposition of more conformal blanket layers and widening the process window for spacer formation.

Abstract translation: 掩模图案的尺寸，例如间距倍数的间隔物，通过形成图案之后的特征的受控生长来控制。 在半导体衬底上形成心轴图案。 然后通过在心轴上沉积覆盖层材料并优先从水平表面去除间隔物材料，将垫片形成在心轴的侧壁上。 选择性地去除心轴，留下独立间隔物的图案。 间隔物包括已知在氧化时尺寸增加的材料，例如多晶硅和非晶硅。 间隔物被氧化并生长至期望的宽度。 然后可以将间隔物用作掩模以对下面的层和基底进行图案化。 有利的是，由于间隔物通过氧化生长，较薄的橡皮布层可以沉积在心轴上，允许沉积更多共形的覆盖层并加宽用于间隔物形成的工艺窗口。

公开(公告)号：US08885398B2

公开(公告)日：2014-11-11

申请号：US13911917

申请日：2013-06-06

Applicant: Micron Technology, Inc.

Inventor： Jun Liu ,  Gurtej Sandhu

IPC: G11C11/00 ,  G11C11/16 ,  B82Y25/00 ,  G01R33/09 ,  G01R33/12 ,  H01F10/32 ,  B82Y10/00

CPC classification number: G11C11/1675 ,  B82Y10/00 ,  B82Y25/00 ,  G01R33/093 ,  G01R33/1284 ,  G11C11/16 ,  H01F10/3218 ,  Y10S977/934

Abstract: Spin current generators and systems and methods for employing spin current generators. A spin current generator may be configured to generate a spin current polarized in one direction, or a spin current selectively polarized in two directions. The spin current generator may by employed in spintronics applications, wherein a spin current is desired.

Abstract translation: 自旋电流发生器和采用自旋电流发生器的系统和方法。 自旋电流发生器可以被配置为产生在一个方向上偏振的自旋电流，或者在两个方向上选择性地偏振的自旋电流。 自旋电流发生器可用于自旋电子学应用中，其中期望自旋电流。

公开(公告)号：US08865598B2

公开(公告)日：2014-10-21

申请号：US14094473

申请日：2013-12-02

Applicant: Micron Technology, Inc.

Inventor： Sanket Sant ,  Gurtej Sandhu ,  Neal R. Rueger

IPC: H01L21/302 ,  H01L27/105 ,  H01L21/308 ,  H01L21/033

CPC classification number: H01L21/3088 ,  H01L21/0337 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/76802 ,  H01L27/1052

Abstract: Multiple pitch-multiplied spacers are used to form mask patterns having features with exceptionally small critical dimensions. One of each pair of spacers formed mandrels is removed and alternating layers, formed of two mutually selectively etchable materials, are deposited around the remaining spacers. Layers formed of one of the materials are then etched, leaving behind vertically-extending layers formed of the other of the materials, which form a mask pattern. Alternatively, instead of depositing alternating layers, amorphous carbon is deposited around the remaining spacers followed by a plurality of cycles of forming pairs of spacers on the amorphous carbon, removing one of the pairs of spacers and depositing an amorphous carbon layer. The cycles can be repeated to form the desired pattern. Because the critical dimensions of some features in the pattern can be set by controlling the width of the spaces between spacers, exceptionally small mask features can be formed.

Abstract translation: 使用多个间距倍数的间隔物来形成具有特别小的临界尺寸的特征的掩模图案。 去除每对间隔件形成的心轴中的一个，并且由两个相互选择性可蚀刻的材料形成的交替层围绕剩余的间隔物沉积。 然后蚀刻由一种材料形成的层，留下由形成掩模图案的另一种材料形成的垂直延伸层。 或者，代替沉积交替层，无定形碳沉积在剩余的间隔物周围，随后在无定形碳上形成一对间隔物的多个循环，去除一对隔离物中的一个并沉积无定形碳层。 可以重复循环以形成所需的图案。 由于图案中的某些特征的临界尺寸可以通过控制间隔物之间​​的间隔的宽度来设定，所以可以形成特别小的掩模特征。

公开(公告)号：US20140264675A1

公开(公告)日：2014-09-18

申请号：US14290477

申请日：2014-05-29

Applicant: Micron Technology, Inc.

Inventor： Jun Liu ,  Gurtej Sandhu

IPC: H01L43/08

CPC classification number: H01L43/08 ,  B82Y25/00 ,  B82Y40/00 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  H01F10/3254 ,  H01F10/3268 ,  H01F10/329 ,  H01F41/306 ,  H01F41/307 ,  H01L27/228 ,  Y10S977/70

Abstract: A magnetic cell structure including a nonmagnetic filament contact, and methods of fabricating the structure are provided. The magnetic cell structure includes a free layer, a pinned layer, an insulative layer between the free and pinned layers, and a nonmagnetic filament contact in the insulative layer which electrically connects the free and pinned layers. The nonmagnetic filament contact is formed from a nonmagnetic source layer, also between the free and pinned layers. The filament contact directs a programming current through the magnetic cell structure such that the cross sectional area of the programming current in the free layer is less than the cross section of the structure. The decrease in the cross sectional area of the programming current in the free layer enables a lower programming current to reach a critical switching current density in the free layer and switch the magnetization of the free layer, programming the magnetic cell.

Abstract translation: 提供包括非磁性细丝接触的磁性单元结构以及制造该结构的方法。 磁性单元结构包括自由层，钉扎层，自由层和被钉扎层之间的绝缘层，以及绝缘层中的非磁性细丝接触，其电连接自由层和被钉扎层。 非磁性细丝接触由非磁性源层形成，也在自由层和被钉扎层之间。 灯丝接触引导编程电流通过磁性电池结构，使得自由层中编程电流的横截面面积小于结构的横截面。 自由层中编程电流的横截面积的减小使编程电流能够达到自由层中的关键开关电流密度并切换自由层的磁化，对磁性单元进行编程。