公开(公告)号：US07531420B2

公开(公告)日：2009-05-12

申请号：US11493252

申请日：2006-07-26

申请人： Thomas Nirschl ,  Alexander Olbrich ,  Martin Ostermayr

发明人： Thomas Nirschl ,  Alexander Olbrich ,  Martin Ostermayr

IPC分类号： H01L21/20 ,  H01L21/8242

CPC分类号： H01L27/10888 ,  H01L27/108 ,  H01L27/1085 ,  H01L27/10855 ,  H01L27/10885 ,  H01L28/90

摘要： A semiconductor memory cell and production method provides a storage capacitor connected to a selection transistor. The storage capacitor is formed as a contact hole capacitor in at least one contact hole for a source or drain region. Such a semiconductor memory cell can be produced cost-effectively and allows a high integration density.

摘要翻译： 半导体存储单元和制造方法提供连接到选择晶体管的存储电容器。 存储电容器在至少一个用于源极或漏极区域的接触孔中形成为接触孔电容器。 可以成本有效地制造这种半导体存储单元并且允许高的集成密度。

公开(公告)号：US20090097301A1

公开(公告)日：2009-04-16

申请号：US11915816

申请日：2006-05-18

申请人： Eiji Takahashi ,  Yoshiyuki Saito

发明人： Eiji Takahashi ,  Yoshiyuki Saito

IPC分类号： G11C11/24 ,  G11C7/00

CPC分类号： H01L27/101 ,  G11C11/404 ,  G11C11/4074 ,  G11C11/4076 ,  H01L27/1085 ,  H01L27/10882

摘要： An object is to provide a semiconductor memory device which can dynamically change the number of memory cells used as by-pass capacitors. In each memory block, one selector signal line is provided in parallel to one word line. In a pair of the word line and the selector signal line adjacent to each other, states are maintained opposite to each other. Further, in a memory block, one branch of a supply line is provided in parallel to one bit line. In each of the memory cells, a first transistor connects a capacitor to the bit line in accordance with the state of the word line. Furthermore, a second transistor connects the same capacitor to the branch of the supply line in accordance with the state of the selector signal line. In the memory cells aligned in a row direction, gates of the first transistors are connected to the same word line, and gates of the second transistors are connected to the same selector signal line.

摘要翻译： 本发明的目的是提供一种半导体存储器件，其可以动态地改变用作旁路电容器的存储单元的数量。 在每个存储块中，一条选择器信号线与一条字线平行地提供。 在彼此相邻的一对字线和选择器信号线中，状态保持彼此相对。 此外，在存储块中，供给线的一个分支与一个位线并行设置。 在每个存储单元中，第一晶体管根据字线的状态将电容器连接到位线。 此外，第二晶体管根据选择器信号线的状态将相同的电容器连接到电源线的分支。 在沿行方向排列的存储单元中，第一晶体管的栅极连接到相同的字线，第二晶体管的栅极连接到相同的选择信号线。

公开(公告)号：US20080227263A1

公开(公告)日：2008-09-18

申请号：US12073608

申请日：2008-03-07

申请人： Shibata Yoshiyuki

发明人： Shibata Yoshiyuki

IPC分类号： H01L21/20

CPC分类号： H01L27/1085 ,  H01L28/90

摘要： A semiconductor device of the present invention includes a plurality of lower electrodes covering the entire surfaces of a plurality of trenches formed in a first interlayer insulating film, a capacitive insulating film covering the entire surfaces of the plurality of lower electrodes, and an upper electrode covering the surfaces of the plurality of lower electrodes from above with the capacitive insulating film interposed between the upper electrode and the plurality of lower electrodes. The upper electrode is formed with a stress-relieving part, such as a crack, a notch or a recess.

公开(公告)号：US20080182427A1

公开(公告)日：2008-07-31

申请号：US11698337

申请日：2007-01-26

申请人： Lars Oberbeck ,  Uwe Schroeder ,  Johannes Heitmann ,  Stephan Kudelka ,  Tim Boescke ,  Jonas Sundqvist

发明人： Lars Oberbeck ,  Uwe Schroeder ,  Johannes Heitmann ,  Stephan Kudelka ,  Tim Boescke ,  Jonas Sundqvist

IPC分类号： H01L29/78 ,  H01L21/31 ,  H01L29/92

CPC分类号： H01L21/02337 ,  H01L21/02175 ,  H01L21/28194 ,  H01L21/3142 ,  H01L21/31641 ,  H01L27/10805 ,  H01L27/1085 ,  H01L28/40 ,  H01L29/513 ,  H01L29/517

摘要： The present invention relates to a method for depositing a dielectric material comprising a transition metal oxide. In an initial step, a substrate is provided. In a further step, a first precursor comprising a transition metal containing compound, and a second precursor predominantly comprising at least one of water vapor, ozone, oxygen, or oxygen plasma are sequentially applied for depositing above the substrate a layer of a transition metal containing material. In another step, a third precursor comprising a dopant containing compound, and a fourth precursor predominantly comprising at least one of water vapor, ozone, oxygen, or oxygen plasma are sequentially applied for depositing above the substrate a layer of a dopant containing material. The transition metal comprises at least one of zirconium and hafnium. The dopant comprises at least one of barium, strontium, calcium, niobium, bismuth, magnesium, and cerium.

摘要翻译： 本发明涉及沉积包含过渡金属氧化物的电介质材料的方法。 在初始步骤中，提供衬底。 在另一步骤中，依次施加包含含过渡金属的化合物的第一前体和主要包含水蒸气，臭氧，氧或氧等离子体中的至少一种的第二前体，以在基底上沉积含有过渡金属的层 材料。 在另一步骤中，顺序地施加包含掺杂剂的化合物的第三前体和主要包含水蒸汽，臭氧，氧或氧等离子体中的至少一种的第四前体，以在衬底上沉积含掺杂剂材料的层。 过渡金属包括锆和铪中的至少一种。 掺杂剂包括钡，锶，钙，铌，铋，镁和铈中的至少一种。

公开(公告)号：US20080160735A1

公开(公告)日：2008-07-03

申请号：US11617359

申请日：2006-12-28

申请人： Hocine Boubekeur

发明人： Hocine Boubekeur

IPC分类号： H01L21/3205

CPC分类号： H01L21/3003 ,  H01L27/1085 ,  H01L28/60 ,  H01L29/94

摘要： Polysilicon regions are formed by performing a thermal treatment in a hydrogen ambient environment after patterning a polysilicon structure.

摘要翻译： 通过在图案化多晶硅结构之后在氢环境环境中进行热处理来形成多晶硅区域。

公开(公告)号：US07374993B2

公开(公告)日：2008-05-20

申请号：US10695959

申请日：2003-10-27

申请人： Matthew W. Miller ,  Cem Basceri

发明人： Matthew W. Miller ,  Cem Basceri

IPC分类号： H01L21/8242

CPC分类号： H01L27/1085 ,  H01L21/31155 ,  H01L21/31625 ,  H01L28/60

摘要： A method of forming a capacitor includes forming a first capacitor electrode over a semiconductor substrate. A capacitor dielectric region is formed onto the first capacitor electrode. The capacitor dielectric region has an exposed oxide containing surface. The exposed oxide containing surface of the capacitor dielectric region is treated with at least one of a borane or a silane. A second capacitor electrode is deposited over the treated oxide containing surface. The second capacitor electrode has an inner metal surface contacting against the treated oxide containing surface. Other aspects and implementations are contemplated.

公开(公告)号：US07355232B2

公开(公告)日：2008-04-08

申请号：US11218578

申请日：2005-09-06

申请人： Er-Xuan Ping ,  Shenlin Chen

发明人： Er-Xuan Ping ,  Shenlin Chen

IPC分类号： H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119

CPC分类号： H01L27/10852 ,  H01L27/10811 ,  H01L27/10817 ,  H01L27/1085 ,  H01L27/10885 ,  H01L28/84 ,  H01L28/91

摘要： A dual-sided HSG capacitor and a method of fabrication are disclosed. A thin native oxide layer is formed between a doped polycrystalline layer and a layer of hemispherical grained polysilicon (HSG) as part of a dual-sided lower capacitor electrode. Prior to the dielectric formation, the lower capacitor electrode may be optionally annealed to improve capacitance.

摘要翻译： 公开了双面HSG电容器和制造方法。 作为双面下电容器电极的一部分，在掺杂多晶层和半球状多晶硅层（HSG）之间形成薄的自然氧化物层。 在电介质形成之前，下部电容器电极可以任选退火以改善电容。

公开(公告)号：US20080038888A1

公开(公告)日：2008-02-14

申请号：US11862640

申请日：2007-09-27

申请人： Ralf Brederlow ,  Jessica Hartwich ,  Christian Pacha ,  Wolfgang Rosner ,  Thomas Schulz

发明人： Ralf Brederlow ,  Jessica Hartwich ,  Christian Pacha ,  Wolfgang Rosner ,  Thomas Schulz

IPC分类号： H01L21/8242

CPC分类号： H01L29/785 ,  H01L21/845 ,  H01L27/0629 ,  H01L27/108 ,  H01L27/10805 ,  H01L27/10823 ,  H01L27/10826 ,  H01L27/1085 ,  H01L27/10873 ,  H01L27/10876 ,  H01L27/10879 ,  H01L27/1211 ,  H01L27/13 ,  H01L28/60 ,  H01L29/66795

摘要： An integrated circuit arrangement contains an insulating region, which is part of a planar insulating layer, and a capacitor which contains: near and far electrode regions near and remote from the insulating region and a dielectric region. The capacitor and an active component are on the same side of the insulating layer, and the near electrode region and an active region of the component are planar and parallel to the insulating layer. The near electrode region is monocrystalline and contains multiple webs. Alternately, a FET is present in which: a channel region is the active region, the FET contains a web with opposing control electrodes connected by a connecting region that is isolated from the channel region by a thick insulating region. The thick insulating region is thicker than control electrode insulation regions. The control electrodes contain the same material as the far electrode region.

摘要翻译： 集成电路装置包括作为平面绝缘层的一部分的绝缘区域和包含：靠近和远离绝缘区域的近远电极区域和电介质区域的电容器。 电容器和有源部件位于绝缘层的同一侧，并且组件的近电极区域和有源区域是平面的并且平行于绝缘层。 近电极区域是单晶体并且包含多个网状物。 或者，存在FET，其中沟道区域是有源区域，FET包含具有相对的控制电极的幅材，该栅极通过由沟道区域与厚绝缘区域隔离的连接区域连接。 厚的绝缘区域比控制电极绝缘区域厚。 控制电极含有与远电极区域相同的材料。

公开(公告)号：US20070294871A1

公开(公告)日：2007-12-27

申请号：US11851969

申请日：2007-09-07

申请人： Petra Felsner ,  Thomas Schafbauer ,  Uwe Kerst ,  Hans-Joachim Barth ,  Erdem Kaltalioglu

发明人： Petra Felsner ,  Thomas Schafbauer ,  Uwe Kerst ,  Hans-Joachim Barth ,  Erdem Kaltalioglu

IPC分类号： H01G9/004

CPC分类号： H01G4/228 ,  H01G4/33 ,  H01L21/76838 ,  H01L27/0233 ,  H01L27/1085 ,  Y10T29/417

摘要： In a method of fabricating a semiconductor device, a level of metal is formed within an interval dielectric. The level of metal includes a first metal line separated from a second metal line by a region of the interlevel dielectric. The region of interlevel dielectric is removed between the first metal line and the second metal line. A high-k dielectric is formed between the first metal line and the second metal line in the region where the interlevel dielectric was removed such that a capacitor is formed by the first metal line, the second metal line and the high-k dielectric.

摘要翻译： 在制造半导体器件的方法中，在间隔电介质内形成金属层。 金属层包括通过层间电介质的区域与第二金属线分离的第一金属线。 在第一金属线和第二金属线之间去除层间电介质的区域。 在去除了层间电介质的区域中的第一金属线和第二金属线之间形成高k电介质，使得由第一金属线，第二金属线和高k电介质形成电容器。

公开(公告)号：US20070254417A1

公开(公告)日：2007-11-01

申请号：US11777294

申请日：2007-07-13

申请人： Jung-Ching Chen ,  Chin-Hung Liu ,  Chien-Ming Lin ,  Ming-Tsung Tung

发明人： Jung-Ching Chen ,  Chin-Hung Liu ,  Chien-Ming Lin ,  Ming-Tsung Tung

IPC分类号： H01L21/8242 ,  H01L21/20

CPC分类号： H01L28/40 ,  H01L27/1085

摘要： A semiconductor device having a capacitor is provided. The semiconductor device includes a substrate, a capacitor and a metal-oxide-semiconductor (MOS) transistor. The MOS transistor is located in a MOS transistor region of the substrate, and the MOS transistor region has a first bottom diffusion region. The capacitor is located in a capacitor region of the substrate and consisted of a second bottom diffusion region located in the substrate, a first dielectric layer located over the second bottom diffusion region, a bottom conductive layer located over the first dielectric layer, a second dielectric layer located over the bottom conductive layer, and a top conductive layer located over the second dielectric layer. The first bottom diffusion region and the second bottom diffusion region are different conductive type.

摘要翻译： 提供具有电容器的半导体器件。 半导体器件包括衬底，电容器和金属氧化物半导体（MOS）晶体管。 MOS晶体管位于衬底的MOS晶体管区域中，并且MOS晶体管区域具有第一底部扩散区域。 电容器位于衬底的电容器区域中，由位于衬底中的第二底部扩散区域，位于第二底部扩散区域上方的第一电介质层，位于第一电介质层上方的底部导电层，第二电介质层 位于所述底部导电层上方的层，以及位于所述第二介电层上方的顶部导电层。 第一底部扩散区域和第二底部扩散区域是不同的导电类型。