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    Deposition method for transition-metal oxide based dielectric
    1.
    发明申请
    Deposition method for transition-metal oxide based dielectric 审中-公开
    基于过渡金属氧化物的电介质的沉积方法

    公开(公告)号：US20080182427A1

    公开(公告)日：2008-07-31

    申请号：US11698337

    申请日：2007-01-26

    申请人： Lars Oberbeck ,  Uwe Schroeder ,  Johannes Heitmann ,  Stephan Kudelka ,  Tim Boescke ,  Jonas Sundqvist

    发明人： Lars Oberbeck ,  Uwe Schroeder ,  Johannes Heitmann ,  Stephan Kudelka ,  Tim Boescke ,  Jonas Sundqvist

    IPC分类号： H01L29/78 ,  H01L21/31 ,  H01L29/92

    CPC分类号： H01L21/02337 ,  H01L21/02175 ,  H01L21/28194 ,  H01L21/3142 ,  H01L21/31641 ,  H01L27/10805 ,  H01L27/1085 ,  H01L28/40 ,  H01L29/513 ,  H01L29/517

    摘要： The present invention relates to a method for depositing a dielectric material comprising a transition metal oxide. In an initial step, a substrate is provided. In a further step, a first precursor comprising a transition metal containing compound, and a second precursor predominantly comprising at least one of water vapor, ozone, oxygen, or oxygen plasma are sequentially applied for depositing above the substrate a layer of a transition metal containing material. In another step, a third precursor comprising a dopant containing compound, and a fourth precursor predominantly comprising at least one of water vapor, ozone, oxygen, or oxygen plasma are sequentially applied for depositing above the substrate a layer of a dopant containing material. The transition metal comprises at least one of zirconium and hafnium. The dopant comprises at least one of barium, strontium, calcium, niobium, bismuth, magnesium, and cerium.

    摘要翻译： 本发明涉及沉积包含过渡金属氧化物的电介质材料的方法。 在初始步骤中，提供衬底。 在另一步骤中，依次施加包含含过渡金属的化合物的第一前体和主要包含水蒸气，臭氧，氧或氧等离子体中的至少一种的第二前体，以在基底上沉积含有过渡金属的层 材料。 在另一步骤中，顺序地施加包含掺杂剂的化合物的第三前体和主要包含水蒸汽，臭氧，氧或氧等离子体中的至少一种的第四前体，以在衬底上沉积含掺杂剂材料的层。 过渡金属包括锆和铪中的至少一种。 掺杂剂包括钡，锶，钙，铌，铋，镁和铈中的至少一种。

    Zirconium oxide based capacitor and process to manufacture the same
    6.
    发明授权
    Zirconium oxide based capacitor and process to manufacture the same 有权
    基于氧化锆的电容器及其制造方法

    公开(公告)号：US07723771B2

    公开(公告)日：2010-05-25

    申请号：US11731457

    申请日：2007-03-30

    申请人： Tim Boescke ,  Uwe Schroeder

    发明人： Tim Boescke ,  Uwe Schroeder

    IPC分类号： H01L27/108

    CPC分类号： H01G4/1236 ,  H01G4/33 ,  H01L28/40 ,  Y10T29/417

    摘要： A capacitor structure comprises a first and a second electrode of conducting material. Between the first and second electrodes, an atomic layer deposited dielectric film is disposed, which comprises zirconium oxide and a dopant oxide. Herein, the dopant comprises an ionic radius that differs by more than 24 pm from an ionic radius of zirconium, while the dielectric film comprises a dopant content of 10 atomic percent or less of the dielectric film material excluding oxygen. A process for fabricating a capacitor comprises a step of forming a bottom electrode of the capacitor. On the bottom electrode, a dielectric film comprising zirconium oxide is deposited, and a step for introducing a dopant oxide into the dielectric film performed. On the dielectric structure, a top electrode is formed. The dopant comprises an ionic radius that differs by more than 24 pm from an ionic radius of zirconium, whereas the dielectric structure deposited comprises a dopant content of 10 atomic percent or less of the deposited material excluding oxygen.

    摘要翻译： 电容器结构包括导电材料的第一和第二电极。 在第一和第二电极之间，设置原子层沉积介电膜，其包括氧化锆和掺杂剂氧化物。 这里，掺杂剂包含从锆的离子半径相差大于24μm的离子半径，而电介质膜包含不含氧的电介质膜材料的10原子％以下的掺杂剂含量。 制造电容器的工艺包括形成电容器的底部电极的步骤。 在底部电极上沉​​积包含氧化锆的电介质膜，并且进行用于将掺杂剂氧化物引入电介质膜的步骤。 在电介质结构上，形成顶部电极。 掺杂剂包含距离锆的离子半径相差超过24μm的离子半径，而沉积的介电结构包括不含氧的沉积材料的10原子％以下的掺杂剂含量。

    Zirconium oxide based capacitor and process to manufacture the same
    7.
    发明申请
    Zirconium oxide based capacitor and process to manufacture the same 有权
    基于氧化锆的电容器及其制造方法

    公开(公告)号：US20080237791A1

    公开(公告)日：2008-10-02

    申请号：US11731457

    申请日：2007-03-30

    申请人： Tim Boescke ,  Uwe Schroeder

    发明人： Tim Boescke ,  Uwe Schroeder

    IPC分类号： H01L27/082 ,  B05D5/12 ,  H01G5/013 ,  H01G9/00

    CPC分类号： H01G4/1236 ,  H01G4/33 ,  H01L28/40 ,  Y10T29/417

    摘要： A capacitor structure comprises a first and a second electrode of conducting material. Between the first and second electrodes, an atomic layer deposited dielectric film is disposed, which comprises zirconium oxide and a dopant oxide. Herein, the dopant comprises an ionic radius that differs by more than 24 pm from an ionic radius of zirconium, while the dielectric film comprises a dopant content of 10 atomic percent or less of the dielectric film material excluding oxygen. A process for fabricating a capacitor comprises a step of forming a bottom electrode of the capacitor. On the bottom electrode, a dielectric film comprising zirconium oxide is deposited, and a step for introducing a dopant oxide into the dielectric film performed. On the dielectric structure, a top electrode is formed. The dopant comprises an ionic radius that differs by more than 24 pm from an ionic radius of zirconium, whereas the dielectric structure deposited comprises a dopant content of 10 atomic percent or less of the deposited material excluding oxygen.

    摘要翻译： 电容器结构包括导电材料的第一和第二电极。 在第一和第二电极之间，设置原子层沉积介电膜，其包括氧化锆和掺杂剂氧化物。 这里，掺杂剂包含从锆的离子半径相差大于24μm的离子半径，而电介质膜包含不含氧的电介质膜材料的10原子％以下的掺杂剂含量。 制造电容器的工艺包括形成电容器的底部电极的步骤。 在底部电极上沉​​积包含氧化锆的电介质膜，并且进行将掺杂剂氧化物引入电介质膜的步骤。 在电介质结构上，形成顶部电极。 掺杂剂包含距离锆的离子半径相差超过24μm的离子半径，而沉积的介电结构包括不含氧的沉积材料的10原子％以下的掺杂剂含量。

    Negative ion implant mask formation for self-aligned, sublithographic resolution patterning for single-sided vertical device formation
    9.
    发明授权
    Negative ion implant mask formation for self-aligned, sublithographic resolution patterning for single-sided vertical device formation 失效
    用于单面垂直器件形成的自对准，亚光刻分辨率图案的负离子注入掩模形成

    公开(公告)号：US06498061B2

    公开(公告)日：2002-12-24

    申请号：US09730674

    申请日：2000-12-06

    申请人： Rama Divakaruni ,  Stephan Kudelka ,  Helmut Tews ,  Irene McStay ,  Kil-Ho Lee ,  Uwe Schroeder

    发明人： Rama Divakaruni ,  Stephan Kudelka ,  Helmut Tews ,  Irene McStay ,  Kil-Ho Lee ,  Uwe Schroeder

    IPC分类号： H01L218242

    CPC分类号： H01L27/10867

    摘要： A process for fabricating a single-sided semiconductor deep trench structure filled with polysilicon trench fill material includes the following steps. Form a thin film, silicon nitride, barrier layer over the trench fill material. Deposit a thin film of an amorphous silicon masking layer over the barrier layer. Perform an angled implant into portions of the amorphous silicon masking layer which are not in the shadow of the deep trench. Strip the undoped portions of the amorphous silicon masking layer from the deep trench. Then strip the newly exposed portions of barrier layer exposing a part of the trench fill polysilicon surface and leaving the doped, remainder of the amorphous silicon masking layer exposed. Counterdope the exposed part of the trench fill material. Oxidize exposed portions of the polysilicon trench fill material, and then strip the remainder of the masking layer.

    摘要翻译： 用于制造填充有多晶硅沟槽填充材料的单面半导体深沟槽结构的工艺包括以下步骤。 在沟槽填充材料上形成薄膜，氮化硅，阻挡层。 在阻挡层上沉积非晶硅掩模层的薄膜。 对非深度沟槽阴影的非晶硅掩模层的部分进行成角度的注入。 从深沟槽剥离非晶硅掩模层的未掺杂部分。 然后剥离暴露部分沟槽填充多晶硅表面的势垒层的新暴露部分，并且使非晶硅掩模层的掺杂剩余部分露出。 反映出暴露部分的沟槽填充材料。 氧化多晶硅沟槽填充材料的暴露部分，然后剥离掩模层的其余部分。

    Semiconductor structures and manufacturing methods
    10.
    发明授权
    Semiconductor structures and manufacturing methods 有权
    半导体结构及制造方法

    公开(公告)号：US06605860B1

    公开(公告)日：2003-08-12

    申请号：US09597442

    申请日：2000-06-20

    申请人： Helmut Horst Tews ,  Alexander Michaelis ,  Stephan Kudelka ,  Uwe Schroeder ,  Raj Jammy ,  Ulrike Gruening

    发明人： Helmut Horst Tews ,  Alexander Michaelis ,  Stephan Kudelka ,  Uwe Schroeder ,  Raj Jammy ,  Ulrike Gruening

    IPC分类号： H01L2906

    CPC分类号： H01L21/28202 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/0223 ,  H01L21/02238 ,  H01L21/02247 ,  H01L21/02255 ,  H01L21/2822 ,  H01L21/3144 ,  H01L21/31658 ,  H01L27/10864 ,  H01L29/045 ,  H01L29/42368 ,  H01L29/512 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66666 ,  H01L29/7827 ,  Y10S257/905

    摘要： A method for forming substantially uniformly thick, thermally grown, silicon dioxide material on a silicon body independent of bon axis. A trench is formed in a surface of the silicon body, such trench having sidewalls disposed in different crystallographic planes, one of such planes being the crystallographic plane and another one of such planes being the plane. A substantially uniform layer of silicon nitride is formed on the sidewalls. The trench, with the with substantially uniform layer of silicon nitride, is subjected to a silicon oxidation environment with sidewalls in the plane being oxidized at a higher rate than sidewalls in the plane producing silicon dioxide on the silicon nitride layer having thickness over the plane greater than over the plane. The silicon dioxide is subjected to an etch to selectively remove silicon dioxide while leaving substantially un-etched silicon nitride to thereby remove portions of the silicon dioxide over the plane and to thereby expose underlying portions of the silicon nitride material while leaving portions of the silicon dioxide over the plane on underlying portions of the silicon nitride material. Exposed portions of the silicon nitride material are selectively removed to expose underlying portions of the sidewalls of the trench disposed in the plane while leaving substantially un-etched portions of the silicon nitride material disposed on sidewalls of the trench disposed in the plane. The structure is then subjected to an silicon oxidation environment to produce the substantially uniform silicon dioxide layer on the sidewalls of the trench.

    摘要翻译： 一种在硅主体上形成基本上均匀的厚的热生长二氧化硅材料的方法，其独立于凸轮轴。 沟槽形成在硅体的表面中，这样的沟槽具有设置在不同结晶平面中的侧壁，这些平面中的一个是100晶体平面，另外一个这样的平面是“10”平面。 在侧壁上形成基本均匀的氮化硅层。 具有基本上均匀的氮化硅层的沟槽经受硅氧化环境，其中<110>面中的侧壁以比在100平面中的侧壁更高的速率被氧化，在氮化硅层上产生二氧化硅 具有比<110>平面上的厚度大于超过<100>平面的厚度。 对二氧化硅进行蚀刻以选择性地去除二氧化硅，同时留下基本未蚀刻的氮化硅，从而在<100>平面上除去二氧化硅的一部分，从而暴露氮化硅材料的下面部分，同时留下部分 在氮化硅材料的下面部分上的<110>面上的二氧化硅。 选择性地去除氮化硅材料的暴露部分以暴露设置在<100>平面中的沟槽的侧壁的下面部分，同时留下设置在设置在<110>平面中的沟槽的侧壁上的氮化硅材料的基本上未蚀刻的部分 >飞机。 然后将该结构进行硅氧化环境以在沟槽的侧壁上产生基本均匀的二氧化硅层。