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    STRESS-ISOLATED MEMS DEVICE COMPRISING SUBSTRATE HAVING CAVITY AND METHOD OF MANUFACTURE
    112.
    发明申请
    STRESS-ISOLATED MEMS DEVICE COMPRISING SUBSTRATE HAVING CAVITY AND METHOD OF MANUFACTURE 有权

    公开(公告)号：US20210380403A1

    公开(公告)日：2021-12-09

    申请号：US17342442

    申请日：2021-06-08

    Applicant: Analog Devices, Inc.

    Inventor： Xin Zhang ,  Christopher Needham ,  Andrew Proudman ,  Nikolay Pokrovskiy ,  George M. Molnar, II ,  Laura Cornelia Popa ,  Michael Judy

    IPC: B81B7/00 ,  B81C1/00

    Abstract: A stress-isolated microelectromechanical systems (MEMS) device and a method of manufacture of the stress-isolated MEMS device are provided. MEMS devices may be sensitive to stress and may provide lower performance when subjected to stress. A stress-isolated MEMS device may be manufactured by etching a trench and/or a cavity in a first side of a substrate and subsequently forming a MEMS device on a surface of a platform opposite the first side of the substrate. Such a stress-isolated MEMS device may exhibit better performance than a MEMS device that is not stress-isolated. Moreover, manufacturing the MEMS device by first forming a trench and cavity on a backside of a wafer, before forming the MEMS device on a suspended platform, provides increased yield and allows for fabrication of smaller parts, in at least some embodiments.

    Current mirror arrangements with adjustable offset buffers
    113.
    发明授权
    Current mirror arrangements with adjustable offset buffers 有权

    公开(公告)号：US11188112B2

    公开(公告)日：2021-11-30

    申请号：US16832144

    申请日：2020-03-27

    Applicant: Analog Devices, Inc.

    Inventor： Devrim Aksin ,  Omid Foroudi

    IPC: G05F3/26 ,  H03F3/30 ,  H03F3/45

    Abstract: An example current mirror arrangement includes a current mirror circuit, configured to receive an input current signal at an input transistor Q1 and output a mirrored signal at an output transistor Q2. The arrangement further includes a buffer amplifier circuit, having an input coupled to Q1 and an output coupled to Q2. The offset of the buffer amplifier circuit can be adjusted by including circuitry for an input or an output side offset adjustment or by implementing the buffer amplifier circuit as a diamond stage with individually controlled current sources for each of the transistors of the diamond stage. Providing an adjustable offset buffer in a current mirror arrangement may advantageously allow benefiting from the use of a buffer outside of a feedback loop of a current mirror, while being able to reduce the buffer offset due to mismatch between master and slave sides of the current mirror circuit.

    AMPLIFIERS WITH WIDE INPUT RANGE AND LOW INPUT CAPACITANCE
    114.
    发明申请
    AMPLIFIERS WITH WIDE INPUT RANGE AND LOW INPUT CAPACITANCE 有权

    公开(公告)号：US20210367572A1

    公开(公告)日：2021-11-25

    申请号：US15929756

    申请日：2020-05-20

    Applicant: Analog Devices, Inc.

    Inventor： Yoshinori Kusuda

    IPC: H03F3/45

    Abstract: Amplifiers with wide input range and low input capacitance are provided. In certain embodiments, an amplifier input stage includes a pair of input terminals, a pair of n-type input transistors, a first pair of isolation switches connected between the input terminals and the n-type input transistors, a pair of p-type input transistors, and a second pair of isolation switches connected between the input terminals and the p-type input transistors. The amplifier input stage further includes a control circuit that determines whether to use the n-type input transistors and/or the p-type input transistors for amplification based on a detected common-mode voltage of the input terminals. The control circuit opens the first pair of isolation switches to decouple the input terminals from the n-type input transistors when unused, and opens the second pair of isolation switches to decouple the input terminals from the p-type input transistors when unused.

    Fast locking sequence for phase-locked loops
    115.
    发明授权
    Fast locking sequence for phase-locked loops 有权

    公开(公告)号：US11177816B2

    公开(公告)日：2021-11-16

    申请号：US16949180

    申请日：2020-10-19

    Applicant: Analog Devices, Inc.

    Inventor： Neil E. Weeks ,  Reuben P. Nelson

    IPC: H03L7/107 ,  H03L7/08 ,  G06F1/12 ,  G06F1/10 ,  H04B1/16 ,  H03K5/00

    Abstract: Apparatus and methods for clock synchronization and frequency translation are provided herein. Clock synchronization and frequency translation integrated circuits (ICs) generate one or more output clock signals having a controlled timing relationship with respect to one or more reference signals. The teachings herein provide a number of improvements to clock synchronization and frequency translation ICs, including, but not limited to, reduction of system clock error, reduced variation in clock propagation delay, lower latency monitoring of reference signals, precision timing distribution and recovery, extrapolation of timing events for enhanced phase-locked loop (PLL) update rate, fast PLL locking, improved reference signal phase shift detection, enhanced phase offset detection between reference signals, and/or alignment to phase information lost in decimation.

    FINFET THYRISTORS FOR PROTECTING HIGH-SPEED COMMUNICATION INTERFACES
    117.
    发明申请
    FINFET THYRISTORS FOR PROTECTING HIGH-SPEED COMMUNICATION INTERFACES 有权

    公开(公告)号：US20210344336A1

    公开(公告)日：2021-11-04

    申请号：US16863830

    申请日：2020-04-30

    Applicant: Analog Devices, Inc.

    Inventor： Javier A. Salcedo ,  Jonathan G. Pfeifer

    IPC: H03K17/081 ,  H01L29/74 ,  H01L29/78 ,  H01L27/02

    Abstract: Fin field-effect transistor (FinFET) thyristors for protecting high-speed communication interfaces are provided. In certain embodiments herein, high voltage tolerant FinFET thyristors are provided for handling high stress current and high RF power handling capability while providing low capacitance to allow wide bandwidth operation. Thus, the FinFET thyristors can be used to provide electrical overstress protection for ICs fabricated using FinFET technologies, while addressing tight radio frequency design window and robustness. In certain implementations, the FinFET thyristors include a first thyristor, a FinFET triggering circuitry and a second thyristor that serves to provide bidirectional blocking voltage and overstress protection. The FinFET triggering circuitry also enhances turn-on speed of the thyristor and/or reduces total on-state resistance.

    FLUID DELIVERY DEVICE
    118.
    发明申请
    FLUID DELIVERY DEVICE 有权

    公开(公告)号：US20210322681A1

    公开(公告)日：2021-10-21

    申请号：US16851798

    申请日：2020-04-17

    Applicant: Analog Devices, Inc.

    Inventor： David Frank Bolognia ,  Brian Hall

    IPC: A61M5/315 ,  A61M5/145 ,  A61M5/142

    Abstract: A substance delivery device is disclosed. The substance delivery device includes a lever that includes a drive arm that is rotatable about a pivot. The substance delivery device also includes a pump that has a deformable chamber. The deformable chamber is configured to rotate the drive arm about the pivot towards a container so as to deform the container to drive a fluid substance from the container.

    State-machine based body scanner imaging system
    119.
    发明授权
    State-machine based body scanner imaging system 有权

    公开(公告)号：US11152965B2

    公开(公告)日：2021-10-19

    申请号：US16989738

    申请日：2020-08-10

    Applicant: Analog Devices, Inc.

    Inventor： Christopher E Hay ,  Eamon Nash

    IPC: H04B1/04 ,  G01S13/89 ,  G05B17/02 ,  G01S13/88

    Abstract: A pair of programmable state machines may be included in a transmitter integrated circuit of a scanner (e.g. a body scanner) to control the sub-circuits of the transmitter integrated circuit. The first programmable state machine may be used to control the signal processor of the transmitter that facilitates generation of a signal to be transmitted at a target, such as a user to be scanned. The second programmable state machine may be used to control the transmitter's selection of a transmission channel for transmitting the signal in which provides the signal to be transmitted to an antenna. Further, the receiver integrated circuit of the scanner may include a similar pair of programmable state machines for controlling the receive signal processor and receiver of the receiver integrated circuit. The inclusion of the state machines can reduce both the scan time and the circuit complexity of the scanner.

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