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111.发明授权Integrated structures and fabrication methods thereof implementing a cell phone or other electronic system 有权实现蜂窝电话或其他电子系统的集成结构及其制造方法公开(公告)号：US07619901B2
公开(公告)日：2009-11-17
申请号：US12144715
申请日：2008-06-24
IPC分类号： H05K1/18
CPC分类号： H05K3/30 , H01L21/568 , H01L21/6835 , H01L23/29 , H01L23/3128 , H01L23/5389 , H01L23/552 , H01L24/19 , H01L24/82 , H01L24/96 , H01L25/0652 , H01L2221/68345 , H01L2223/6677 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/16 , H01L2224/16227 , H01L2224/16235 , H01L2224/20 , H01L2224/211 , H01L2224/24137 , H01L2224/2518 , H01L2224/96 , H01L2225/1035 , H01L2225/1058 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01049 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01082 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3025 , H01L2924/3511 , H05K1/0206 , H05K1/0218 , H05K1/185 , H05K3/4644 , H05K2201/09563 , H05K2201/096 , H05K2201/10371 , H05K2201/10674 , H05K2203/0733 , Y10T29/49121 , Y10T29/49124 , Y10T29/4913 , Y10T29/49144 , Y10T29/49147 , Y10T29/49155 , H01L2924/00
摘要： Circuit structures and methods of fabrication are provided for facilitating implementing a complete electronic system in a compact package. The circuit structure includes, in one embodiment, a chips-first multichip base layer with conductive structures extending therethrough. An interconnect layer is disposed over the front surface of the multichip layer and includes interconnect metallization electrically connected to contact pads of the chips and to conductive structures extending through the structural material. A redistribution layer, disposed over the back surface of the multichip layer, includes a redistribution metallization also electrically connected to conductive structures extending through the structural material. Input/output contacts are arrayed over the redistribution layer, including over the lower surfaces of at least some integrated circuit chips within the multichip layer, and are electrically connected through the redistribution metallization, conductive structures, and interconnect metallization to contact pads of the integrated circuit chips of the multichip layer.
摘要翻译： 提供了电路结构和制造方法，以便于以紧凑的封装实现完整的电子系统。 在一个实施例中，电路结构包括具有延伸穿过其中的导电结构的芯片 - 第一多芯片基底层。 互连层设置在多芯层的前表面上，并且包括电连接到芯片的接触焊盘和延伸穿过结构材料的导电结构的互连金属化。 设置在多芯层的后表面上的再分配层包括还电连接到延伸穿过结构材料的导电结构的再分布金属化。 输入/输出触点排列在再分配层上，包括在多芯层内的至少一些集成电路芯片的下表面上，并且通过再分布金属化，导电结构和互连金属化电连接到集成电路的接触焊盘 多芯片层的芯片。
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公开(公告)号：US5149662A
公开(公告)日：1992-09-22
申请号：US839920
申请日：1992-02-21
IPC分类号： G01R31/28 , H01L23/538
CPC分类号： G01R31/2856 , H01L23/5389 , H01L24/24 , H01L24/82 , G01R31/2863 , H01L2224/24137 , H01L2224/24195 , H01L2224/32225 , H01L2224/73267 , H01L2224/92244 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/12042 , H01L2924/14 , H01L2924/19043 , H01L2924/3011 , Y10T29/49004
摘要： Packaging methods and configurations are disclosed for placing electronic integrated circuit chips into operable chip systems in a manner to facilitate burn-in and testability thereof. The invention addresses the problem of testing bare integrated circuit chips before they are committed to a multichip module. Further, it addresses the problem of burning-in bare chips under biased conditions so that chips with defects therein can be accelerated to failure, thereby avoiding their incorporation into a multichip integrated circuit module. Pursuant to the invention, special connection arrays are disposed in spacer blocks in a predetermined configuation on a substrate. The blocks define areas of the substrate which preferably accommodate a plurality of integrated circuit chips such that each chip is surrounded on each side by a spacer block. One or more connection arrays may be provided in each spacer block. The connection arrays have interconnection pads which in the final structure are accessible to an external probing device. Specific methods of fabrication are also disclosed.
摘要翻译： 公开了用于将电子集成电路芯片以便于其耐久性和可测试性的方式放置在可操作的芯片系统中的封装方法和配置。 本发明解决了在裸机集成电路芯片致力于多芯片模块之前测试的问题。 此外，它解决了在偏置条件下烧入裸芯片的问题，使得其中具有缺陷的芯片可能被加速到故障，从而避免其并入多芯片集成电路模块。 根据本发明，特定连接阵列以衬底上的预定配置设置在间隔块中。 这些块限定了优选地容纳多个集成电路芯片的衬底的区域，使得每个芯片通过间隔块在每一侧被包围。 可以在每个间隔块中提供一个或多个连接阵列。 连接阵列具有互连焊盘，其在最终结构中可由外部探测装置访问。 还公开了具体的制造方法。
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公开(公告)号：US4484258A
公开(公告)日：1984-11-20
申请号：US326116
申请日：1981-11-30
CPC分类号： H05B37/029 , H02J13/0079 , H02J13/0086 , H05B37/0218 , H05B37/0227 , Y02B20/46 , Y02B70/3283 , Y04S20/246
摘要： An apparatus for controlling distributed electrical loads including a microprocessor based central controller coupled via a twisted pair bidirectional data line to a plurality of microcomputer based transceiver decoders. Each transceiver decoder is coupled to a plurality of relays, each relay associated with a particular load to be controlled. Override switches and sensors, coupled to transceiver decoders provide override requests and information related to amibient conditions at the site of a load. A user defined data base includes sub-sets of relays called sectors, patterns of relay states, remote switches, a time dependent schedule and condition responses. A communication protocall and arbitration scheme provide for interactive communication between the central controller and each transceiver decoder with interfacing with the operation of any other transceiver decoder. Enhanced data storage capacity is achieved through dynamic allocation of memory space for pattern data. This divisional application is particularly directed to an improvement in the transceiver decoder permitting it to accumulate data from switch actuations and then transmit this accumulated data to the central controller whenever the transceiver decoder can gain access to the twisted pair data line.
摘要翻译： 一种用于控制分布式电负载的装置，包括通过双绞线双向数据线耦合到基于微机的收发器解码器的基于微处理器的中央控制器。 每个收发器解码器耦合到多个继电器，每个继电器与要控制的特定负载相关联。 耦合到收发器解码器的覆盖开关和传感器提供覆盖请求和与负载现场的无序条件相关的信息。 用户定义的数据库包括称为扇区的继电器子集，继电器状态模式，远程开关，时间相关调度和状态响应。 通信协调和仲裁方案提供中央控制器和每个收发器解码器之间的交互式通信，与任何其他收发器解码器的操作接口。 通过动态分配模式数据的存储空间来实现增强的数据存储容量。 该分案应用特别涉及收发器解码器的改进，允许其从开关致动中积累数据，然后每当收发器解码器可以访问双绞线数据线时将该累积数据发送到中央控制器。
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公开(公告)号：US4180807A
公开(公告)日：1979-12-25
申请号：US852234
申请日：1977-11-17
CPC分类号： H03M1/1225
摘要： A charge transfer circuit of the type including first and second capacitors separated by a charge transfer MOSFET is disclosed. The disclosure includes the description of a circuit which compensates for variations in the threshold voltage of the charge transfer MOSFET such that the magnitude of the charge packet transferred from the first to the second capacitor is substantially independent of changes in the magnitude of the threshold voltage.
摘要翻译： 公开了一种包括由电荷转移MOSFET分离的第一和第二电容器的电荷转移电路。 本公开包括补偿电荷转移MOSFET的阈值电压的变化的电路的描述，使得从第一电容器转移到第二电容器的电荷分组的幅度基本上与阈值电压的幅度的变化无关。
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115.发明授权
公开(公告)号：US4165478A
公开(公告)日：1979-08-21
申请号：US835067
申请日：1977-09-21
摘要： A reference voltage source, relatively insensitive to changes in ambient temperature and supply voltage, utilizes a plurality of charge transfer amplifiers each having a temperature-stable amplification factor determined essentially by the ratio of two capacitances and independent of temperature-related factors. The amplifiers operate to provide a punch-through reference device with a constant current to cause generation of a stable reference voltage.
摘要翻译： 对环境温度和电源电压变化相对不敏感的参考电压源使用多个电荷传输放大器，每个电荷传输放大器具有基本上由两个电容的比率确定并且独立于温度相关因素的温度稳定的放大因子。 放大器用于提供具有恒定电流的穿通参考装置，以产生稳定的参考电压。
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公开(公告)号：US4138666A
公开(公告)日：1979-02-06
申请号：US852233
申请日：1977-11-17
CPC分类号： H03M1/0604
摘要： A charge transfer circuit of the type including first and second capacitors and a charge transfer transistor for transferring discrete packets of charge from the first to the second capacitor is disclosed. The charge transfer circuit includes a feedback circuit which recharges the first capacitor to a value which varies as a function of the threshold voltage of the charge transfer transistor. As a result, the magnitude of the charge packets transferred by the charge transfer remain at a predetermined value irrespective of variations in the threshold voltage of the transistor.
摘要翻译： 公开了一种包括第一和第二电容器的电荷转移电路，以及用于从第一电容器转移到第二电容器的电荷转移晶体管。 电荷转移电路包括反馈电路，其将第一电容器充电到根据电荷转移晶体管的阈值电压变化的值。 结果，不管晶体管的阈值电压的变化如何，通过电荷转移传送的电荷包的大小保持在预定值。
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公开(公告)号：US4121461A
公开(公告)日：1978-10-24
申请号：US852241
申请日：1977-11-17
摘要： An electronic temperature sensor utilizing monolithic charge transfer circuitry is disclosed. A first charge transfer circuit supplies a charge storage element with N.sub.1 first charge packets, N.sub.1 being the number of charge packets required to change the charge stored by the charge storage element from a first to a second value. A second charge transfer circuit supplies the charge storage element with N.sub.2 second charge packets, N.sub.2 being the number of charge packets required to change the charge stored by the charge storage element from the first to the second value. The magnitude of the second charge packet varies from the magnitude of first packet as the linear function of the temperature to the sensor. A counter generates an output signal which is a function of the difference between N.sub.1 and N.sub.2 and which is indicative of the magnitude of the temperature to be sensed.
摘要翻译： 公开了一种采用单片电荷转移电路的电子温度传感器。 第一电荷转移电路为电荷存储元件提供N1个第一充电分组，N1是将电荷存储元件存储的电荷从第一值变为第二值所需的电荷分组数。 第二电荷转移电路向电荷存储元件提供N2第二充电分组，N 2是将电荷存储元件存储的电荷从第一值改变为第二值所需的电荷分组数。 第二充电包的大小随着第一包的大小而变化，作为温度到传感器的线性函数。 计数器产生作为N1和N2之间的差的函数的输出信号，其表示要感测的温度的大小。
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公开(公告)号：US4074260A
公开(公告)日：1978-02-14
申请号：US689456
申请日：1976-05-24
CPC分类号： H03M1/60
摘要： An analog-to-digital converter is described including scaling means for providing an output based on a preselected scale factor. Conversion is made by selectively transferring charge from a charge storage location in discrete quanta the size of which are adjusted during the course of conversion in order to eliminate certain sources of error including threshold drift, leakage and transistor gain drift.
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公开(公告)号：US4070667A
公开(公告)日：1978-01-24
申请号：US628401
申请日：1975-11-03
IPC分类号： H03M1/44 , H01L29/768 , H03M1/00 , H03K13/02
CPC分类号： H01L29/768 , H03M1/44
摘要： A charge transfer analog-to-digital converter is described wherein an analog signal is converted to a digital equivalent thereof in a structure suitable to be implemented in MOS form. A dual slope technique is employed wherein the digital output is the ratio between the input signal and a reference signal.
摘要翻译： 描述了一种电荷转移模数转换器，其中模拟信号以适于以MOS形式实现的结构转换成其数字等价物。 使用双斜率技术，其中数字输出是输入信号和参考信号之间的比率。
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公开(公告)号：US4039940A
公开(公告)日：1977-08-02
申请号：US710177
申请日：1976-07-30
CPC分类号： G01R27/2605
摘要： A unknown value of capacitance is determined by the repeated transfer of quantities of charge from a potential store in amounts proportional to the value of the unknown capacitance. Transfer is accomplished during at least two distinct periods of a measurement cycle so that capacitance may be expressed as a ratio of a known and an unknown capacitance in order to eliminate certain circuit related errors.
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