公开(公告)号：US12206370B2

公开(公告)日：2025-01-21

申请号：US17619669

申请日：2020-06-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hitoshi Kunitake ,  Takayuki Ikeda ,  Kiyoshi Kato ,  Yuichi Yanagisawa ,  Shota Mizukami ,  Kazuki Tsuda

IPC: H03G3/30 ,  H01L29/786 ,  H03F1/02 ,  H03F3/195

Abstract: A semiconductor device is provided in which power consumption is reduced and an increase in circuit area is inhibited. The semiconductor device includes a high frequency amplifier circuit, an envelope detection circuit, and a power supply circuit. The power supply circuit has a function of supplying a power supply potential to the high frequency amplifier circuit, an output of the high frequency amplifier circuit is connected to the envelope detection circuit, and an output of the envelope detection circuit is connected to the power supply circuit. The power supply circuit can reduce the power consumption by changing the power supply potential in accordance with the output of the high frequency amplifier circuit. The use of an OS transistor in the envelope detection circuit can inhibit an increase in circuit area.

公开(公告)号：US11996132B2

公开(公告)日：2024-05-28

申请号：US17298964

申请日：2019-11-20

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Tatsuya Onuki ,  Kiyoshi Kato ,  Shunpei Yamazaki

IPC: G11C11/405 ,  G11C11/4096 ,  H01L27/12 ,  H01L29/786 ,  H10B12/00

CPC classification number: G11C11/405 ,  G11C11/4096 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/78648 ,  H01L29/7869 ,  H10B12/00

Abstract: A semiconductor device includes a first transistor one of a source and a drain of which is electrically connected to a first wiring for reading data; a second transistor one of a source and a drain of which is electrically connected to a gate of the first transistor and the other of the source and the drain of which is electrically connected to a second wiring for writing the data; and a third transistor one of a source and a drain of which is electrically connected to the gate of the first transistor and the other of the source and the drain of which is electrically connected to a capacitor for retaining electric charge corresponding to the data, and the third transistor includes a metal oxide in a channel formation region.

公开(公告)号：US11825665B2

公开(公告)日：2023-11-21

申请号：US17949436

申请日：2022-09-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Kiyoshi Kato

IPC: H01L29/78 ,  H10B99/00 ,  H01L27/105 ,  H01L27/12 ,  H10B12/00 ,  H10B41/20 ,  H10B41/70 ,  H01L29/24 ,  H01L29/786 ,  G11C13/00 ,  H01L49/02 ,  H10B10/00

CPC classification number: H10B99/00 ,  H01L27/105 ,  H01L27/124 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/24 ,  H01L29/7869 ,  H01L29/78696 ,  H10B12/00 ,  H10B41/20 ,  H10B41/70 ,  G11C13/003 ,  G11C13/0007 ,  G11C2213/79 ,  H01L28/40 ,  H10B10/00

Abstract: An object of one embodiment of the present invention is to provide a semiconductor device with a novel structure in which stored data can be stored even when power is not supplied in a data storing time and there is no limitation on the number of times of writing. The semiconductor device includes a first transistor which includes a first channel formation region using a semiconductor material other than an oxide semiconductor, a second transistor which includes a second channel formation region using an oxide semiconductor material, and a capacitor. One of a second source electrode and a second drain electrode of the second transistor is electrically connected to one electrode of the capacitor.

公开(公告)号：US11729960B2

公开(公告)日：2023-08-15

申请号：US17503651

申请日：2021-10-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hajime Kimura ,  Takayuki Ikeda ,  Kiyoshi Kato ,  Yuta Endo ,  Junpei Sugao

IPC: H10B12/00 ,  G11C5/02 ,  G11C11/403 ,  G11C11/409 ,  H01L29/24

CPC classification number: H10B12/00 ,  G11C5/02 ,  G11C11/403 ,  G11C11/409 ,  H01L29/24

Abstract: A semiconductor device with a large storage capacity per unit area is provided. A semiconductor device includes a memory cell. The memory cell includes a first conductor; a first insulator over the first conductor; a first oxide over the first insulator and including a first region, a second region, and a third region positioned between the first region and the second region; a second insulator over the first oxide; a second conductor over the second insulator; a third insulator positioned in contact with a side surface of the first region; and a second oxide positioned on the side surface of the first region, with the third insulator therebetween. The first region includes a region overlapping the first conductor. The third region includes a region overlapped by the second conductor. The first region and the second region have a lower resistance than the third region.

公开(公告)号：US11705184B2

公开(公告)日：2023-07-18

申请号：US17849894

申请日：2022-06-27

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Kiyoshi Kato ,  Takahiko Ishizu ,  Tatsuya Onuki

IPC: G11C11/24 ,  G11C11/408 ,  H01L27/12 ,  H01L29/24 ,  H01L29/786 ,  H10B99/00

CPC classification number: G11C11/4085 ,  H01L27/124 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/24 ,  H01L29/7869 ,  H01L29/78648 ,  H10B99/00

Abstract: A memory device having long data retention time and high reliability is provided. The memory device includes a driver circuit and a plurality of memory cells, the memory cell includes a transistor and a capacitor, and the transistor includes a metal oxide in a channel formation region. The transistor includes a first gate and a second gate, and in a period during which the memory cell retains data, negative potentials are applied to the first gate and the second gate of the transistor.

公开(公告)号：US11626422B2

公开(公告)日：2023-04-11

申请号：US17319389

申请日：2021-05-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hajime Kimura ,  Takanori Matsuzaki ,  Kiyoshi Kato ,  Satoru Okamoto

IPC: H01L27/11582 ,  H01L27/1157 ,  H01L27/11565 ,  H01L27/11573 ,  H01L27/11575 ,  H01L29/24 ,  H01L29/51

Abstract: A semiconductor device with a large storage capacity per unit area is provided. The semiconductor device includes a first insulator including a first opening, a first conductor that is over the first insulator and includes a second opening, a second insulator that is over the first insulator and includes a third opening, and an oxide penetrating the first opening, the second opening, and the third opening. The oxide includes a first region at least in the first opening, a second region at least in the second opening, and a third region at least in the third opening. The resistances of the first region and the third region are lower than the resistance of the second region.

公开(公告)号：US11476862B2

公开(公告)日：2022-10-18

申请号：US17282098

申请日：2019-10-10

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Tatsuya Onuki ,  Yuto Yakubo ,  Kiyoshi Kato ,  Seiya Saito

IPC: H03M1/00 ,  H03M1/12 ,  G01D21/00 ,  G11C27/02

Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a sensor, an amplifier circuit to which a sensor signal of the sensor is input, a sample-and-hold circuit that retains a voltage corresponding to an output signal of an amplifier input to the sample-and-hold circuit, an analog-to-digital converter circuit to which an output signal of the sample-and-hold circuit corresponding to the voltage is input, and an interface circuit. The interface circuit has a function of switching and controlling a first control period in which the sensor signal is input to the amplifier circuit and an output signal of the amplifier circuit is retained in the sample-and-hold circuit and a second control period in which a digital signal obtained by output of the voltage retained in the sample-and-hold circuit to the analog-to-digital converter circuit is output to the interface circuit. In the first control period, the analog-to-digital converter circuit is switched to stop output of the digital signal. The first control period is longer than the second control period.

公开(公告)号：US11322498B2

公开(公告)日：2022-05-03

申请号：US16944289

申请日：2020-07-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Kiyoshi Kato

IPC: H01L27/105 ,  H01L27/12 ,  H01L29/24 ,  H01L29/16 ,  G11C11/405 ,  G11C16/04 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/118 ,  H01L27/115 ,  H01L29/786 ,  H01L21/822 ,  H01L27/06 ,  H01L27/108 ,  H01L29/78

Abstract: An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode. The first transistor is provided in a substrate including a semiconductor material. The second transistor includes an oxide semiconductor layer.

公开(公告)号：US10984840B2

公开(公告)日：2021-04-20

申请号：US16643755

申请日：2018-09-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tatsuya Onuki ,  Takanori Matsuzaki ,  Kiyoshi Kato ,  Shunpei Yamazaki

IPC: G11C11/24 ,  G11C7/06 ,  G11C14/00

Abstract: To provide a novel semiconductor device.
The semiconductor device includes cell arrays and peripheral circuits; the cell arrays include memory cells; the peripheral circuits includes a first driver circuit, a second driver circuit, a first amplifier circuit, a second amplifier circuit, a third amplifier circuit, and a fourth amplifier circuit; the first driver circuit and the second driver circuit have a function of supplying a selection signal to the cell array; the first amplifier circuit and the second amplifier circuit have a function of amplifying a potential input from the cell array; the third amplifier circuit and the fourth amplifier circuit have a function of amplifying a potential input from the first amplifier circuit or the second amplifier circuit; the first driver circuit, the second driver circuit, the first amplifier circuit, the second amplifier circuit, the third amplifier circuit, and the fourth amplifier circuit include a region overlapping with the cell array; and the memory cells include a metal oxide in a channel formation region.

公开(公告)号：US10897258B2

公开(公告)日：2021-01-19

申请号：US16705326

申请日：2019-12-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masashi Fujita ,  Yutaka Shionoiri ,  Kiyoshi Kato ,  Hidetomo Kobayashi

IPC: H03K19/17728 ,  H03K19/173 ,  H03K19/17772 ,  H03K19/17758

Abstract: An object is to provide a semiconductor device that can maintain the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units even after supply of power supply voltage is stopped. Another object is to provide a semiconductor device in which the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units can be changed at high speed. In a reconfigurable circuit, an oxide semiconductor is used for a semiconductor element that stores data on the circuit configuration, connection relation, or the like. Specifically, the oxide semiconductor is used for a channel formation region of the semiconductor element.