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    Replacement metal gate structures for effective work function control
    122.
    发明授权
    Replacement metal gate structures for effective work function control 有权
    更换金属门结构，实现有效的工作功能控制

    公开(公告)号：US08629014B2

    公开(公告)日：2014-01-14

    申请号：US12885592

    申请日：2010-09-20

    申请人： Unoh Kwon ,  Michael P. Chudzik ,  Ravikumar Ramachandran

    发明人： Unoh Kwon ,  Michael P. Chudzik ,  Ravikumar Ramachandran

    IPC分类号： H01L21/8238 ,  H01L21/70

    CPC分类号： H01L27/0922 ,  H01L21/823842

    摘要： A stack of a barrier metal layer and a first-type work function metal layer is deposited in replacement metal gate schemes. The barrier metal layer can be deposited directly on the gate dielectric layer. The first-type work function metal layer is patterned to be present only in regions of a first type field effect transistor. A second-type work function metal layer is deposited directly on the barrier metal layer in the regions of a second type field effect transistor. Alternately, the first-type work function layer can be deposited directly on the gate dielectric layer. The barrier metal layer is patterned to be present only in regions of a first type field effect transistor. A second-type work function metal layer is deposited directly on the gate dielectric layer in the regions of the second type field effect transistor. A conductive material fill and planarization form dual work function replacement gate structures.

    摘要翻译： 在替换金属栅极方案中沉积阻挡金属层和第一型功函数金属层的堆叠。 阻挡金属层可以直接沉积在栅极介电层上。 图案化第一型功函数金属层仅存在于第一类场效应晶体管的区域中。 第二类功函数金属层直接沉积在第二类场效应晶体管的区域中的势垒金属层上。 或者，第一类功函数层可以直接沉积在栅介电层上。 图案化阻挡金属层仅存在于第一类场效应晶体管的区域中。 第二类型功函数金属层直接沉积在第二类场效应晶体管的区域中的栅介质层上。 导电材料填充和平坦化形成双重功能替代栅极结构。

    Semiconductor transistors having high-K gate dielectric layers, metal gate electrode regions, and low fringing capacitances
    128.
    发明授权
    Semiconductor transistors having high-K gate dielectric layers, metal gate electrode regions, and low fringing capacitances 有权
    具有高K栅极电介质层，金属栅电极区域和低边缘电容的半导体晶体管

    公开(公告)号：US08232612B2

    公开(公告)日：2012-07-31

    申请号：US12645981

    申请日：2009-12-23

    申请人： James William Adkisson ,  Michael P. Chudzik ,  Jeffrey Peter Gambino ,  Renee T. Mo ,  Naim Moumen

    发明人： James William Adkisson ,  Michael P. Chudzik ,  Jeffrey Peter Gambino ,  Renee T. Mo ,  Naim Moumen

    IPC分类号： H01L21/00

    CPC分类号： H01L29/4983 ,  H01L29/4966 ,  H01L29/518 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833 ,  Y10S257/90

    摘要： A semiconductor structure. The structure includes (i) a semiconductor substrate which includes a channel region, (ii) first and second source/drain regions on the semiconductor substrate, (iii) a gate dielectric region, and (iv) a gate electrode region, (v) a plurality of interconnect layers on the gate electrode region, and (vi) first and second spaces. The gate dielectric region is disposed between and in direct physical contact with the channel region and the gate electrode region. The gate electrode region is disposed between and in direct physical contact with the gate dielectric region and the interconnect layers. The first and second spaces are in direct physical contact with the gate electrode region. The first space is disposed between the first source/drain region and the gate electrode region. The second space is disposed between the second source/drain region and the gate electrode region.

    摘要翻译： 半导体结构。 该结构包括（i）半导体衬底，其包括沟道区，（ii）半导体衬底上的第一和第二源极/漏极区，（iii）栅极电介质区，和（iv）栅电极区，（v） 栅电极区上的多个互连层，以及（vi）第一和第二空间。 栅极电介质区域设置在沟道区域和栅电极区域之间并与其直接物理接触。 栅电极区域设置在栅极电介质区域和互连层之间并与其直接物理接触。 第一和第二空间与栅电极区域直接物理接触。 第一空间设置在第一源极/漏极区域和栅极电极区域之间。 第二空间设置在第二源极/漏极区域和栅极电极区域之间。