公开(公告)号：US10164651B2

公开(公告)日：2018-12-25

申请号：US15921337

申请日：2018-03-14

Applicant: SOCIONEXT INC.

Inventor： Kenta Aruga ,  Yasuhiro Mizuno ,  Masato Yoshioka

IPC: H03M1/06 ,  H03M1/38 ,  H03M1/46 ,  H04N5/50

Abstract: An A/D converter includes a capacitor DAC, a resistor DAC, a first capacitive element, and a comparator. The capacitor DAC is configured to convert high-order M bits, where M and N are integers equal to or greater than 2, and the resistor DAC is configured to convert low-order N bits. The first capacitive element is provided between the capacitor DAC and the resistor DAC, and the comparator is configured to compare an input signal voltage with a voltage output from the capacitor DAC. The resistor DAC generates and outputs a voltage by adding or subtracting a wait based on redundant bits in addition to N-bit resolution.

公开(公告)号：US20180366589A1

公开(公告)日：2018-12-20

申请号：US16110661

申请日：2018-08-23

Applicant: SOCIONEXT INC.

Inventor： Hiroyuki SHIMBO

IPC: H01L29/786 ,  H01L27/092 ,  H01L29/423

Abstract: In a standard cell including nanowire FETs, pads connected to nanowires are arranged at a predetermined pitch in X direction along which the nanowires extend. A cell width of the standard cell is an integral multiplication of the pitch. In a case where the standard cell is arranged to constitute the layout of a semiconductor integrated circuit device, the pads are regularly arranged in the X direction.

公开(公告)号：US20180366490A1

公开(公告)日：2018-12-20

申请号：US16110203

申请日：2018-08-23

Applicant: SOCIONEXT INC.

Inventor： Masaki TAMARU ,  Kazuyuki NAKANISHI ,  Hidetoshi NISHIMURA

IPC: H01L27/118 ,  H01L27/02 ,  H01L27/092 ,  H01L21/8238

CPC classification number: H01L27/11807 ,  H01L21/823892 ,  H01L27/0207 ,  H01L27/0928 ,  H01L27/11898 ,  H01L2027/11866 ,  H01L2027/11881 ,  H01L2027/1189

Abstract: A well potential supply region is provided in an N-type well region of a cell array. Adjacent gates disposed in both sides of the well potential supply region in the horizontal direction and adjacent gates disposed in further both sides thereof are disposed at the same pitch. In addition, an adjacent cell array includes four gates each of which is opposed to the adjacent gates in the vertical direction. In other words, regularity in the shape of the gate patterns in the periphery of the well potential supply region is maintained.

公开(公告)号：US20180365178A1

公开(公告)日：2018-12-20

申请号：US16111668

申请日：2018-08-24

Applicant: Socionext Inc.

Inventor： Hironori KUBO ,  Norihiko MIZOBATA ,  Makoto HIRANO ,  Akihiro SUZUKI ,  Masahiro TAKEUCHI

IPC: G06F13/16 ,  G11C5/14 ,  G05F1/12 ,  G06F1/32

Abstract: A semiconductor integrated circuit operates with a voltage supplied from a first power supply IC to transmit and receive data to and from an external memory. The semiconductor integrated circuit includes: an interface circuit operating with a voltage supplied from a second power supply IC and accessing the external memory to transmit and receive data to and from the external memory; a determination circuit which determines, based on a result of the access by the interface circuit, an AC timing specification between the external memory and the interface circuit to generate control information for controlling an output voltage of the second power supply IC in accordance with the AC timing specification; and a voltage control circuit which controls the output voltage of the second power supply IC in accordance with the control information.

公开(公告)号：US20180360488A1

公开(公告)日：2018-12-20

申请号：US16113373

申请日：2018-08-27

Applicant: SOCIONEXT INC.

Inventor： Naoto ADACHI ,  Masaya TAMAMURA ,  Amane INOUE

IPC: A61B17/34 ,  A61B8/00 ,  A61B8/08 ,  A61B8/14

Abstract: A processor of a general-purpose terminal acquires position information indicating whether a biological body is punctured from a first side of an ultrasonic probe apparatus or a second side opposite to the first side and angle information indicating a puncture angle, where these items of information are entered on a touch panel of a display, transmits these items of information to the probe apparatus via a wireless communication circuit, acquires, via the communication circuit, image information generated and transmitted by the probe apparatus based on reflected waves obtained by transmitting ultrasonic waves into the biological body from the probe apparatus at a first angle based on the above information, superimposes a puncture guide indicating a puncture path based on the above information on an ultrasonic image of the biological body or a puncture needle based on the image information, and displays a result of the superimposing on the display.

公开(公告)号：US10096593B2

公开(公告)日：2018-10-09

申请号：US15835340

申请日：2017-12-07

Applicant: Socionext Inc.

Inventor： Shiro Usami

IPC: H01L23/52 ,  H01L27/02 ,  H01L23/528 ,  H01L29/87

Abstract: Diffusion regions having the same conductivity type are arranged on a side of a second wiring and a side of a third wiring, respectively under a first wiring connected to a signal terminal. Diffusion regions are separated in a whole part or one part of a range in a Y direction. That is, under first wiring, diffusion regions are only formed in parts opposed to diffusion regions formed under the second wiring and third wiring connected to a power supply terminal or a ground terminal, and a diffusion region is not formed in a central part in an X direction. Therefore, terminal capacity of the signal terminal can be reduced without causing ESD resistance to be reduced, in an ESD protection circuit with the signal terminal.

公开(公告)号：US20180287600A1

公开(公告)日：2018-10-04

申请号：US16001199

申请日：2018-06-06

Applicant: SOCIONEXT INC.

Inventor： Masahisa IIDA ,  Masahiro GION

IPC: H03K17/04 ,  H03K19/017 ,  H03K19/0175 ,  H03K17/687 ,  H03K19/0944

CPC classification number: H03K17/04 ,  H03K17/687 ,  H03K19/017 ,  H03K19/0175 ,  H03K19/017509 ,  H03K19/018521 ,  H03K19/0944

Abstract: An output transistor (2) has a source connected to a VDD1 and a drain connected to an output terminal (1). A pre-driver (3) receives a signal varying in accordance with a data input signal (DIN), and provides a gate signal (SG1) to a gate of the output transistor (2), the gate signal (SG1) transiting between the VDD1 and a potential (VP) at a power source end (4). When a VDD2 is output from an output node (N1) and an assist signal (SA) makes a first transition corresponding to the transition of the gate signal (SG1) from HIGH to LOW, the drive assist circuit (20) performs an assist operation in which a potential of the output node (N1) is temporarily brought down from VDD2.

公开(公告)号：US20180274917A1

公开(公告)日：2018-09-27

申请号：US15994117

申请日：2018-05-31

Applicant: SOCIONEXT INC.

Inventor： Shunsaku IMAKI ,  Yukiteru MURAO ,  Tetsuro NOGUCHI ,  Kenichi ISHIDA ,  Masato SUZUKI ,  Kazuyuki OHHASHI

IPC: G01C3/08 ,  G01C11/06 ,  H04N5/247 ,  G06T7/55 ,  H04N5/225

Abstract: A distance measurement system includes a pair of cameras and is arranged on a roof of a mobile object or an upper edge portion of a door of the mobile object. One of the cameras is arranged at a first portion on an upper surface of the roof or on the upper edge portion of the door, includes an optical axis oriented upward from the upper surface, and has a field of view in all directions around the optical axis. The other camera is arranged at a second portion different from the first portion on the upper surface of the roof or the upper edge portion of the door, includes an optical axis oriented upward from the upper surface, and has a field of view in all directions around the optical axis. Distance measurement in all directions from the mobile object is performed by using this pair of cameras.

公开(公告)号：US10082861B2

公开(公告)日：2018-09-25

申请号：US15136317

申请日：2016-04-22

Applicant: Socionext Inc.

Inventor： Hiroshi Fukuda ,  Hiroshi Naritomi

IPC: G06F1/00 ,  G06F1/32 ,  G06F1/16 ,  G06F1/20 ,  H04N5/232

CPC classification number: G06F1/3296 ,  G06F1/1686 ,  G06F1/206 ,  G06F1/3215 ,  H04N5/23241 ,  Y02D10/16 ,  Y02D10/172

Abstract: A power supply voltage control circuit device includes a power supply control circuit, a memory, and an arithmetic processing circuit. The power supply control circuit is configured to control a power supply voltage to be applied to a target circuit, and the memory is configured to store a first processing result when the target circuit is operated by setting the power supply voltage to a first voltage and a second processing result when the target circuit is operated by setting the power supply voltage to a second voltage different from the first voltage. The arithmetic processing circuit is configured to perform verify by reading the first processing result and the second processing result from the memory and output a result of the verify to the power supply control circuit, and wherein the power supply control circuit controls the power supply voltage based on the result of the verify.

公开(公告)号：US10075794B2

公开(公告)日：2018-09-11

申请号：US15671461

申请日：2017-08-08

Applicant: SOCIONEXT INC.

Inventor： Shuji Miyasaka ,  Kazutaka Abe

IPC: H04S1/00 ,  A63F13/54 ,  A63F13/5255

CPC classification number: H04S1/002 ,  A63F13/5255 ,  A63F13/54 ,  A63F2300/6063 ,  H04S1/007 ,  H04S7/30 ,  H04S2420/01

Abstract: A signal processing device includes phase rotation units which rotate a phase of a signal A and generate two signals having a phase difference of θ, and a control unit which performs transition of θ over time. The control unit controls phases so that θ is approximately 0 degrees at a time point T0 and θ is approximately 180 degrees at a time point T1.