公开(公告)号：US5504361A

公开(公告)日：1996-04-02

申请号：US318150

申请日：1994-10-05

Applicant: Lothar Blossfeld

Inventor： Lothar Blossfeld

IPC: H01L27/04 ,  H01L21/822 ,  H01L21/8238 ,  H01L27/02 ,  H01L27/06 ,  H01L27/08 ,  H01L27/092 ,  H01L23/62 ,  H01L29/00 ,  H01L29/76

CPC classification number: H01L27/0251 ,  H01L2924/0002

Abstract: A polarity-reversal protection device for integrated circuits, comprising a substrate of a first conductivity type; a well region of a second conductivity type opposite said first conductivity type, within said substrate; a field effect transistor having drain and source regions within said well of said first conductivity type, said drain region being connectable to external circuitry to be protected from polarity reversal of a supply voltage, said supply voltage being applied to said source region via a low impedance; and resistor means, coupled to said well region, for enabling said supply voltage to be applied therethrough to said well region, said resistor means operative to sink current during undesirable polarity reversal of the supply voltage, thereby preventing damage to the external circuitry and to the FET itself.

Abstract translation: 一种用于集成电路的极性反转保护装置，包括第一导电类型的衬底; 在所述衬底内的与所述第一导电类型相反的第二导电类型的阱区; 场效应晶体管，其具有在所述第一导电类型的所述阱内的漏极和源极区域，所述漏极区域可连接到外部电路以防止电源电压的极性反转，所述电源电压经由低阻抗施加到所述源极区域 ; 以及耦合到所述阱区的电阻器装置，用于使所述电源电压能够通过其施加到所述阱区域，所述电阻器装置在不期望的电源电压反转期间可操作地吸收电流，从而防止损坏外部电路和 FET本身。

公开(公告)号：US4786610A

公开(公告)日：1988-11-22

申请号：US130044

申请日：1987-12-07

Applicant: Lothar Blossfeld

Inventor： Lothar Blossfeld

IPC: H01L21/76 ,  H01L21/033 ,  H01L21/225 ,  H01L21/331 ,  H01L21/8222 ,  H01L21/8248 ,  H01L21/8249 ,  H01L27/06 ,  H01L29/73 ,  H01L29/732 ,  H01L21/302 ,  H01L21/265

CPC classification number: H01L21/8249 ,  H01L21/033 ,  H01L21/2257 ,  H01L21/8222 ,  H01L27/0623

Abstract: In this method, said emitter area (6) and said collector area of a bipolar transistor are each covered with a portion (71, 72) of an oxidation mask layer in a conventional manner. After implantation of ions of said conductivity type of said base region, an oxide stripe (21) surrounding said emitter are (6) is formed by thermal oxidation. After removal of said portions (71, 72) of said oxidation mask layer, successive layers (9, 10) are deposited which consist at least of a top layer (10) and an underlying doped silicide layer (9). Using a masked anisotropic etching process through said oxide stripe (21), said successive layers (9, 10) are divided into said emitter electrode (61) and said collector electrode (32), out of which said emitter region (4) and said collector contact region (31) are diffused.

Abstract translation: 在这种方法中，双极晶体管的所述发射极区域（6）和所述集电极区域都以常规方式被氧化掩模层的一部分（71,72）覆盖。 在所述导电类型的所述基极区域的离子注入之后，通过热氧化形成围绕所述发射极的氧化物条（21）（6）。 在去除所述氧化掩模层的所述部分（71,72）之后，沉积连续的层（9,10），其至少由顶层（10）和下掺杂的硅化物层（9）组成。 使用通过所述氧化物条纹（21）的掩模的各向异性蚀刻工艺，所述连续层（9,10）被分成所述发射极（61）和所述集电极（32），所述发射极区域（4）和所述 集电极接触区域（31）扩散。

公开(公告)号：US3936630A

公开(公告)日：1976-02-03

申请号：US536053

申请日：1974-12-24

Applicant: Lothar Blossfeld

Inventor： Lothar Blossfeld

IPC: H01L27/146 ,  H04N5/369 ,  H04N5/374 ,  H01L31/00

CPC classification number: H04N3/1575

Abstract: A device for scanning optical images wherein light intensity of a scanned image line is converted to a pulse width modulation rather than a charge profile. A photo transistor row is connected to an inverter chain, and OR-gates have outputs which are fed to a common read line while the input signal of each OR-gate is tapped over coordinated partial rows of the photo transistor row.

Abstract translation: 扫描光学图像的装置，其中扫描图像线的光强度被转换成脉冲宽度调制而不是电荷分布。 光电晶体管列连接到反相器链上，而或门具有馈送到公共读取线的输出，同时每个或门的输入信号被抽头在光电晶体管行的协调的部分行上。

公开(公告)号：US06965227B2

公开(公告)日：2005-11-15

申请号：US09747503

申请日：2000-12-20

Applicant: Lothar Blossfeld

Inventor： Lothar Blossfeld

IPC: G01P3/481 ,  G01P21/02 ,  G01P3/48

CPC classification number: G01P3/481 ,  G01P21/02

Abstract: To detect the rotational speed and angular position of a rotating wheel, a non-contact sensor (e.g., an optical sensor or a Hall sensor) scans scan marks on the wheel, and generates a pulse train. The amplitude of the pulses is compared in a comparator with a variable switching threshold. To achieve accurate measurement results, and to compensate for offset and long-term drift of the sensor, the switching threshold is adjusted if one or more of the following conditions is met: (i) the difference between the pulse amplitude and the switching threshold exceeds a fixable first maximum, (ii) the difference of the amplitudes of two successive pulses exceeds a fixable second maximum, (iii) the difference of the frequencies of successive pulses exceeds a fixable third maximum. The method is particularly advantageous in a motor vehicle, to detect the rotational speed and angular position for an electronic ignition system, or the rotational speed and angular position of the wheels for an ABS braking system, an anti-skid system, or a vehicle stabilization system.

Abstract translation: 为了检测旋转轮的旋转速度和角位置，非接触传感器（例如，光学传感器或霍尔传感器）扫描车轮上的扫描标记，并产生脉冲串。 在比较器中将脉冲的幅度与可变切换阈值进行比较。 为了实现精确的测量结果，并且为了补偿传感器的偏移和长期漂移，如果满足以下条件中的一个或多个，则调整切换阈值：（i）脉冲幅度和切换阈值之间的差超过 （ii）两个连续脉冲的幅度差超过可固定的第二最大值，（iii）连续脉冲的频率差超过可固定的第三最大值。 该方法在机动车辆中特别有利，以检测用于电子点火系统的转速和角位置，或用于ABS制动系统，防滑系统或车辆稳定的车轮的转速和角位置 系统。

公开(公告)号：US06437581B1

公开(公告)日：2002-08-20

申请号：US09558286

申请日：2000-04-25

Applicant: Lothar Blossfeld

Inventor： Lothar Blossfeld

IPC: G01R2700

CPC classification number: G08C19/02

Abstract: Two-wire sensors for measuring physical quantities have only two connections (A1, A2), which serve to connect the power supply and also to conduct the measuring signals. However, because two-wire sensors have the property of controlled current sources, they can be connected only in parallel. Consequently, for a parallel circuit of n two-wire sensors disposed at different locations, two n lines are required. To reduce the number of lines, a two-wire sensor is provided with an end stage (W), which generates an output voltage (UA), which is a measure of the physical quantity measured by a measuring sensor (S) and which is always greater than an adjustable reference voltage signal (Uref). Because the inventive two-wire sensor therefore has the property of a voltage source, several of them can be connected in series. Consequently, even for a series circuit of several two-wire sensors, only two lines are required.

Abstract translation: 用于测量物理量的双线传感器只有两个连接（A1，A2），用于连接电源，并进行测量信号。 然而，因为双线传感器具有受控电流源的特性，所以它们只能并联连接。 因此，对于设置在不同位置的n个双线传感器的并联电路，需要两条n线。 为了减少线数，双线传感器设置有终端（W），其产生输出电压（UA），其是由测量传感器（S）测量的物理量的量度，其是 始终大于可调参考电压信号（Uref）。 因为本发明的双线传感器因此具有电压源的特性，其中几个可以串联连接。 因此，即使对于几根双线传感器的串联电路，也只需要两条线。

公开(公告)号：US06320430B1

公开(公告)日：2001-11-20

申请号：US09675794

申请日：2000-09-29

Applicant: Lothar Blossfeld

Inventor： Lothar Blossfeld

IPC: G11G2702

CPC classification number: G01R19/25

Abstract: A system for processing a signal s(t) from a sensor to recover sensed signal information within the bandwidth of the summation signal, wherein the signal s(t) includes a sensed signal m(t) and an offset signal having a first frequency f1. The system comprises: a sampling device for sampling the signal s(t) at a second frequency f2 that is a multiple of the first frequency f1, to create a sequence of sampled values; and an averaging device for averaging the sequence of sampled values to provide a sequence of averaged sampled values indicative of the sensed signal m(t).

Abstract translation: 一种用于处理来自传感器的信号s（t）的系统，用于恢复在求和信号的带宽内的感测信号信息，其中信号s（t）包括感测信号m（t）和具有第一频率f1 。 该系统包括：采样装置，用于以第一频率f1的倍数的第二频率f2对信号s（t）进行采样，以产生采样值序列; 以及用于平均采样值序列以提供指示感测信号m（t）的平均采样值序列的平均装置。

公开(公告)号：US4992843A

公开(公告)日：1991-02-12

申请号：US433406

申请日：1989-11-03

Applicant: Lothar Blossfeld ,  Christoph Volz

Inventor： Lothar Blossfeld ,  Christoph Volz

IPC: H01L29/73 ,  H01L21/331 ,  H01L21/74 ,  H01L29/417 ,  H01L29/732

CPC classification number: H01L29/41708 ,  H01L21/743 ,  H01L29/7325

Abstract: A collector contact (6) is fabricated which is attached on the side to the collector zone (1), and around which a moat (3) is produced which laterally restricts the collector zone (1). The depth of the moat (3) is so dimensioned to be at least equal to the vertical thickness of the collector zone (1). The collector contact (6) comprises a polycrystalline silicon layer which contains dopants of the same conductivity type as the collector zone (1), and covers a highly doped contacting zone (7') which has been diffused from the adjoining collector contact (6).

Abstract translation: 制造收集器触点（6），该收集器触点（6）附接在收集器区域（1）的一侧，并且围绕该收集器触点（3）横向地限制收集器区域（1）。 护城河（3）的深度的尺寸被设计成至少等于集水区（1）的垂直厚度。 集电极触点（6）包括多晶硅层，其含有与集电区（1）相同的导电类型的掺杂剂，并且覆盖从相邻的集电极触点（6）扩散的高度掺杂的接触区（7'）， 。

公开(公告)号：US4882297A

公开(公告)日：1989-11-21

申请号：US205589

申请日：1988-06-13

Applicant: Lothar Blossfeld

Inventor： Lothar Blossfeld

IPC: H01L29/78 ,  H01L21/28 ,  H01L21/285 ,  H01L21/331 ,  H01L21/768 ,  H01L29/73 ,  H01L29/732

CPC classification number: H01L21/76889 ,  H01L21/28518 ,  Y10S148/019 ,  Y10S148/105 ,  Y10S148/123 ,  Y10S148/124

Abstract: In fabricating the contact, the electrode layer of polycrystalline silicon whose rim portion is bonded via a layer portion of insulating material to the substrate, is used at least throughout the length of a part of its rim portion for the lateral delimitation of a etching process, as an etch mask, in the course of which a frame-shaped layer portion is formed underneath the rim portion of the electrode layer, and the contact area of the substrate as bordering on the layer portion is exposed. Following the deposition of a metal layer of a metal forming a silicide in a thickness smaller than the thickness of the layer portion, and the heating for forming the silicide, the metal which has so far not reacted with the silicon, is removed by using an etching agent selectively dissolving the metal.

Abstract translation: 在制造接触时，其边缘部分经由绝缘材料的层部分结合到基底上的多晶硅的电极层至少在其边缘部分的整个长度上用于蚀刻工艺的横向限定， 作为蚀刻掩模，其中在电极层的边缘部分下方形成框状层部分，并暴露出与层部分相邻的基板的接触面积。 在形成厚度小于层部分厚度的硅化物的金属的金属层沉积之后，以及用于形成硅化物的加热，迄今未与硅反应的金属通过使用 蚀刻剂选择性地溶解金属。

公开(公告)号：US4778774A

公开(公告)日：1988-10-18

申请号：US28472

申请日：1987-03-20

Applicant: Lothar Blossfeld

Inventor： Lothar Blossfeld

IPC: H01L29/73 ,  H01L21/033 ,  H01L21/331 ,  H01L21/60 ,  H01L21/8249 ,  H01L27/06 ,  H01L21/265 ,  H01L21/70

CPC classification number: H01L21/76897 ,  H01L21/033 ,  H01L21/8249 ,  H01L29/66272 ,  Y10S148/009 ,  Y10S148/011

Abstract: The invention includes a method of manufacture of monolithic integrated VLSI circuits comprising bipolar transistors whose base regions are contacted in a self-aligned manner in proximity to the respective emitter regions by the use of silicide layers. The invention starts out from a process which, when using an insulating masking layer portion covering up the emitter area of the planar transistor, permits the self-aligned fabrication of emitter regions extending to the adjoining base region and to the base contacting region. Further embodiments of the process according to the invention permit the simultaneous manufacture of co-integrated CMOS circuits and of polycrystalline. Si-conductor leads whose resistances are reduced owing to the use of silicide layers.

Abstract translation: 本发明包括制造单片集成VLSI电路的方法，其包括双极晶体管，其基极区域通过使用硅化物层以自对准的方式接近相应的发射极区域而接触。 本发明从以下过程开始，当使用覆盖平面晶体管的发射极区域的绝缘屏蔽层部分允许自对准制造延伸到相邻基极区域和基极接触区域的发射极区域。 根据本发明的方法的其它实施方案允许同时制造共同集成的CMOS电路和多晶。 由于使用硅化物层，电阻降低的Si导体引线。

公开(公告)号：US4483738A

公开(公告)日：1984-11-20

申请号：US576866

申请日：1984-02-03

Applicant: Lothar Blossfeld

Inventor： Lothar Blossfeld

IPC: H01L29/73 ,  H01L21/033 ,  H01L21/331 ,  B44C1/22 ,  C03C15/00 ,  H01L27/02

CPC classification number: H01L29/66295 ,  H01L21/0337

Abstract: A method of manufacturing bipolar transistors is described. The emitter areas are protected by means of an oxidation masking layer and subsequently after applying a photo-resist layer which defines the base areas two implantation processes of ions of the base zone conductivity type are performed. The one is performed with low doping dose and high acceleration voltage sufficient to render the masking layer penetrable and the other with high doping dose and low acceleration voltage as to render the masking layer impenetrable.

Abstract translation: 描述制造双极晶体管的方法。 通过氧化屏蔽层来保护发射极区域，并且随后在施加限定基极区域的光致抗蚀剂层之后，执行基极区导电类型的离子的两个注入工艺。 以低掺杂剂量和足够高的加速电压进行该掩模层的渗透，另一个以高掺杂剂量和低加速电压进行，以使掩蔽层不可穿透。