公开(公告)号：US5801381A

公开(公告)日：1998-09-01

申请号：US861118

申请日：1997-05-21

Applicant: Edwin Flecha ,  Kenneth Gilbert Roessler ,  Robert Marshall Stowell

Inventor： Edwin Flecha ,  Kenneth Gilbert Roessler ,  Robert Marshall Stowell

IPC: G01Q20/04 ,  G01Q10/06 ,  G01Q70/00 ,  H01J37/26

CPC classification number: G01Q10/065 ,  B82Y35/00 ,  Y10S977/851

Abstract: A scanning probe microscope includes a detection mechanism producing a feedback signal indicating a condition of engagement between the scanning probe and the surface of a sample being examined. When this engagement is above a threshold level, the lateral scanning movement between the probe and sample is stopped. The scanning movement occurs in incremental movements, and a feedback signal above the threshold level indicates that, if the scanning movement were to continue, the probe could not be moved upward fast enough to prevent a crash condition between the probe and the sample surface. The scanning movement is not re-started until the feedback signal indicates that the probe has been moved far enough away from the sample surface that such a crash condition can be avoided during the next incremental movement.

Abstract translation: 扫描探针显微镜包括产生反馈信号的检测机构，该反馈信号指示扫描探针与正在检查的样品的表面之间的接合状态。 当该接合高于阈值水平时，探针和样品之间的横向扫描运动停止。 扫描运动发生在增量运动中，并且高于阈值水平的反馈信号指示，如果扫描运动持续，则探头不能快速向上移动，以防止探头和样品表面之间的碰撞状况。 直到反馈信号表明探头已经远离样品表面移动足够远的扫描运动才能重新启动，在下一次增量运动期间可以避免这样的碰撞情况。

公开(公告)号：US09228270B2

公开(公告)日：2016-01-05

申请号：US13584343

申请日：2012-08-13

Applicant: Jingbin Feng ,  Marshall Stowell ,  Frederick D. Wilmot

Inventor： Jingbin Feng ,  Marshall Stowell ,  Frederick D. Wilmot

IPC: C25D17/00 ,  C25D7/12 ,  C25D17/06

CPC classification number: C25D17/005 ,  C25D7/123 ,  C25D17/001 ,  C25D17/004 ,  C25D17/007 ,  C25D17/06 ,  C25D17/08 ,  Y10T29/49778

Abstract: Disclosed herein are lipseal assemblies for use in electroplating clamshells which may include an elastomeric lipseal for excluding plating solution from a peripheral region of a semiconductor substrate and one or more electrical contact elements. The contact elements may be structurally integrated with the elastomeric lipseal. The lipseal assemblies may include one or more flexible contact elements at least a portion of which may be conformally positioned on an upper surface of the elastomeric lipseal, and may be configured to flex and form a conformal contact surface that interfaces with the substrate. Some elastomeric lipseals disclosed herein may support, align, and seal a substrate in a clamshell, and may include a flexible elastomeric upper portion located above a flexible elastomeric support edge, the upper portion having a top surface and an inner side surface, the later configured to move inward and align the substrate upon compression of the top surface.

Abstract translation: 本文公开了用于电镀蛤壳的唇形组件，其可包括用于从半导体衬底的周边区域排除电镀溶液的弹性唇形密封件和一个或多个电接触元件。 接触元件可以在结构上与弹性唇形密封结合。 唇密封组件可以包括一个或多个柔性接触元件，其至少一部分可以共形地定位在弹性唇形密封件的上表面上，并且可以构造成弯曲并形成与基底相接合的共形接触表面。 本文公开的一些弹性密封件可以在蛤壳中支撑，对准和密封基底，并且可以包括位于柔性弹性体支撑边缘上方的柔性弹性体上部，上部具有顶表面和内侧表面， 向内移动并在顶表面压缩时对准基板。

公开(公告)号：US08470191B2

公开(公告)日：2013-06-25

申请号：US11890790

申请日：2007-08-06

Applicant: Steven T. Mayer ,  Mark L. Rea ,  Richard S. Hill ,  Avishai Kepten ,  R. Marshall Stowell ,  Eric G. Webb

Inventor： Steven T. Mayer ,  Mark L. Rea ,  Richard S. Hill ,  Avishai Kepten ,  R. Marshall Stowell ,  Eric G. Webb

IPC: C23F1/02

CPC classification number: C25D17/14 ,  B23H5/08 ,  C25D5/02 ,  C25D5/06 ,  C25D5/08 ,  C25D5/34 ,  C25D7/123 ,  C25D17/001 ,  C25D17/06 ,  C25F3/16 ,  C25F3/30 ,  H01L21/02068 ,  H01L21/2885 ,  H01L21/32115 ,  H01L21/3212 ,  H01L21/32134 ,  H01L21/7684 ,  H01L21/76849 ,  H01L21/76877

Abstract: Plating accelerator is applied selectively to a substantially-unfilled wide (e.g., low-aspect-ratio feature cavity. Then, plating of metal is conducted to fill the wide feature cavity and to form an embossed structure in which the height of a wide-feature metal protrusion over the metal-filled wide-feature cavity is higher than the height of metal over field regions. Most of the overburden metal is removed using non-contact techniques, such as chemical wet etching. Metal above the wide feature cavity protects the metal-filled wide-feature interconnect against dishing, and improved planarization techniques avoid erosion of the metal interconnect and dielectric insulating layer. In some embodiments, plating of metal onto a substrate is conducted to fill narrow (e.g., high-aspect-ratio feature cavities) in the dielectric layer before selective application of plating accelerator and filling of the wide feature cavity.

公开(公告)号：US08043958B1

公开(公告)日：2011-10-25

申请号：US12875857

申请日：2010-09-03

Applicant: Jonathan D. Reid ,  Eric G. Webb ,  Edmund B. Minshall ,  Avishai Kepten ,  R. Marshall Stowell ,  Steven T. Mayer

Inventor： Jonathan D. Reid ,  Eric G. Webb ,  Edmund B. Minshall ,  Avishai Kepten ,  R. Marshall Stowell ,  Steven T. Mayer

IPC: H01L21/302 ,  H01L21/461 ,  B24B7/00

CPC classification number: H01L21/7684 ,  C23C18/1607 ,  C23C18/1882 ,  C25D5/02 ,  C25D7/123 ,  H01L21/02074 ,  H01L21/288 ,  H01L21/2885 ,  H01L21/3212 ,  H01L21/32134 ,  H01L21/76831 ,  H01L21/76849 ,  H01L21/76883 ,  Y10S414/135

Abstract: Methods of forming a capping layer on conductive lines in a semiconductor device may be characterized by the following operations: (a) providing a semiconductor substrate comprising a dielectric layer having (i) exposed conductive lines (e.g., copper lines) disposed therein, and (ii) an exposed barrier layer disposed thereon; and (b) depositing a capping layer material on at least the exposed conductive lines of the semiconductor substrate. In certain embodiments, the method may also involve removing at least a portion of a conductive layer (e.g., overburden) disposed over the barrier layer and conductive lines to expose the barrier layer.

Abstract translation: 在半导体器件中的导电线上形成覆盖层的方法的特征在于以下操作：（a）提供包括介电层的半导体衬底，所述电介质层具有（i）设置在其中的暴露的导电线（例如铜线）和（ ii）设置在其上的暴露的阻挡层; 和（b）在所述半导体衬底的至少暴露的导电线上沉积覆盖层材料。 在某些实施例中，该方法还可以包括移除设置在阻挡层和导电线上的导电层（例如，覆盖层）的至少一部分以暴露阻挡层。

公开(公告)号：US07811925B1

公开(公告)日：2010-10-12

申请号：US12184145

申请日：2008-07-31

Applicant: Jonathan D. Reid ,  Eric G. Webb ,  Edmund B. Minshall ,  Avishai Kepten ,  R. Marshall Stowell ,  Steven T. Mayer

Inventor： Jonathan D. Reid ,  Eric G. Webb ,  Edmund B. Minshall ,  Avishai Kepten ,  R. Marshall Stowell ,  Steven T. Mayer

IPC: H01L21/302 ,  H01L21/461 ,  B24B7/00

CPC classification number: H01L21/7684 ,  C23C18/1607 ,  C23C18/1882 ,  C25D5/02 ,  C25D7/123 ,  H01L21/02074 ,  H01L21/288 ,  H01L21/2885 ,  H01L21/3212 ,  H01L21/32134 ,  H01L21/76831 ,  H01L21/76849 ,  H01L21/76883 ,  Y10S414/135

Abstract: Methods of forming a capping layer on conductive lines in a semiconductor device may be characterized by the following operations: (a) providing a semiconductor substrate comprising a dielectric layer having (i) exposed conductive lines (e.g., copper lines) disposed therein, and (ii) an exposed barrier layer disposed thereon; and (b) depositing a capping layer material on at least the exposed conductive lines of the semiconductor substrate. In certain embodiments, the method may also involve removing at least a portion of a conductive layer (e.g., overburden) disposed over the barrier layer and conductive lines to expose the barrier layer.

Abstract translation: 在半导体器件中的导电线上形成覆盖层的方法的特征在于以下操作：（a）提供包括介电层的半导体衬底，所述电介质层具有（i）设置在其中的暴露的导电线（例如铜线）和（ ii）设置在其上的暴露的阻挡层; 和（b）在所述半导体衬底的至少暴露的导电线上沉积覆盖层材料。 在某些实施例中，该方法还可以包括移除设置在阻挡层和导电线上的导电层（例如，覆盖层）的至少一部分以暴露阻挡层。

公开(公告)号：US07690324B1

公开(公告)日：2010-04-06

申请号：US11200338

申请日：2005-08-09

Applicant: Jingbin Feng ,  Steven T. Mayer ,  Daniel Mark Dinneen ,  Edmund B. Minshall ,  Christopher M. Bartlett ,  Eric G. Webb ,  R. Marshall Stowell ,  Mark T. Winslow ,  Avishai Kepten ,  Norman D. Kaplan ,  Richard K. Lyons ,  John B. Alexy

Inventor： Jingbin Feng ,  Steven T. Mayer ,  Daniel Mark Dinneen ,  Edmund B. Minshall ,  Christopher M. Bartlett ,  Eric G. Webb ,  R. Marshall Stowell ,  Mark T. Winslow ,  Avishai Kepten ,  Norman D. Kaplan ,  Richard K. Lyons ,  John B. Alexy

IPC: B05C11/02

CPC classification number: C23C18/1619 ,  H01L21/288 ,  H01L21/6715 ,  H01L21/76841

Abstract: During fluid treatment of a substrate surface, a carrier/wafer assembly containing a substrate wafer closes the top of a microcell container. The carrier/wafer assembly and the container walls define a thin enclosed treatment volume that is filled with treating fluid, such as electroless plating solution. The thin fluid-treatment volume typically has a volume in a range of about from 100 ml to 500 ml. Preferably a container is heated and the treating fluid is pre-heated before being injected into the container. Preferably, the chemical composition, temperature, and other properties of fluid in the thin enclosed fluid-treatment volume are dynamically variable. A rinse shield and a rinse nozzle are located above the container. A carrier/wafer assembly in a rinse position substantially closes the top of the rinse shield.

Abstract translation: 在衬底表面的流体处理期间，包含衬底晶片的载体/晶片组件封闭微孔容器的顶部。 载体/晶片组件和容器壁限定了用处理流体例如化学镀溶液填充的薄封闭处理体积。 薄流体处理体积通常具有在约100ml至500ml范围内的体积。 优选地，将容器加热并且将处理流体在被注入容器之前被预热。 优选地，薄封闭流体处理体积中的流体的化学组成，温度和其它性质是动态可变的。 冲洗屏和冲洗喷嘴位于容器上方。 漂洗位置的载体/晶片组件基本上封闭了冲洗屏蔽的顶部。

公开(公告)号：US06964792B1

公开(公告)日：2005-11-15

申请号：US09927740

申请日：2001-08-10

Applicant: Steven T. Mayer ,  R. Marshall Stowell ,  Evan E. Patton ,  Seshasayee Varadarajan

Inventor： Steven T. Mayer ,  R. Marshall Stowell ,  Evan E. Patton ,  Seshasayee Varadarajan

IPC: B05C3/00 ,  B05D1/18 ,  C25D5/00 ,  C25D5/08 ,  C25D7/12 ,  C25D17/00

CPC classification number: C25D5/08 ,  C25D7/123 ,  C25D17/001 ,  C25D17/008

Abstract: The present invention provides apparatus and methods for controlling flow dynamics of a plating fluid during a plating process. The invention achieves this fluid control through use of a diffuser membrane. Plating fluid is pumped through the membrane; the design and characteristics of the membrane provide a uniform flow pattern to the plating fluid exiting the membrane. Thus a work piece, upon which a metal or other conductive material is to be deposited, is exposed to a uniform flow of plating fluid.

Abstract translation: 本发明提供了一种用于在电镀过程中控制电镀液的流动动力学的装置和方法。 本发明通过使用扩散膜来实现该流体控制。 电镀液被泵送通过膜; 膜的设计和特性为离开膜的电镀液提供均匀的流动模式。 因此，要沉积金属或其他导电材料的工件暴露于电镀液体的均匀流动。

公开(公告)号：US20130042454A1

公开(公告)日：2013-02-21

申请号：US13584343

申请日：2012-08-13

Applicant: Jingbin Feng ,  Marshall Stowell ,  Frederick D. Wilmot

Inventor： Jingbin Feng ,  Marshall Stowell ,  Frederick D. Wilmot

IPC: C25D17/06 ,  B23Q17/00 ,  C25D17/00

CPC classification number: C25D17/005 ,  C25D7/123 ,  C25D17/001 ,  C25D17/004 ,  C25D17/007 ,  C25D17/06 ,  C25D17/08 ,  Y10T29/49778

Abstract: Disclosed herein are lipseal assemblies for use in electroplating clamshells which may include an elastomeric lipseal for excluding plating solution from a peripheral region of a semiconductor substrate and one or more electrical contact elements. The contact elements may be structurally integrated with the elastomeric lipseal. The lipseal assemblies may include one or more flexible contact elements at least a portion of which may be conformally positioned on an upper surface of the elastomeric lipseal, and may be configured to flex and form a conformal contact surface that interfaces with the substrate. Some elastomeric lipseals disclosed herein may support, align, and seal a substrate in a clamshell, and may include a flexible elastomeric upper portion located above a flexible elastomeric support edge, the upper portion having a top surface and an inner side surface, the later configured to move inward and align the substrate upon compression of the top surface.

Abstract translation: 本文公开了用于电镀蛤壳的唇形组件，其可包括用于从半导体衬底的周边区域排除电镀溶液的弹性唇形密封件和一个或多个电接触元件。 接触元件可以在结构上与弹性唇形密封结合。 唇密封组件可以包括一个或多个柔性接触元件，其至少一部分可以共形地定位在弹性唇形密封件的上表面上，并且可以构造成弯曲并形成与基底相接合的共形接触表面。 本文公开的一些弹性密封件可以在蛤壳中支撑，对准和密封基底，并且可以包括位于柔性弹性体支撑边缘上方的柔性弹性体上部，上部具有顶表面和内侧表面， 向内移动并在顶表面压缩时对准基板。

公开(公告)号：USD668211S1

公开(公告)日：2012-10-02

申请号：US29369658

申请日：2010-09-10

Applicant: Jingbin Feng ,  Marshall Stowell

Designer： Jingbin Feng ,  Marshall Stowell

公开(公告)号：US08158532B2

公开(公告)日：2012-04-17

申请号：US11602128

申请日：2006-11-20

Applicant: Steven T. Mayer ,  Mark L. Rea ,  Richard S. Hill ,  Avishai Kepten ,  R. Marshall Stowell ,  Eric G. Webb

Inventor： Steven T. Mayer ,  Mark L. Rea ,  Richard S. Hill ,  Avishai Kepten ,  R. Marshall Stowell ,  Eric G. Webb

IPC: H01L21/302

CPC classification number: C25D17/14 ,  B23H5/08 ,  C25D5/02 ,  C25D5/06 ,  C25D5/08 ,  C25D5/34 ,  C25D7/123 ,  C25D17/001 ,  C25D17/06 ,  C25F3/16 ,  C25F3/30 ,  H01L21/02068 ,  H01L21/2885 ,  H01L21/32115 ,  H01L21/3212 ,  H01L21/32134 ,  H01L21/7684 ,  H01L21/76849 ,  H01L21/76877

Abstract: Plating accelerator is applied selectively to a substantially-unfilled wide (e.g., low-aspect-ratio feature cavity. Then, plating of metal is conducted to fill the wide feature cavity and to form an embossed structure in which the height of a wide-feature metal protrusion over the metal-filled wide-feature cavity is higher than the height of metal over field regions. Most of the overburden metal is removed using non-contact techniques, such as chemical wet etching. Metal above the wide feature cavity protects the metal-filled wide-feature interconnect against dishing, and improved planarization techniques avoid erosion of the metal interconnect and dielectric insulating layer. In some embodiments, plating of metal onto a substrate is conducted to fill narrow (e.g., high-aspect-ratio feature cavities) in the dielectric layer before selective application of plating accelerator and filling of the wide feature cavity.

Abstract translation: 电镀加速器选择性地施加到基本上未填充的宽（例如，低纵横比特征空腔）上，然后进行金属电镀以填充宽特征空腔并形成压花结构，其中宽特征 在金属填充的宽特征空腔上的金属突起高于金属在场区域的高度，大多数覆盖层金属被使用非接触技术（例如化学湿法蚀刻）去除，在宽特征腔上方的金属保护金属 在一些实施例中，将金属电镀到衬底上以填充狭窄（例如，高纵横比特征腔），并且可以避免金属互连和介电绝缘层的侵蚀。 在介电层中选择性地施加电镀加速器和填充宽特征腔。