公开(公告)号：US20100099213A1

公开(公告)日：2010-04-22

申请号：US12579779

申请日：2009-10-15

Applicant: PENG YI WU ,  SHIH CHENG HUANG ,  PO MIN TU ,  YING CHAO YEH ,  WEN YU LIN ,  SHIH HSIUNG CHAN

Inventor： PENG YI WU ,  SHIH CHENG HUANG ,  PO MIN TU ,  YING CHAO YEH ,  WEN YU LIN ,  SHIH HSIUNG CHAN

IPC: H01L21/322 ,  H01L21/28

CPC classification number: H01L21/02521 ,  H01L21/0237 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/0265 ,  H01L33/007 ,  H01L33/12

Abstract: The present invention provides a method for blocking the dislocation propagation of a semiconductor. A semiconductor layer is formed by epitaxial process on a substrate. A plurality of recesses is formed on the semiconductor layer by etching fragile locations of the semiconductor layer where dislocation occurs. Thereafter, a blocking layer is formed on each of the plurality of recesses. The aforesaid semiconductor layer undergoes epitaxial process again on the aforesaid semiconductor layer, and laterally overgrows to redirect the dislocation defects.

Abstract translation: 本发明提供一种阻止半导体位错传播的方法。 在衬底上通过外延工艺形成半导体层。 通过蚀刻发生位错的半导体层的脆弱位置，在半导体层上形成多个凹部。 此后，在多个凹部中的每一个上形成阻挡层。 上述半导体层在上述半导体层上再次进行外延处理，并横向过度地重新定位位错缺陷。

公开(公告)号：US20100019263A1

公开(公告)日：2010-01-28

申请号：US12505711

申请日：2009-07-20

Applicant: YING CHAO YEH ,  SHIH CHENG HUANG ,  PO MIN TU ,  WEN YU LIN ,  PENG YI WU ,  SHIH HSIUNG CHAN

Inventor： YING CHAO YEH ,  SHIH CHENG HUANG ,  PO MIN TU ,  WEN YU LIN ,  PENG YI WU ,  SHIH HSIUNG CHAN

IPC: H01L33/00 ,  H01L21/30

CPC classification number: H01L33/22 ,  H01L21/02458 ,  H01L21/02494 ,  H01L21/0254 ,  H01L21/02573 ,  H01L21/02587 ,  H01L21/0262 ,  H01L33/025 ,  H01L33/32

Abstract: A dual-scale rough structure, in which a plurality of islands are grown on a semiconductor layer by heavily doping a dopant during epitaxy of a semiconductor layer of an optoelectronics device, is provided. A plurality of pin holes are formed on the islands by lowering the epitaxial temperature. The pin holes are distributed over the top and sidewall surfaces of the islands so that the total internal reflection within the optoelectronics device can be significantly reduced so as to enhance the brightness thereof. Compared with traditional technologies, the process method of the present invention has the advantages of producing less pollution, being able to perform easily, reducing manufactured cost, increasing the efficiency of light extraction, and increasing the effective area of the dual-scale emitting surface, which is not a smooth surface, of the structure.

Abstract translation: 提供了一种双尺度粗糙结构，其中通过在光电子器件的半导体层的外延期间重掺杂掺杂剂，在半导体层上生长多个岛。 通过降低外延温度，在岛上形成多个针孔。 针孔分布在岛的顶壁和侧壁表面上，使得光电子器件内的全内反射可以显着地减小，从而增强其亮度。 与传统技术相比，本发明的方法具有污染少，能够容易地实现，降低制造成本，提高光提取效率，增加双尺度发射面有效面积的优点， 这不是一个光滑的表面，结构。

公开(公告)号：US20100019256A1

公开(公告)日：2010-01-28

申请号：US12506688

申请日：2009-07-21

Applicant: PENG YI WU ,  SHIH CHENG HUANG ,  PO MIN TU ,  YING CHAO YEH ,  WEN YU LIN ,  CHIH PENG HSU ,  SHIH HSIUNG CHAN

Inventor： PENG YI WU ,  SHIH CHENG HUANG ,  PO MIN TU ,  YING CHAO YEH ,  WEN YU LIN ,  CHIH PENG HSU ,  SHIH HSIUNG CHAN

IPC: H01L33/00

CPC classification number: H01L33/04 ,  H01L33/32

Abstract: A light emitting device with an electron blocking combination layer comprises an active layer, an n-type GaN layer, a p-type GaN layer, and an electron blocking combination layer which has two Group III-V semiconductor layers with different band gaps that can be deposited periodically and repeatedly on the active layer to block overflowing electrons from the active layers.

Abstract translation: 具有电子阻挡组合层的发光器件包括具有两个具有不同带隙的III-V族半导体层的有源层，n型GaN层，p型GaN层和电子阻挡组合层， 周期性地重复地沉积在有源层上以阻挡来自有源层的溢出电子。

公开(公告)号：US20090278160A1

公开(公告)日：2009-11-12

申请号：US12435984

申请日：2009-05-05

Applicant: WEN YU LIN ,  SHIH CHENG HUANG ,  SHIH HSIUNG CHAN

Inventor： WEN YU LIN ,  SHIH CHENG HUANG ,  SHIH HSIUNG CHAN

IPC: H01L33/00 ,  H01L21/283 ,  H01S5/323

CPC classification number: H01S5/0425 ,  H01L33/025 ,  H01L33/40 ,  H01S5/0421 ,  H01S5/32341

Abstract: The present invention provides a radiation emitting semiconductor device, which comprises an active layer for emitting radiation, a p-type conductive layer, a transparent conductive layer, and a non-p-type ohmic contact layer. The p-type conductive layer is formed on the active layer. The transparent conductive layer is formed on the p-type conductive layer. The non-p-type ohmic contact layer is disposed between said p-type conductive layer and said transparent conductive layer. The non-p-type ohmic contact layer is configured to reduce the operating voltage of said radiation emitting semiconductor device. In addition, the present invention provides that the non-p-type ohmic contact layer is made of a quaternary alloy of AlxInyGa1-x-yN. The aluminum composition in the quaternary alloy of AlxInyGa1-x-yN can be used to adjust the band gap energy of the quaternary alloy such that the band gap energy of the quaternary alloy is larger than that of the active layer, thereby reducing the absorption of radiation by the non-p-type ohmic contact layer.

Abstract translation: 本发明提供一种辐射发射半导体器件，其包括用于发射辐射的有源层，p型导电层，透明导电层和非p型欧姆接触层。 p型导电层形成在有源层上。 透明导电层形成在p型导电层上。 非p型欧姆接触层设置在所述p型导电层和所述透明导电层之间。 非p型欧姆接触层被配置为降低所述辐射发射半导体器件的工作电压。 此外，本发明提供非p-型欧姆接触层由Al x In y Ga 1-x-y N的四元合金制成。 可以使用Al x In y Ga 1-x-y N的四元合金中的铝组成来调节四元合金的带隙能量，使得四元合金的带隙能量大于活性层的带隙能量，从而降低 由非p型欧姆接触层辐射。

公开(公告)号：US20090121214A1

公开(公告)日：2009-05-14

申请号：US12268650

申请日：2008-11-11

Applicant: Po Min Tu ,  Shih Cheng Huang ,  Ying Chao Yeh ,  Wen Yu Lin ,  Peng Yi Wu ,  Chih Peng Hsu ,  Shih Hsiung Chan

Inventor： Po Min Tu ,  Shih Cheng Huang ,  Ying Chao Yeh ,  Wen Yu Lin ,  Peng Yi Wu ,  Chih Peng Hsu ,  Shih Hsiung Chan

IPC: H01L33/00

CPC classification number: H01L33/22 ,  H01L21/02658 ,  H01L33/06 ,  H01L33/32

Abstract: A semiconductor light-emitting device comprises a substrate, a buffer layer, an n-type semiconductor layer, a conformational active layer and a p-type semiconductor layer. The n-type semiconductor layer includes a first surface and a second surface, and the first surface directly contacts the buffer layer. The second surface has a plurality of recesses, and a conformational active layer formed on the second surface and within the plurality of recesses. Therefore, the stress between the n-type semiconductor layer and the conformational active layer can be released with the recesses.

Abstract translation: 半导体发光器件包括衬底，缓冲层，n型半导体层，构象活性层和p型半导体层。 n型半导体层包括第一表面和第二表面，并且第一表面直接接触缓冲层。 第二表面具有多个凹部，以及形成在第二表面上和多个凹部内的构象活性层。 因此，可以用凹部来释放n型半导体层与构象活性层之间的应力。

公开(公告)号：US20140027806A1

公开(公告)日：2014-01-30

申请号：US14037386

申请日：2013-09-26

Applicant: SHIH-CHENG HUANG ,  PO-MIN TU ,  PENG-YI WU ,  WEN-YU LIN ,  CHIH-PANG MA ,  TZU-CHIEN HUNG ,  CHIA-HUI SHEN

Inventor： SHIH-CHENG HUANG ,  PO-MIN TU ,  PENG-YI WU ,  WEN-YU LIN ,  CHIH-PANG MA ,  TZU-CHIEN HUNG ,  CHIA-HUI SHEN

IPC: H01L33/36

CPC classification number: H01L33/36 ,  H01L33/007 ,  H01L33/0095 ,  H01L33/10 ,  H01L33/20 ,  H01L33/22

Abstract: A semiconductor optoelectronic structure with increased light extraction efficiency, includes a substrate; a buffer layer is formed on the substrate and includes a pattern having plural grooves formed adjacent to the substrate; a semiconductor layer is formed on the buffer layer and includes an n-type conductive layer formed on the buffer layer, an active layer formed on the n-type conductive layer, and a p-type conductive layer formed on the active layer; a transparent electrically conductive layer is formed on the semiconductor layer; a p-type electrode is formed on the transparent electrically conductive layer; and an n-type electrode is formed on the n-type conductive layer.

Abstract translation: 具有提高光提取效率的半导体光电子结构包括基片; 在基板上形成缓冲层，并具有与基板相邻形成有多个槽的图案， 在缓冲层上形成半导体层，在缓冲层上形成n型导体层，在n型导电层上形成有源层，在活性层上形成p型导电层。 在半导体层上形成透明导电层; 在透明导电层上形成p型电极; 在n型导电层上形成n型电极。

公开(公告)号：US08581283B2

公开(公告)日：2013-11-12

申请号：US13015590

申请日：2011-01-28

Applicant: Po-Min Tu ,  Shih-Cheng Huang ,  Wen-Yu Lin ,  Chih-Peng Hsu ,  Shih-Hsiung Chan

Inventor： Po-Min Tu ,  Shih-Cheng Huang ,  Wen-Yu Lin ,  Chih-Peng Hsu ,  Shih-Hsiung Chan

IPC: H01L33/10

CPC classification number: H01L33/007 ,  H01L21/0237 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02639 ,  H01L21/0265

Abstract: A photoelectric device having Group III nitride semiconductor includes a conductive layer, a metallic mirror layer located on the conductive layer, and a Group III nitride semiconductor layer located on the metallic mirror layer. The Group III nitride semiconductor layer defines a number of microstructures thereon. Each microstructure includes at least one angled face, and the angled face of each microstructure is a crystal face of the Group III nitride semiconductor layer.

Abstract translation: 具有III族氮化物半导体的光电器件包括导电层，位于导电层上的金属镜层和位于金属镜面层上的III族氮化物半导体层。 III族氮化物半导体层在其上限定了许多微结构。 每个微结构包括至少一个成角度的面，并且每个微结构的倾斜面是III族氮化物半导体层的晶体面。

公开(公告)号：US20120231154A1

公开(公告)日：2012-09-13

申请号：US13353322

申请日：2012-01-19

Applicant: Wen-Hsiung Liao ,  Wen-Yu Lin ,  Wei-Chien Chang

Inventor： Wen-Hsiung Liao ,  Wen-Yu Lin ,  Wei-Chien Chang

IPC: H05K3/12 ,  H05K3/10

CPC classification number: H05K3/1258 ,  H05K3/4629 ,  H05K3/4685

Abstract: A method for fabricating a ceramic device is provided. A green sheet is adhered on an adhesive film. A photoresist film is then formed on the green sheet. A photolithographic process is carried out to form circuit trenches in the photoresist film. The circuit trenches are filled with metal paste, thereby forming a circuit pattern. The photoresist film is then removed.

Abstract translation: 提供一种制造陶瓷器件的方法。 生片粘附在粘合膜上。 然后在生片上形成光致抗蚀剂膜。 进行光刻工艺以在光致抗蚀剂膜中形成电路沟槽。 电路沟槽填充有金属膏，从而形成电路图案。 然后除去光致抗蚀剂膜。

公开(公告)号：US08174842B2

公开(公告)日：2012-05-08

申请号：US12495818

申请日：2009-07-01

Applicant: Hung-Yi Ou Yang ,  Wen-Yu Lin

Inventor： Hung-Yi Ou Yang ,  Wen-Yu Lin

IPC: H05K7/02 ,  H05K7/06 ,  H05K7/08 ,  H05K7/10

CPC classification number: H05B33/0803 ,  F21K9/00 ,  F21V23/06 ,  F21Y2105/10 ,  F21Y2115/10 ,  H01R12/79 ,  H05K1/148

Abstract: A light-emitting diode (LED) module includes a plurality of LED units and a converter having a first side. The LED units respectively include a circuit board having a second side perpendicular to the first side and a third side parallel to the first side, a plurality of LEDs positioned on the circuit board, and a connector positioned on the second side proximal to the converter. The LED module further includes a plurality of flexible flat cables (FFCs) used to electrically connect the connectors to the converter, respectively.

Abstract translation: 发光二极管（LED）模块包括多个LED单元和具有第一侧的转换器。 LED单元分别包括具有垂直于第一侧的第二侧和与第一侧平行的第三侧的电路板，位于电路板上的多个LED以及位于转换器附近的第二侧的连接器。 LED模块还包括分别用于将连接器电连接到转换器的多个柔性扁平电缆（FFC）。

公开(公告)号：US08148246B2

公开(公告)日：2012-04-03

申请号：US12437058

申请日：2009-05-07

Applicant: Wen Yu Lin ,  Shih Cheng Huang ,  Po Min Tu ,  Chih Peng Hsu ,  Shih Hsiung Chan

Inventor： Wen Yu Lin ,  Shih Cheng Huang ,  Po Min Tu ,  Chih Peng Hsu ,  Shih Hsiung Chan

IPC: H01L21/20

CPC classification number: H01L21/76256

Abstract: A method for separating a semiconductor from a substrate is disclosed. The method comprises the following steps: forming a plurality of columns on a substrate; epitaxially growing a semiconductor on the plurality of columns; and injecting etching liquid into the void among the plurality of columns so as to separate the semiconductor from the substrate. The method of this invention can enhance the etching efficiency of separating the semiconductor from the substrate and reduce the fabrication cost because the etching area is increased due to the void among the plurality of columns. In addition, the method will not confine the material of the above-mentioned substrate.

Abstract translation: 公开了一种从衬底分离半导体的方法。 该方法包括以下步骤：在衬底上形成多个柱; 在多个柱上外延生长半导体; 并将蚀刻液注入到多个列之间的空隙中，以将半导体与基板分离。 本发明的方法可以提高从衬底分离半导体的蚀刻效率，并降低制造成本，因为蚀刻区域由于多个色谱柱之间的空隙而增加。 此外，该方法不会限制上述衬底的材料。