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    METHOD AND APPARATUS TO REDUCE FEATURE CHARGING IN PLASMA PROCESSING CHAMBER
    11.
    发明申请
    METHOD AND APPARATUS TO REDUCE FEATURE CHARGING IN PLASMA PROCESSING CHAMBER 有权

    公开(公告)号：US20220399183A1

    公开(公告)日：2022-12-15

    申请号：US17352176

    申请日：2021-06-18

    Applicant: Applied Materials, Inc.

    Inventor： Linying CUI ,  James ROGERS ,  Rajinder DHINDSA ,  Kartik RAMASWAMY

    IPC: H01J37/32 ,  H01J37/305 ,  H01L21/3065

    Abstract: Embodiments provided herein include an apparatus and methods for the plasma processing of a substrate in a processing chamber. In some embodiments, aspects of the apparatus and methods are directed to reducing defectivity in features formed on the surface of the substrate, improving plasma etch rate, and increasing selectivity of etching material to mask and/or etching material to stop layer. In some embodiments, the apparatus and methods enable processes that can be used to prevent or reduce the effect of trapped charges, disposed within features formed on a substrate, on the etch rate and defect formation. In some embodiments, the plasma processing methods include the synchronization of the delivery of pulsed-voltage (PV) waveforms, and alternately the delivery of a PV waveform and a radio frequency (RF) waveform, so as to allow for the independent control of generation of electrons that are provided, during one or more stages of a PV waveform cycle, to neutralize the trapped charges formed in the features formed on the substrate.

    LIFT PIN MECHANISM
    12.
    发明申请
    LIFT PIN MECHANISM 有权

    公开(公告)号：US20220293452A1

    公开(公告)日：2022-09-15

    申请号：US17688712

    申请日：2022-03-07

    Applicant: Applied Materials, Inc.

    Inventor： Alexander SULYMAN ,  Carlaton WONG ,  Rajinder DHINDSA ,  Timothy Joseph FRANKLIN ,  Steven BABAYAN ,  Anwar HUSAIN ,  James Hugh ROGERS ,  Xue Yang CHANG

    IPC: H01L21/687 ,  H01L21/683

    Abstract: Methods and apparatus for a lift pin mechanism for substrate processing chambers are provided herein. In some embodiments, the lift pin mechanism includes a lift pin comprising a shaft with a top end, a bottom end, and a coupling end at the bottom end; a bellows assembly disposed about the shaft. The bellows assembly includes an upper bellows flange having an opening for axial movement of the shaft; a bellows having a first end coupled to a lower surface of the upper bellows flange such that the shaft extends into a central volume surrounded by the bellows; and a bellows guide assembly coupled to a second end of the bellows to seal the central volume. The shaft is coupled to the bellows guide assembly at the coupling end. The bellows guide assembly is axially movable to move the lift pin with respect to the upper bellows flange.

    HIGH VOLTAGE FILTER ASSEMBLY
    15.
    发明申请
    HIGH VOLTAGE FILTER ASSEMBLY 审中-公开

    公开(公告)号：US20200243303A1

    公开(公告)日：2020-07-30

    申请号：US16355153

    申请日：2019-03-15

    Applicant: Applied Materials, Inc.

    Inventor： Anurag Kumar MISHRA ,  James ROGERS ,  Leonid DORF ,  Rajinder DHINDSA ,  Olivier LUERE

    IPC: H01J37/32 ,  H01L21/683

    Abstract: Embodiments described herein are applicable for use in all types of plasma assisted or plasma enhanced processing chambers and also for methods of plasma assisted or plasma enhanced processing of a substrate. More specifically, embodiments of this disclosure include a broadband filter assembly, also referred to herein as a filter assembly, that is configured to reduce and/or prevent RF leakage currents from being transferred from one or more RF driven components to a ground through other electrical components that are directly or indirectly electrically coupled to the RF driven components and ground with high input impedance (low current loss) making it compatible with shaped DC pulse bias applications.

    WAFER EDGE RING LIFTING SOLUTION
    17.
    发明申请
    WAFER EDGE RING LIFTING SOLUTION 有权

    公开(公告)号：US20240429088A1

    公开(公告)日：2024-12-26

    申请号：US18823303

    申请日：2024-09-03

    Applicant: Applied Materials, Inc.

    Inventor： Michael R. RICE ,  Yogananda SARODE VISHWANATH ,  Sunil SRINIVASAN ,  Rajinder DHINDSA ,  Steven E. BABAYAN ,  Olivier LUERE ,  Denis Martin KOOSAU ,  Imad YOUSIF

    IPC: H01L21/687 ,  H01J37/32 ,  H01L21/67 ,  H01L21/683

    Abstract: Apparatuses including a height-adjustable edge ring, and methods for use thereof are described herein. In one example, a process kit for processing a substrate is provided. The process kit has a support ring comprising an upper surface having an inner edge disposed at a first height and an outward edge disposed at a second height less than the first height, the inner edge having a greater thickness than the outward edge. An edge ring is disposed on the support ring, an inner surface of the edge ring interfaced with the inner edge of the support ring. A cover ring is disposed outward of the edge ring, the edge ring independently moveable relative to the support ring and the cover ring. Push pins are disposed inward of the cover ring, the push pins operable to elevate the edge ring while constraining radial movement of the support ring.

    MULTI-ELECTRODE SOURCE ASSEMBLY FOR PLASMA PROCESSING
    18.
    发明公开
    MULTI-ELECTRODE SOURCE ASSEMBLY FOR PLASMA PROCESSING 审中-公开

    公开(公告)号：US20240355586A1

    公开(公告)日：2024-10-24

    申请号：US18138730

    申请日：2023-04-24

    Applicant: Applied Materials, Inc.

    Inventor： Linying CUI ,  James ROGERS ,  Rajinder DHINDSA

    IPC: H01J37/32

    CPC classification number: H01J37/32183 ,  H01J37/32128 ,  H01J37/32568 ,  H01J2237/3343

    Abstract: Apparatus and methods for controlling the uniformity of a plasma formed using a radio frequency (RF) source power assembly that includes one or more resonant tuning circuits coupled to two or more electrodes disposed within a multi-electrode source assembly. Improved plasma uniformity control and reduced system cost are achieved by eliminating multiple RF generators and matches that power the multiple electrodes separately. Multiple frequencies may also be provided to multiple electrodes at the same time, which can include another cost savings when using a multi-frequency RF source assembly. Local plasma density and sheath voltage over a surface of a substrate are controlled with segmented electrodes disposed within the processing region of a plasma processing chamber. The ion flux and direction, as well as energetic electron flux towards the substrate, are controlled to address the plasma non-uniformity and global tilt during processing of a semiconductor substrate.

    PLASMA PROCESSING CHAMBERS CONFIGURED FOR TUNABLE SUBSTRATE AND EDGE SHEATH CONTROL
    20.
    发明申请
    PLASMA PROCESSING CHAMBERS CONFIGURED FOR TUNABLE SUBSTRATE AND EDGE SHEATH CONTROL 有权

    公开(公告)号：US20230130986A1

    公开(公告)日：2023-04-27

    申请号：US17970451

    申请日：2022-10-20

    Applicant: Applied Materials, Inc.

    Inventor： Rajinder DHINDSA

    IPC: H01J37/32

    Abstract: Embodiments herein provide plasma processing chambers and methods configured for fine-tuning and control over a plasma sheath formed during the plasma-assisted processing of a semiconductor substrate. Embodiments include a sheath tuning scheme, including plasma processing chambers and methods, which can be used to tailor one or more characteristics of a plasma sheath formed between a bulk plasma and a substrate surface. Generally, the sheath tuning scheme provides differently configured pulsed voltage (PV) waveforms to a plurality of bias electrodes embedded beneath the surface of a substrate support in an arrangement where each of the electrodes can be used to differentially bias a surface region of a substrate positioned on the support. The sheath tuning scheme disclosed herein can thus be used to adjust and/or control the directionality, and energy and angular distributions of ions that bombard a substrate surface during a plasma-assisted etch process.

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