公开(公告)号：US09947582B1

公开(公告)日：2018-04-17

申请号：US15612962

申请日：2017-06-02

Applicant: ASM IP HOLDING B.V.

Inventor： Aurélie Kuroda ,  Shang Chen ,  Takahiro Onuma ,  Dai Ishikawa

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/522

CPC classification number: H01L21/76888 ,  H01L21/76849 ,  H01L23/53238

Abstract: Processes are provided herein for protecting metal thin films from oxidation when exposed to an oxidizing environment, such as the ambient atmosphere. The processes may comprise a protective treatment including exposing the metal thin film to a silicon-containing precursor at a temperature of about 200° C. or less in order to selectively adsorb a silicon-containing protective layer on the metal thin film. The silicon-containing protective layer may reduce or substantially prevent the underlying metal thin film from oxidation.

公开(公告)号：US09805974B1

公开(公告)日：2017-10-31

申请号：US15177198

申请日：2016-06-08

Applicant: ASM IP Holding B.V.

Inventor： Shang Chen ,  Toshiharu Watarai ,  Takahiro Onuma ,  Dai Ishikawa ,  Kunitoshi Namba

IPC: H01L21/768 ,  H01L21/3205 ,  H01L23/532

CPC classification number: H01L21/7685 ,  C23C16/04 ,  C23C16/08 ,  C23C16/4404 ,  C23C16/45523 ,  H01L21/28562 ,  H01L21/32051 ,  H01L21/32055 ,  H01L21/76823 ,  H01L21/76826 ,  H01L21/76849 ,  H01L21/76883 ,  H01L23/53228 ,  H01L23/53266

Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.

公开(公告)号：US09478414B2

公开(公告)日：2016-10-25

申请号：US14498036

申请日：2014-09-26

Applicant: ASM IP Holding B.V.

Inventor： Akiko Kobayashi ,  Akinori Nakano ,  Dai Ishikawa ,  Kiyohiro Matsushita

IPC: H01L21/02 ,  H01L21/3105

CPC classification number: H01L21/0228 ,  C23C16/45542 ,  C23C16/56 ,  H01L21/02126 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/0234 ,  H01L21/02359 ,  H01L21/02362 ,  H01L21/3105

Abstract: A method is for hydrophobization of a surface of a silicon-containing film by atomic layer deposition (ALD), wherein the surface is subjected to atmospheric exposure. The method includes: (i) providing a substrate with a silicon-containing film formed thereon; and (ii) forming on a surface of the silicon-containing film a hydrophobic atomic layer as a protective layer subjected to atmospheric exposure, by exposing the surface to a silicon-containing treating gas without exciting the gas. The treating gas is capable of being chemisorbed on the surface to form a hydrophobic atomic layer thereon.

Abstract translation: 一种方法是通过原子层沉积（ALD）使含硅膜的表面疏水化，其中该表面经受大气暴露。 该方法包括：（i）向基板提供其上形成的含硅膜; 和（ii）通过将表面暴露于含硅处理气体而不使气体激发，在作为经受大气暴露的保护层的疏水性原子层的表面上形成含硅膜的表面。 处理气体能够在表面上被化学吸附以在其上形成疏水原子层。

公开(公告)号：US09190263B2

公开(公告)日：2015-11-17

申请号：US13973777

申请日：2013-08-22

Applicant: ASM IP Holding B.V.

Inventor： Dai Ishikawa ,  Kiyohiro Matsushita ,  Akinori Nakano ,  Shintaro Ueda ,  Hirofumi Arai

IPC: H01L21/31 ,  H01L21/469 ,  H01L21/02 ,  H01L21/67

CPC classification number: H01L21/02126 ,  H01L21/02216 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/02323 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/02348 ,  H01L21/67115 ,  H01L21/67207

Abstract: A method for forming a modified low-k SiOCH film on a substrate, includes: providing a low-k SiOCH film formed on a substrate by flowable CVD; exposing the low-k SiOCH film to a gas containing a Si—N bond in its molecule without applying electromagnetic energy to increase Si—O bonds and/or Si—C bonds in the film; and then curing the low-k SiOCH film.

Abstract translation: 在衬底上形成修饰的低k SiOCH膜的方法包括：通过可流动CVD提供在衬底上形成的低k SiOCH膜; 将低k SiOCH膜暴露于其分子中含有Si-N键的气体，而不施加电磁能以增加膜中的Si-O键和/或Si-C键; 然后固化低k SiOCH膜。

公开(公告)号：US09029272B1

公开(公告)日：2015-05-12

申请号：US14069244

申请日：2013-10-31

Applicant: ASM IP Holding B.V.

Inventor： Akinori Nakano ,  Shintaro Ueda ,  Dai Ishikawa ,  Kiyohiro Matsushita

IPC: H01L21/02

CPC classification number: H01L21/02126 ,  H01L21/02274 ,  H01L21/02277 ,  H01L21/0234 ,  H01L21/02348

Abstract: A method for forming a gap-fill SiOCH film on a patterned substrate includes: (i) providing a substrate having recessed features on its surface; (ii) filling the recessed features of the substrate with a SiOCH film which is flowable and non-porous; (iii) after completion of step (ii), exposing the SiOCH film to a plasma including a hydrogen plasma; and (iv) curing the plasma-exposed SiOCH film with UV light.

Abstract translation: 在图案化衬底上形成间隙填充SiOCH膜的方法包括：（i）提供在其表面上具有凹陷特征的衬底; （ii）用可流动且无孔的SiOCH膜填充基底的凹陷特征; （iii）步骤（ii）完成后，将SiOCH膜暴露于包括氢等离子体的等离子体; 和（iv）用UV光固化等离子体暴露的SiOCH膜。

公开(公告)号：US20150056821A1

公开(公告)日：2015-02-26

申请号：US13973777

申请日：2013-08-22

Applicant: ASM IP Holding B.V.

Inventor： Dai Ishikawa ,  Kiyohiro Matsushita ,  Akinori Nakano ,  Shintaro Ueda ,  Hirofumi Arai

IPC: H01L21/02

CPC classification number: H01L21/02126 ,  H01L21/02216 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/02323 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/02348 ,  H01L21/67115 ,  H01L21/67207

Abstract: A method for forming a modified low-k SiOCH film on a substrate, includes: providing a low-k SiOCH film formed on a substrate by flowable CVD; exposing the low-k SiOCH film to a gas containing a Si—N bond in its molecule without applying electromagnetic energy to increase Si—O bonds and/or Si—C bonds in the film; and then curing the low-k SiOCH film.

Abstract translation: 在衬底上形成修饰的低k SiOCH膜的方法包括：通过可流动CVD提供在衬底上形成的低k SiOCH膜; 将低k SiOCH膜暴露于其分子中含有Si-N键的气体，而不施加电磁能以增加膜中的Si-O键和/或Si-C键; 然后固化低k SiOCH膜。

公开(公告)号：US10793946B1

公开(公告)日：2020-10-06

申请号：US16676017

申请日：2019-11-06

Applicant: ASM IP Holding B.V.

Inventor： Delphine Longrie ,  Antti Juhani Niskanen ,  Han Wang ,  Qi Xie ,  Jan Willem Maes ,  Shang Chen ,  Toshiharu Watarai ,  Takahiro Onuma ,  Dai Ishikawa ,  Kunitoshi Namba

IPC: C23C16/02 ,  C23C16/06 ,  C23C16/34 ,  C23C16/44 ,  C23C16/455 ,  H01L21/768 ,  H01L21/285 ,  C23C16/56

Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.

公开(公告)号：US20200118811A1

公开(公告)日：2020-04-16

申请号：US16161744

申请日：2018-10-16

Applicant: ASM IP Holding B.V.

Inventor： Mitsuya Utsuno ,  Tomohiro Kubota ,  Dai Ishikawa

IPC: H01L21/027 ,  H01L21/311

Abstract: Methods for etching a carbon-containing feature are provided. The methods may include: providing a substrate having a carbon-containing feature formed thereon in a reaction space; supplying helium gas and an oxidizing to the reaction space; generating a plasma within the reaction space from a gas mixture comprising helium gas and the oxidizing gas; and anisotropically etching the carbon-containing feature utilizing the plasma to cause lateral etching of the carbon-containing feature.

公开(公告)号：US10529554B2

公开(公告)日：2020-01-07

申请号：US15592730

申请日：2017-05-11

Applicant: ASM IP Holding B.V.

Inventor： Dai Ishikawa ,  Atsuki Fukazawa ,  Eiichiro Shiba ,  Shinya Ueda ,  Taishi Ebisudani ,  SeungJu Chun ,  YongMin Yoo ,  YoonKi Min ,  SeYong Kim ,  JongWan Choi

IPC: H01L21/02 ,  H01L21/306 ,  H01L21/311

Abstract: A method for fabricating a layer structure in a trench includes: simultaneously forming a dielectric film containing a Si—N bond on an upper surface, and a bottom surface and sidewalls of the trench, wherein a top/bottom portion of the film formed on the upper surface and the bottom surface and a sidewall portion of the film formed on the sidewalls are given different chemical resistance properties by bombardment of a plasma excited by applying voltage between two electrodes between which the substrate is place in parallel to the two electrodes; and substantially removing either one of but not both of the top/bottom portion and the sidewall portion of the film by wet etching which removes the one of the top/bottom portion and the sidewall portion of the film more predominantly than the other according to the different chemical resistance properties.

公开(公告)号：US10014212B2

公开(公告)日：2018-07-03

申请号：US15622510

申请日：2017-06-14

Applicant: ASM IP HOLDING B.V.

Inventor： Shang Chen ,  Toshiharu Watarai ,  Takahiro Onuma ,  Dai Ishikawa ,  Kunitoshi Namba

IPC: H01L21/768 ,  H01L21/285 ,  H01L23/532

CPC classification number: H01L21/7685 ,  H01L21/02068 ,  H01L21/28562 ,  H01L21/28568 ,  H01L21/3105 ,  H01L21/76823 ,  H01L21/76826 ,  H01L21/76849 ,  H01L21/76868 ,  H01L21/76883 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/53266

Abstract: Metallic layers can be selectively deposited on one surface of a substrate relative to a second surface of the substrate. In some embodiments, the metallic layers are selectively deposited on a first metallic surface relative to a second surface comprising silicon. In some embodiments the reaction chamber in which the selective deposition occurs may optionally be passivated prior to carrying out the selective deposition process. In some embodiments selectivity of above about 50% or even about 90% is achieved.