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11.发明授权公开(公告)号：US06891430B1
公开(公告)日：2005-05-10
申请号：US09695706
申请日：2000-10-25
申请人： Axel Thomsen , Edwin De Angel , Sherry Wu , Lei Wang , Aryesh Amar
发明人： Axel Thomsen , Edwin De Angel , Sherry Wu , Lei Wang , Aryesh Amar
摘要： A signal processing integrated circuit has having a chopper stabilized, multistage, feedforward amplifier and a delta sigma analog to digital converter. Filtering of the output of the output from the analog to digital converter comprises a sinc5 filter and a sinc3 filter. The sinc3 filter may be bypassed. A rough buffer permits quick charging of a sample and hold capacitor during part of the charge cycle and slower but more accurate charging during the remainder of the charge cycle.
摘要翻译： 信号处理集成电路具有斩波稳定的多级前馈放大器和ΔΣ模数转换器。 从模数转换器输出的输出的滤波包括一个Sinc＆lt; 5＆gt;滤波器和一个sinc＆lt; 3＆gt; 3滤波器。 可以绕过sinc <3> 3滤波器。 一个粗略的缓冲器允许在充电周期的一部分期间快速充电一个采样和保持电容器，并且在充电周期的剩余时间内可以进行更慢但更精确的充电。
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12.发明授权Techniques for implementing a rough buffer for charging a sampling capacitor 有权实现用于对采样电容器充电的粗略缓冲器的技术公开(公告)号：US06480041B1
公开(公告)日：2002-11-12
申请号：US09695702
申请日：2000-10-25
申请人： Axel Thomsen , Lei Wang
发明人： Axel Thomsen , Lei Wang
IPC分类号： H03K500
摘要： A buffer arrangement uses separate amplifiers for handling for positive going signal transitions and for negative going signal transitions respectively. A comparator detects the direction of transition and a switching element connects signal input lines in the appropriate sense to the respective amplifiers based on the output of the comparator. This permits amplifiers optimized for positive or negative going transitions to be used. The output of the amplifiers can be connected across a sampling capacitor
摘要翻译： 缓冲器配置使用单独的放大器来分别处理正向信号转换和负向信号转换。 比较器检测转换方向，并且开关元件基于比较器的输出将适当意义上的信号输入线连接到相应的放大器。 这允许使用针对正向或负向过渡进行优化的放大器。 放大器的输出可以跨采样电容连接
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13.发明授权
公开(公告)号：US6124816A
公开(公告)日：2000-09-26
申请号：US89497
申请日：1998-06-02
申请人： Wai Laing Lee , Axel Thomsen , Lei Wang , Dan Kasha
发明人： Wai Laing Lee , Axel Thomsen , Lei Wang , Dan Kasha
CPC分类号： H03M3/508
摘要： A digital to analog converter utilizes two discrete time processing stages, such as switched capacitor integrator circuits, operating at different sampling rates when converting the digital input signal to an analog signal. Use of two different sampling rates relaxes the requirements on antialias filters used in the continuous time processing.
摘要翻译： 数模转换器利用两个离散的时间处理级，例如开关电容积分电路，在将数字输入信号转换为模拟信号时，以不同的采样率工作。 使用两种不同的采样率可以放松对连续时间处理中使用的抗混叠滤波器的要求。
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14.发明授权Digital to analog converter for correcting for non-linearities in analog devices 失效用于校正模拟设备中非线性的数模转换器
公开(公告)号：US6124815A
公开(公告)日：2000-09-26
申请号：US89495
申请日：1998-06-02
申请人： Wai Laing Lee , Axel Thomsen , Lei Wang , Dan Kasha
发明人： Wai Laing Lee , Axel Thomsen , Lei Wang , Dan Kasha
摘要： A integrated circuit digital to analog converter converts an M-bit digital signal to an analog output signal. The analog output signal can be used to drive external devices such as an off-chip driver. The output of the external device is sampled and fed back across the discrete time/continuous time interface on the chip to the input of the analog to digital converter. Taking the feedback point after the external device ensures relatively high performance for noise and linearity using relatively low performance components, both on and off the chip.
摘要翻译： 集成电路数模转换器将M位数字信号转换为模拟输出信号。 模拟输出信号可用于驱动外部设备，如片外驱动器。 对外部器件的输出进行采样，并将芯片上的离散时间/连续时间接口反馈到模数转换器的输入端。 在外部器件之后采取反馈点，使用相对较低性能的器件（芯片上和芯片上），确保噪声和线性度的相对较高的性能。
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15.发明授权
公开(公告)号：US6124814A
公开(公告)日：2000-09-26
申请号：US89490
申请日：1998-06-02
申请人： Wai Laing Lee , Axel Thomsen , Lei Wang , Dan Kasha
发明人： Wai Laing Lee , Axel Thomsen , Lei Wang , Dan Kasha
摘要： A digital to analog converter converts an N-bit digital signal into an M-bit digital signal and provides the M-bit digital signal to a conversion circuit which converts the M-bit signal to an analog output signal. The analog output signal is sampled and fed back across the discrete time/continuous time interface to the input of the conversion circuit. An interpolation filter is used to increase the apparent sampling rate of the incoming N-bit signal.
摘要翻译： 数模转换器将N位数字信号转换为M位数字信号，并将M位数字信号提供给将M位信号转换为模拟输出信号的转换电路。 模拟输出信号被采样并通过离散时间/连续时间接口反馈到转换电路的输入端。 内插滤波器用于增加输入N位信号的表观采样率。
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16.发明授权One bit digital to analog converter with feedback across the discrete time/continuous time interface 失效一个位数字到模拟转换器，具有跨越离散时间/连续时间接口的反馈
公开(公告)号：US6121909A
公开(公告)日：2000-09-19
申请号：US89488
申请日：1998-06-02
申请人： Wai Laing Lee , Axel Thomsen , Lei Wang , Dan Kasha
发明人： Wai Laing Lee , Axel Thomsen , Lei Wang , Dan Kasha
CPC分类号： H03M3/50
摘要： A 1-bit digital to analog converter uses both discrete time and continuous time processing to produce an analog output signal. The analog output signal is sampled and fed back across the discrete time/continuous time interface to the input of the conversion circuit. In one implementation, the discrete time processing uses an integrator chain of switched capacitor integrators and a switched capacitor low pass filter. The continuous time processor is a 2 pole low pass filter. A finite impulse response filter can precede the discrete time processing. A plurality of analog output sampling arrangements can be selectively applied accommodate a variety of operational conditions.
摘要翻译： 1位数模转换器使用离散时间和连续时间处理来产生模拟输出信号。 模拟输出信号被采样并通过离散时间/连续时间接口反馈到转换电路的输入端。 在一个实现中，离散时间处理使用开关电容器积分器的积分器链和开关电容器低通滤波器。 连续时间处理器是2极低通滤波器。 有限脉冲响应滤波器可以在离散时间处理之前。 可以选择性地应用多个模拟输出采样装置来适应各种操作条件。
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17.发明授权High-order multipath operational amplifier with dynamic offset reduction, controlled saturation current limiting, and current feedback for enhanced conditional stability 失效具有动态偏移减小，受控饱和电流限制和电流反馈的高阶多径运算放大器，用于增强条件稳定性
公开(公告)号：US06002299A
公开(公告)日：1999-12-14
申请号：US872424
申请日：1997-06-10
申请人： Axel Thomsen
发明人： Axel Thomsen
IPC分类号： H03M1/12 , H03F1/08 , H03F1/26 , H03F1/30 , H03F1/34 , H03F3/34 , H03F3/45 , H03F1/02 , H03F1/36
CPC分类号： H03F3/45968 , H03F1/083 , H03F1/303 , H03F3/45775 , H03F2200/331 , H03F2200/81
摘要： An amplifier is disclosed including at least three integrator stages connected to provide a low-frequency path from a signal input to a signal output, and a relatively high-frequency bypass path around the first integrator stage. The first integrator stage uses dynamic offset reduction such as chopper stabilization, and an analog low-pass filter reduces artifacts of the dynamic offset reduction. The paths converge at a current summing node. To prevent instability when the integrators are saturated by large signals, the paths have respective saturation current limits selected so that the relatively high-frequency path is not saturated when the low-frequency path saturates. To ensure that the conditional stability is substantially unaffected by adjustment of closed-loop gain, a current feedback input adjusts the open-loop gain in a fashion inversely proportional to resistance presented to the current feedback input by a feedback circuit.
摘要翻译： 公开了一种放大器，其包括至少三个积分器级，其连接以提供从信号输入到信号输出的低频路径，以及围绕第一积分器级的相对高频旁路。 第一个积分器级使用动态偏移降低，如斩波稳定，模拟低通滤波器减少动态偏移减少的伪像。 路径收敛在当前求和节点处。 为了防止当积分器被大信号饱和时的不稳定性，路径具有选择的相应的饱和电流极限，使得当低频路径饱和时相对高频路径不饱和。 为了确保条件稳定性基本上不受调节闭环增益的影响，电流反馈输入以与由反馈电路呈现给电流反馈输入的电阻成反比的方式调节开环增益。
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公开(公告)号：US09099994B2
公开(公告)日：2015-08-04
申请号：US13721885
申请日：2012-12-20
申请人： Axel Thomsen , Pavel Konecny , Xiaodong Wang
发明人： Axel Thomsen , Pavel Konecny , Xiaodong Wang
IPC分类号： H03K3/011 , H03K3/0231
CPC分类号： H03K3/0231
摘要： In an embodiment, a method includes: during a first portion of a cycle of a clock signal generated by an oscillator, pre-charging a first capacitor of a first switched capacitor stage until a first comparator determines that a first node voltage of the first switched capacitor stage is greater than a first reference voltage at a first reference voltage node; applying a second reference voltage to the first reference voltage node; and responsive to a first edge of the clock signal, charging the first capacitor until the first comparator determines that the first node voltage is greater than the second reference voltage at the first reference voltage node.
摘要翻译： 在一个实施例中，一种方法包括：在由振荡器产生的时钟信号的周期的第一部分期间，对第一开关电容器级的第一电容器进行预充电，直到第一比较器确定第一开关的第一节点电压 电容器级大于第一参考电压节点处的第一参考电压; 将第二参考电压施加到所述第一参考电压节点; 并且响应于所述时钟信号的第一边缘，对所述第一电容器充电直到所述第一比较器确定所述第一节点电压大于所述第一参考电压节点处的所述第二参考电压。
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19.发明授权Successive approximation register analog-to-digital converter with multiple capacitive sampling circuits and method 有权具有多个电容采样电路和方法的逐次逼近寄存器模数转换器公开(公告)号：US08952839B2
公开(公告)日：2015-02-10
申请号：US13732113
申请日：2012-12-31
申请人： Xiaodong Wang , Shouli Yan , Axel Thomsen , Jinwen Xiao
发明人： Xiaodong Wang , Shouli Yan , Axel Thomsen , Jinwen Xiao
CPC分类号： H03M1/38 , H03K5/24 , H03M1/00 , H03M1/0695 , H03M1/12 , H03M1/1225 , H03M1/1245 , H03M1/466 , H03M1/804
摘要： A circuit includes a comparator including a first input, a second input, and an output. The circuit further includes a plurality of capacitive sampling circuits configured to be selectively coupled to the first and second inputs. Each of the plurality of capacitive sampling circuits includes first and second capacitors, and includes first and second conversion switches configured to selectively couple the first and second capacitors to the first and second inputs, respectively. The first and second conversion switches of a selected one of the plurality of capacitive sampling circuits are closed to couple the selected one to the first and second inputs of the comparator during a conversion phase.
摘要翻译： 电路包括比较器，其包括第一输入端，第二输入端和输出端。 电路还包括被配置为选择性地耦合到第一和第二输入的多个电容性采样电路。 多个电容性采样电路中的每一个包括第一和第二电容器，并且包括被配置为分别将第一和第二电容器选择性地耦合到第一和第二输入端的第一和第二转换开关。 多个电容性采样电路中的所选择的一个电容性采样电路的第一和第二转换开关闭合，以在转换阶段将所选择的一个耦合到比较器的第一和第二输入端。
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20.发明申请Successive Approximation Register Analog-to-Digital Converter with Multiple Capacitive Sampling Circuits and Method 有权具有多个电容采样电路的连续近似寄存器模数转换器和方法公开(公告)号：US20140184435A1
公开(公告)日：2014-07-03
申请号：US13732113
申请日：2012-12-31
申请人： Xiaodong Wang , Shouli Yan , Axel Thomsen , Jinwen Xiao
发明人： Xiaodong Wang , Shouli Yan , Axel Thomsen , Jinwen Xiao
CPC分类号： H03M1/38 , H03K5/24 , H03M1/00 , H03M1/0695 , H03M1/12 , H03M1/1225 , H03M1/1245 , H03M1/466 , H03M1/804
摘要： A circuit includes a comparator including a first input, a second input, and an output. The circuit further includes a plurality of capacitive sampling circuits configured to be selectively coupled to the first and second inputs. Each of the plurality of capacitive sampling circuits includes first and second capacitors, and includes first and second conversion switches configured to selectively couple the first and second capacitors to the first and second inputs, respectively. The first and second conversion switches of a selected one of the plurality of capacitive sampling circuits are closed to couple the selected one to the first and second inputs of the comparator during a conversion phase.
摘要翻译： 电路包括比较器，其包括第一输入端，第二输入端和输出端。 电路还包括被配置为选择性地耦合到第一和第二输入的多个电容性采样电路。 多个电容性采样电路中的每一个包括第一和第二电容器，并且包括被配置为分别将第一和第二电容器选择性地耦合到第一和第二输入端的第一和第二转换开关。 多个电容性采样电路中的所选择的一个电容性采样电路的第一和第二转换开关闭合，以在转换阶段将所选择的一个耦合到比较器的第一和第二输入端。
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