公开(公告)号：US08494265B2

公开(公告)日：2013-07-23

申请号：US12739777

申请日：2008-10-17

申请人： Satoshi Katoh ,  Akira Inoue

发明人： Satoshi Katoh ,  Akira Inoue

IPC分类号： G06T5/00

CPC分类号： H04N9/68 ,  G06K9/00684 ,  H04N1/60

摘要： An image correction device includes a scene belonging rate computation unit that computes, from the feature value of an input image, a plurality of scene belonging rates each of which prescribes a probability with which the input image belongs to each category scene; an unknown scene belonging rate specification unit that specifies an unknown scene belonging rate prescribing a probability with which the input image belongs to an unknown scene; a by-scene correction parameter memory unit that stores by-scene correction parameters; a correction parameter combination unit that computes a combined correction parameter that is the weighted average of the correction parameters using the plurality of scene belonging rates and the unknown scene belonging rate; and an image correction unit that performs image correction processing for the input image using the combined correction parameter.

摘要翻译： 图像校正装置包括场景归属率计算单元，其从输入图像的特征值计算多个场景归属率，每个场景归属率规定输入图像属于每个类别场景的概率; 未知场景属性率指定单元，其指定输入图像属于未知场景的概率的未知场景归属率; 存储逐场校正参数的逐场校正参数存储单元; 校正参数组合单元，其使用所述多个场景归属率和所述未知场景归属率来计算作为所述校正参数的加权平均的组合校正参数; 以及图像校正单元，其使用组合校正参数对输入图像执行图像校正处理。

公开(公告)号：US20130146928A1

公开(公告)日：2013-06-13

申请号：US13818167

申请日：2012-03-05

申请人： Akira Inoue ,  Toshiya Yokogawa ,  Atsushi Yamada ,  Masaki Fujikane

发明人： Akira Inoue ,  Toshiya Yokogawa ,  Atsushi Yamada ,  Masaki Fujikane

IPC分类号： H01L33/20

CPC分类号： H01L33/20 ,  H01L33/0079 ,  H01L33/0095 ,  H01L33/16 ,  H01L33/18 ,  H01L33/32 ,  H01L33/54 ,  H01L2224/14 ,  H01L2224/16225

摘要： A nitride semiconductor light-emitting element 300 is a nitride semiconductor light-emitting element which has a multilayer structure 310, the multilayer structure 310 including an active layer which is made of an m-plane nitride semiconductor. The multilayer structure 310 has a light extraction surface 311a which is parallel to an m-plane in the nitride semiconductor active layer 306 and light extraction surfaces 311b which are parallel to a c-plane in the nitride semiconductor active layer 306. The ratio of an area of the light extraction surfaces 311b to an area of the light extraction surface 311a is not more than 46%.

公开(公告)号：US20130126900A1

公开(公告)日：2013-05-23

申请号：US13813693

申请日：2011-08-04

申请人： Akira Inoue ,  Masaki Fujikane ,  Toshiya Yokogawa

发明人： Akira Inoue ,  Masaki Fujikane ,  Toshiya Yokogawa

IPC分类号： H01L33/32

CPC分类号： H01L33/32 ,  H01L25/0753 ,  H01L33/16 ,  H01L33/54 ,  H01L2224/16225 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/00

摘要： Around a nitride-based semiconductor light-emitting element which has a polarization characteristic, a transparent encapsulating member which has a cylindrical shape is provided such that the symmetry plane of the cylindrical shape forms an angle of 25° to 65° with respect to the polarization direction of the nitride-based semiconductor light-emitting element.

摘要翻译： 在具有极化特性的氮化物系半导体发光元件周围，设置有圆筒状的透明封装构件，使得圆筒形状的对称面相对于极化形成25°〜65°的角度 氮化物系半导体发光元件的方向。

公开(公告)号：US08400662B2

公开(公告)日：2013-03-19

申请号：US12857311

申请日：2010-08-16

申请人： Akira Inoue

发明人： Akira Inoue

IPC分类号： G06F15/00 ,  G06K1/00

CPC分类号： G06K15/1817 ,  G06F3/1213 ,  G06F3/122 ,  G06F3/124 ,  G06F3/126 ,  G06F3/1267 ,  G06F3/1275 ,  G06F3/1285 ,  G06K15/02

摘要： A printer apparatus is provided which receives concurrent input print data from plural input ports without increasing receiving buffer memory. A controller determines whether an image creator is used by other jobs when starting receiving print data through any one of the plural input ports. When not used, print data related to the current job is stored in a receiving buffer memory and at the same time print data stored in the buffer memory is printed via the image creator. On the other hand, when other jobs use the image creator, the print data related to the current job is stored in a hard disk unit and is printed when the image creating device becomes available.

摘要翻译： 提供一种打印机装置，其从多个输入端口接收同时输入的打印数据，而不增加接收缓冲存储器。 当通过多个输入端口中的任何一个开始接收打印数据时，控制器确定其他作业是否使用图像创建器。 当不使用时，与当前作业相关的打印数据存储在接收缓冲存储器中，并且通过图像创建者打印存储在缓冲存储器中的打印数据。 另一方面，当其他作业使用图像创建者时，与当前作业相关的打印数据被存储在硬盘单元中，并且当图像创建装置可用时被打印。

公开(公告)号：US20130020584A1

公开(公告)日：2013-01-24

申请号：US13639199

申请日：2010-04-22

申请人： Toshiyuki Oishi ,  Hiroshi Otsuka ,  Koji Yamanaka ,  Akira Inoue

发明人： Toshiyuki Oishi ,  Hiroshi Otsuka ,  Koji Yamanaka ,  Akira Inoue

IPC分类号： H01L29/78

CPC分类号： H01L29/7787 ,  H01L29/0657 ,  H01L29/1029 ,  H01L29/2003 ,  H01L29/42316

摘要： In the present invention, provided is a semiconductor device, including: a GaN channel layer which is provided on a substrate and through which electrons run; a barrier layer which is provided on the GaN channel layer and which contains at least one of In, Al, and Ga and contains N; a gate electrode which is provided on the barrier layer; and a source electrode and a drain electrode which are provided on the substrate across the gate electrode, in which, in a portion of the barrier layer between the gate electrode and the drain electrode, a magnitude of polarization of the barrier layer is smaller on the gate electrode side than on the drain electrode side. Thus, PAE can be improved by reducing Rd and Cgd simultaneously.

摘要翻译： 在本发明中，提供了一种半导体器件，包括：GaN沟道层，其设置在基板上，电子通过该沟道层运行; 阻挡层，其设置在所述GaN沟道层上并且包含In，Al和Ga中的至少一个并且包含N; 设置在所述阻挡层上的栅电极; 以及源极电极和漏电极，其设置在跨越栅电极的基板上，其中在栅电极和漏电极之间的阻挡层的一部分中，阻挡层的极化大小在 栅电极侧比漏极侧。 因此，通过同时减少Rd和Cgd可以改善PAE。

公开(公告)号：US20120326781A1

公开(公告)日：2012-12-27

申请号：US13582237

申请日：2010-03-04

申请人： Kazutomi Mori ,  Hiroyuki Joba ,  Yoshinori Takahashi ,  Tomohiro Akiyama ,  Ryoji Hayashi ,  Mitsuhiro Shimozawa ,  Akira Inoue ,  Morishige Hieda ,  Kiyohide Sakai ,  Yoshihito Hirano

发明人： Kazutomi Mori ,  Hiroyuki Joba ,  Yoshinori Takahashi ,  Tomohiro Akiyama ,  Ryoji Hayashi ,  Mitsuhiro Shimozawa ,  Akira Inoue ,  Morishige Hieda ,  Kiyohide Sakai ,  Yoshihito Hirano

IPC分类号： H03G3/20

CPC分类号： H03F1/3247 ,  H01Q3/26 ,  H01Q3/267 ,  H03F1/02 ,  H03F1/0211 ,  H03F1/0227 ,  H03F1/0238 ,  H03F3/24 ,  H03F2200/211 ,  H03F2200/411 ,  H03F2200/451 ,  H03G3/004 ,  H03G3/3042 ,  H04B1/0483 ,  H04B17/13 ,  H04B2001/045

摘要： A transmission module including a power supply voltage control unit that sets a power supply voltage to the high frequency amplifier in a variable manner, and a control circuit that controls an amplitude control unit, a phase control unit and the power supply voltage control unit. The control circuit and the power supply voltage control unit control the power supply voltage in accordance with an output power of the high frequency amplifier. The transmission module can carry out not only phase control but also amplitude control in a continuous manner, while suppressing amplitude and phase variation, and a high frequency amplifier in the transmission module is made highly efficient. In addition, a large directional gain, a low side lobe level and a low power consumption are achieved, as a phased array antenna apparatus using a transmission module.

摘要翻译： 一种传输模块，包括以可变方式设置高频放大器的电源电压的电源电压控制单元和控制振幅控制单元，相位控制单元和电源电压控制单元的控制电路。 控制电路和电源电压控制单元根据高频放大器的输出功率来控制电源电压。 传输模块不仅可以在抑制幅度和相位变化的同时进行相位控制，而且可以连续进行幅度控制，并且使传输模块中的高频放大器高效。 此外，作为使用传输模块的相控阵天线装置，实现了大的方向增益，低旁瓣电平和低功耗。

公开(公告)号：US20120112319A1

公开(公告)日：2012-05-10

申请号：US13382674

申请日：2010-07-01

申请人： Tadashi Kawashima ,  Masahiro Yoshikawa ,  Akira Inoue ,  Yoshiya Yoshida ,  Kazuhiro Iriguchi ,  Toshiyuki Isami

发明人： Tadashi Kawashima ,  Masahiro Yoshikawa ,  Akira Inoue ,  Yoshiya Yoshida ,  Kazuhiro Iriguchi ,  Toshiyuki Isami

IPC分类号： H01L29/36 ,  H01L21/20

CPC分类号： H01L21/3221 ,  C30B25/186 ,  C30B25/20 ,  C30B29/06 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02658

摘要： It is an object to provide an epitaxial silicon wafer that is provided with an excellent gettering ability in which a polysilicon layer is formed on the rear face side of a silicon crystal substrate into which phosphorus (P) and germanium (Ge) have been doped. A PBS forming step for growing a polysilicon layer is executed on the rear face side of a silicon crystal substrate into which phosphorus and germanium have been doped at a high concentration to execute a baking treatment. After a surface layer of the silicon crystal substrate is then polished up to a predetermined amount, a silicon epitaxial layer is grown by a CVD method. By the above steps, the number of LPDs (caused by an SF) that occur on the surface of the epitaxial silicon wafer due to the SF can be greatly reduced.

摘要翻译： 本发明的目的是提供一种在掺杂有磷（P）和锗（Ge）的硅晶体衬底的背面侧上形成多晶硅层的优异的吸气能力的外延硅晶片。 在已经以高浓度掺杂有磷和锗的硅晶体衬底的背面执行用于生长多晶硅层的PBS形成步骤，以进行烘烤处理。 然后将硅晶体衬底的表面层抛光至预定量之后，通过CVD法生长硅外延层。 通过上述步骤，可以大大减少由于SF而在外延硅晶片的表面上发生的LPD（由SF引起）的数量。

公开(公告)号：US20120112190A1

公开(公告)日：2012-05-10

申请号：US13378562

申请日：2010-05-28

申请人： Tadashi Kawashima ,  Masahiro Yoshikawa ,  Akira Inoue ,  Yoshiya Yoshida

发明人： Tadashi Kawashima ,  Masahiro Yoshikawa ,  Akira Inoue ,  Yoshiya Yoshida

IPC分类号： H01L29/04 ,  H01L21/20

CPC分类号： H01L21/02532 ,  H01L21/02381 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/02664 ,  H01L21/3221

摘要： It is an object to provide an epitaxial silicon wafer that is provided with an excellent gettering ability in which a polysilicon layer is formed on the rear face side of a silicon crystal substrate into which phosphorus (P) and germanium (Ge) have been doped. A silicon epitaxial layer is grown by a CVD method on the surface of a silicon crystal substrate into which phosphorus and germanium have been doped at a high concentration. After that, a PBS forming step for growing a polysilicon layer is executed on the rear face side of a silicon crystal substrate. By the above steps, the number of LPDs (caused by an SF) that occur on the surface of the epitaxial silicon wafer due to the SF can be greatly reduced.

摘要翻译： 本发明的目的是提供一种在掺杂有磷（P）和锗（Ge）的硅晶体衬底的背面侧上形成多晶硅层的优异的吸气能力的外延硅晶片。 通过CVD法在硅晶体衬底的表面上以高浓度掺杂有磷和锗的方式生长硅外延层。 之后，在硅晶体基板的背面进行用于生长多晶硅层的PBS形成工序。 通过上述步骤，可以大大减少由于SF而在外延硅晶片的表面上发生的LPD（由SF引起）的数量。

公开(公告)号：US20120024130A1

公开(公告)日：2012-02-02

申请号：US13190731

申请日：2011-07-26

申请人： Shusuke TAKAHASHI ,  Akira Inoue

发明人： Shusuke TAKAHASHI ,  Akira Inoue

IPC分类号： G10H1/40

CPC分类号： G10H1/40 ,  G10H1/0008 ,  G10H2210/076 ,  G10H2220/086 ,  G10H2250/031 ,  G10H2250/235

摘要： A tempo detection device includes: a basic feature amount extracting section which extracts a plurality of types of basic feature amounts from an input audio signal; a weighting and adding section which weights and adds the basic feature amounts of the plurality of types extracted in the basic feature amount extracting section to obtain an addition signal; and a tempo detecting section which detects BPM indicating the tempo on the basis of a periodic component included in the addition signal obtained in the weighting and adding section.

摘要翻译： 速度检测装置包括：基本特征量提取部，其从输入音频信号中提取多种类型的基本特征量; 加权和加法部分，其加权并添加在基本特征量提取部分中提取的多个类型的基本特征量，以获得加法信号; 以及速度检测部分，其基于在加权和加法部分中获得的加法信号中包括的周期分量来检测指示速度的BPM。

公开(公告)号：US08058639B2

公开(公告)日：2011-11-15

申请号：US13125367

申请日：2010-04-05

申请人： Akira Inoue ,  Masaki Fujikane ,  Toshiya Yokogawa

发明人： Akira Inoue ,  Masaki Fujikane ,  Toshiya Yokogawa

IPC分类号： H01L29/06 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109 ,  H01L27/15 ,  H01L29/26 ,  H01L31/12 ,  H01L33/00 ,  H01L29/22 ,  H01L29/24 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/00

CPC分类号： H01L29/045 ,  H01L24/14 ,  H01L24/17 ,  H01L33/16 ,  H01L33/32 ,  H01L33/40 ,  H01L2224/05124 ,  H01L2224/05166 ,  H01L2224/05169 ,  H01L2224/05184 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05664 ,  H01L2224/05669 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01056 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01088 ,  H01L2924/12032 ,  H01L2924/12041 ,  H01L2924/15787 ,  H01L2924/00 ,  H01L2924/00014

摘要： A light-emitting apparatus of the present invention includes: a mounting base 260 which has a wire 265; and a nitride-based semiconductor light-emitting device flip-chip mounted on the mounting base 260. The nitride-based semiconductor light-emitting device 100 includes a GaN-based substrate 10 which has an m-plane surface 12, a semiconductor multilayer structure 20 provided on the m-plane surface 12 of the GaN-based substrate 10, and an electrode 30 provided on the semiconductor multilayer structure 20. The electrode 30 includes an Mg layer 32. The Mg layer 32 is in contact with the surface of the p-type semiconductor region of the semiconductor multilayer structure 20. The electrode 30 is coupled to the wire 265.

摘要翻译： 本发明的发光装置包括：安装基座260，其具有线265; 以及安装在安装基座260上的氮化物系半导体发光装置倒装芯片。氮化物系半导体发光装置100具备：具有m面面12的GaN基基板10，半导体层叠结构体 设置在GaN基基板10的m面表面12上，以及设置在半导体多层结构20上的电极30.电极30包括Mg层32.Mg层32与 p型半导体区域。电极30与线265耦合。