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公开(公告)号：US20240396452A1
公开(公告)日：2024-11-28
申请号：US18792905
申请日：2024-08-02
Applicant: Apple Inc.
Inventor： Jay B. Fletcher , Nathan F. Hanagami , Sanjay Pant , Hao Zhou , Shawn Searles
Abstract: A voltage regulator circuit included in a computer system may employ a control circuit and a switch array that includes multiple switch circuits. Different groups of switch circuits that include respective groups of switch devices are coupled between an input power supply node and corresponding regulated power supply nodes. To maintain desired respective voltages on the regulated power supply nodes, the control circuit compares the voltages of the regulated power supply nodes to corresponding reference voltages and, based on results of the comparisons, opens and closes various ones of the switch devices included in the different groups of switch circuits.
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公开(公告)号：US12068324B2
公开(公告)日：2024-08-20
申请号：US17358790
申请日：2021-06-25
Applicant: Apple Inc.
Inventor： Jared L. Zerbe , Emerson S. Fang , Jun Zhai , Shawn Searles
IPC: H01L27/10 , H01G4/228 , H01L23/00 , H01L23/13 , H01L23/48 , H01L23/498 , H01L23/64 , H01L25/065 , H01L25/16 , H01L25/18 , H01L49/02 , H01L23/50 , H01L25/10
CPC classification number: H01L27/101 , H01G4/228 , H01L23/13 , H01L23/481 , H01L23/49816 , H01L23/642 , H01L24/14 , H01L24/32 , H01L24/73 , H01L25/0657 , H01L25/16 , H01L25/18 , H01L28/40 , H01L23/49827 , H01L23/50 , H01L24/16 , H01L24/48 , H01L25/105 , H01L2224/0401 , H01L2224/13025 , H01L2224/1403 , H01L2224/14181 , H01L2224/16145 , H01L2224/16227 , H01L2224/16265 , H01L2224/32225 , H01L2224/45099 , H01L2224/48227 , H01L2224/73265 , H01L2225/06513 , H01L2225/06517 , H01L2225/1023 , H01L2225/1058 , H01L2225/1088 , H01L2924/00012 , H01L2924/00014 , H01L2924/1033 , H01L2924/12042 , H01L2924/1205 , H01L2924/1427 , H01L2924/1432 , H01L2924/1434 , H01L2924/1436 , H01L2924/15153 , H01L2924/15159 , H01L2924/15174 , H01L2924/15311 , H01L2924/15331 , H01L2924/157 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19103 , H01L2924/19104 , H01L2224/73265 , H01L2224/32225 , H01L2224/48227 , H01L2924/00012 , H01L2924/15311 , H01L2224/73265 , H01L2224/32225 , H01L2224/48227 , H01L2924/00 , H01L2924/12042 , H01L2924/00 , H01L2924/00014 , H01L2224/45099 , H01L2924/00014 , H01L2224/45015 , H01L2924/207
Abstract: A semiconductor device package is described that includes a power consuming device (such as an SOC device). The power consuming device may include one or more current consuming elements. A passive device may be coupled to the power consuming device. The passive device may include a plurality of passive elements formed on a semiconductor substrate. The passive elements may be arranged in an array of structures on the semiconductor substrate. The power consuming device and the passive device may be coupled using one or more terminals. The passive device and power consuming device coupling may be configured in such a way that the power consuming device determines functionally the way the passive device elements will be used.
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公开(公告)号：US20240241571A1
公开(公告)日：2024-07-18
申请号：US18622502
申请日：2024-03-29
Applicant: Apple Inc.
Inventor： Shawn Searles , Sanjay Pant , Ludmil N. Nikolov , Tiago Filipe Galhoz Patrao , Enrico Zanetti , Hao Zhou , Vincenzo Bisogno
IPC: G06F1/3296 , H02M1/00 , H02M3/157
CPC classification number: G06F1/3296 , H02M1/0006 , H02M1/0025 , H02M1/007 , H02M3/157
Abstract: A power delivery system included in a computer system uses multiple power converter circuits to generate respective voltage levels on multiple power supply nodes. An embodiment of the power delivery system includes an input power converter circuit that generates a voltage level for use by host and follower power converter circuits. The host power converter circuit generates an external demand current that is shared by multiple follower power converter circuits to regulate the voltage level on the multiple power supply nodes. The power delivery system can be scaled to different platforms of the computer system by adjusting the number of follower power converter circuits.
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公开(公告)号：US11983063B2
公开(公告)日：2024-05-14
申请号：US17823949
申请日：2022-08-31
Applicant: Apple Inc.
Inventor： Shawn Searles , Sanjay Pant , Ludmil N. Nikolov , Tiago Filipe Galhoz Patrao , Enrico Zanetti , Hao Zhou , Vincenzo Bisogno
IPC: G06F1/32 , G06F1/3296 , H02M1/00 , H02M3/157
CPC classification number: G06F1/3296 , H02M1/0006 , H02M1/0025 , H02M1/007 , H02M3/157
Abstract: A power delivery system included in a computer system using multiple power converter circuits to generate respective voltage levels on multiple power supply nodes. The power delivery system includes a step-down power converter circuit that generates a voltage level for use by host and follower power converter circuits. The host power converter circuit generates an external demand current that is shared by multiple follower power converter circuits to regulate the voltage level on the multiple power supply nodes. The power delivery system can be scaled to different platforms of the computer system by adjusting the number of follower power converter circuits.
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公开(公告)号：US20240126353A1
公开(公告)日：2024-04-18
申请号：US18497443
申请日：2023-10-30
Applicant: Apple Inc.
Inventor： Shawn Searles , Fabio Gozzini , Sanjay Pant , Inder M. Sodhi
CPC classification number: G06F1/26 , G01R15/146 , G11C7/1096
Abstract: A power converter circuit included in a computer system may include a phase circuit and a sample circuit. The phase circuit compares a voltage level of the regulated power supply node to a reference voltage to generate a demand current that is used to adjust the voltage level of the regulated power supply node. The phase circuit also digitizes the demand current and stores the resultant bit stream in a memory circuit. The sample circuit generates timestamp information that points to particular storage locations in the memory circuit that correspond to trigger events, allowing the operation of the power converter circuit to be analyzed during different circumstances as well as to adjust operating parameters of the power converter circuit.
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Patent Agency Ranking
公开(公告)号：US11722060B2
公开(公告)日：2023-08-08
申请号：US16936410
申请日：2020-07-22
Applicant: Apple Inc.
Inventor： Victor Zyuban , Norman J. Rohrer , Shawn Searles
Abstract: A converter circuit, included in a power converter circuit, may generate a given voltage level on a regulated power supply node of a computer system. A control circuit may monitor a voltage level and assert a control signal in response to a determination that a regulation event has occurred. A boost converter circuit, included in the power converter circuit, may inject charge into to the regulated power supply node via a capacitor, in response to an assertion of the control signal.
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公开(公告)号：US11669145B2
公开(公告)日：2023-06-06
申请号：US17476186
申请日：2021-09-15
Applicant: Apple Inc.
Inventor： Shawn Searles , Preethi Damodaran , Ofir Gilad , Michele De Fazio , Inder M. Sodhi , Enrico Zanetti , Olivier Girard , Lothar Münch , Andrea Barsanti , Andrea Lazzeri
IPC: G06F1/32 , G06F1/324 , G06F1/3296 , G06F1/3234
CPC classification number: G06F1/324 , G06F1/3296 , G06F1/3275
Abstract: A power management subsystem included in a computer system may include a host device and a power circuit group. The power circuit group includes multiple power circuits arranged in a tree-like structure. The resources of the multiple power circuits are mapped to corresponding addresses within a common address space. The host device sends, via a first communication bus, commands to a branch power circuit of the multiple power circuits, which, in turn, relays the commands, using a second communication bus, to corresponding ones of the other power circuits based on respective power resources specified in the commands received from the host device.
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公开(公告)号：US20220300022A1
公开(公告)日：2022-09-22
申请号：US17658408
申请日：2022-04-07
Applicant: Apple Inc.
Inventor： Shawn Searles , Victor Zyuban , Mohamed Abu-Rahma
Abstract: A voltage regulator circuit may generate a regulated voltage level using a voltage level of a feedback node. The regulated voltage level may be distributed, via a power distribution network, to package power supply node of a package, into which an integrated circuit has been mounted. Power switches included in the integrated circuit may couple the package power supply node to respective local power supply nodes in the integrated circuit. A particular power switch may selectively couple different ones of the local power supply nodes to the feedback node, allowing the voltage regulator circuit to compensate for reductions in the regulated voltage level due to the power distribution network, as well as adjust the regulated voltage level based on power consumptions of load circuits coupled to the local power supply nodes.
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公开(公告)号：US11431249B2
公开(公告)日：2022-08-30
申请号：US17005129
申请日：2020-08-27
Applicant: Apple Inc.
Inventor： Alberto Alessandro Angelo Puggelli , Ofir Gilad , Floyd L. Dankert , Hubert Attah , Sanjay Pant , Shawn Searles , Georg Diebel
Abstract: A power converter circuit that includes a switch node coupled to a regulated power supply node via an inductor is configured to regulate a voltage level of a power supply node using a particular one of multiple available operating modes. In response to receiving a command to reduce the voltage level of the power supply node, the power converter circuit begins to reduce the voltage level of the power supply node, while autonomously selecting different ones of available operating modes. The power converter circuit may compare to the voltage level of the power supply node to boundary levels and select a different operating mode when the voltage level of the power supply node exceeds one of the boundaries. By switching operating modes during the negative slew of the voltage level of the power supply node, the power converter may maintain a target efficiency during the reduction in voltage.
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公开(公告)号：US11428717B2
公开(公告)日：2022-08-30
申请号：US17033505
申请日：2020-09-25
Applicant: Apple Inc.
Inventor： Michele De Fazio , Shawn Searles
IPC: G01R19/15 , G01R19/257
Abstract: A current measurement circuit is disclosed. The current measurement circuit includes first and second circuit branches coupled to a circuit node through which current is to be measured. During a first period, the first circuit branch converts the current into a first voltage. During a second period, the second circuit branch converter the current into a second voltage. An analog-to-digital converter is configured to convert the first and second voltages into digital values indicative of the measured current. A control circuit is configured to alternately select one of the first and second branches during the generation of the digital values.
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