Method of writing to a spin torque magnetic random access memory
    11.
    发明授权
    Method of writing to a spin torque magnetic random access memory 有权
    写入自旋转矩磁随机存取存储器的方法

    公开(公告)号:US09502093B2

    公开(公告)日:2016-11-22

    申请号:US15167758

    申请日:2016-05-27

    Abstract: A spin-torque magnetoresistive memory includes array read circuits and array write circuits coupled to an array of magnetic bits. The array read circuits sample magnetic bits in the array, apply a write current pulse to the magnetic bits to set them to a first logic state, resample the magnetic bits using an additional offset current, and compare the results of sampling and resampling to determine the bit state for each magnetic bit. For each of the magnetic bits in the page having the second logic state, the array write circuits initiate a write-back, wherein the write-back includes applying a second write current pulse having opposite polarity in comparison with the first write current pulse to set the magnetic bit to the second state. A read or write operation may be received after initiation of the write-back where the write-back can be aborted for a portion of the bits in the case of a write operation. The write-back may be performed such that different portions of the magnetic bits are written back at different times, thereby staggering the write-back current pulses in time.

    Abstract translation: 自旋转矩磁阻存储器包括耦合到磁头阵列的阵列读取电路和阵列写入电路。 阵列读取电路对阵列中的磁头进行采样,向磁头施加写入电流脉冲以将其设置为第一逻辑状态,使用附加的偏移电流对磁性位进行重新采样,并比较采样和重采样的结果,以确定 每个磁头的位状态。 对于具有第二逻辑状态的页面中的每个磁性位,阵列写入电路启动回写,其中写回包括施加与第一写入电流脉冲相比具有相反极性的第二写入电流脉冲以设置 磁头到第二个状态。 在写回开始之后可以接收读取或写入操作,其中在写入操作的情况下可以中止一部分位的写回。 可以执行回写,使得磁头的不同部分在不同的时间被写回,从而及时地交错回写电流脉冲。

    METHOD OF WRITING TO A SPIN TORQUE MAGNETIC RANDOM ACCESS MEMORY
    14.
    发明申请
    METHOD OF WRITING TO A SPIN TORQUE MAGNETIC RANDOM ACCESS MEMORY 审中-公开
    写入旋转磁力随机存取存储器的方法

    公开(公告)号:US20160099039A1

    公开(公告)日:2016-04-07

    申请号:US14970563

    申请日:2015-12-16

    Abstract: A spin-torque magnetoresistive memory includes array read circuits and array write circuits coupled to an array of magnetic bits. The array read circuits sample magnetic bits in the array, apply a write current pulse to the magnetic bits to set them to a first logic state, resample the magnetic bits, and comparing the results of sampling and resampling to determine the bit state for each magnetic bit. For each of the magnetic bits in the page having the second logic state, the array write circuits initiate a write-back, wherein the write-back includes applying a second write current pulse having opposite polarity in comparison with the first write current pulse to set the magnetic bit to the second state. A read or write operation may be received after initiation of the write-back where the write-back can be aborted for a portion of the bits in the case of a write operation. The write-back may be performed such that different portions of the magnetic bits are written back at different times, thereby staggering the write-back current pulses in time. An offset current may also be used during resampling.

    Abstract translation: 自旋转矩磁阻存储器包括耦合到磁头阵列的阵列读取电路和阵列写入电路。 阵列读取电路对阵列中的磁头进行采样,向磁头施加写入电流脉冲以将其设置为第一逻辑状态,对磁头进行重新采样,并比较采样和重采样的结果,以确定每个磁性的位状态 位。 对于具有第二逻辑状态的页面中的每个磁性位,阵列写入电路启动回写,其中写回包括施加与第一写入电流脉冲相比具有相反极性的第二写入电流脉冲以设置 磁头到第二个状态。 在写回开始之后可以接收读取或写入操作,其中在写入操作的情况下可以中止一部分位的写回。 可以执行回写,使得磁头的不同部分在不同的时间被写回,从而及时地交错回写电流脉冲。 在重采样期间也可以使用偏移电流。

    WRITE VERIFY PROGRAMMING OF A MEMORY DEVICE
    15.
    发明申请
    WRITE VERIFY PROGRAMMING OF A MEMORY DEVICE 有权
    存储器件的写入验证编程

    公开(公告)号:US20160093349A1

    公开(公告)日:2016-03-31

    申请号:US14502367

    申请日:2014-09-30

    CPC classification number: G11C11/1675 G06F12/0804 G11C11/1677 Y02D10/13

    Abstract: A memory device is configured to identify a set of bit cells to be changed from a first state to a second state. In some examples, the memory device may apply a first voltage to the set of bit cells to change a least a first portion of the set of bit cells to the second state. In some cases, the memory device may also identify a second portion of the bit cells that remained in the first state following the application of the first voltage. In these cases, the memory device may apply a second voltage having a greater magnitude, duration, or both to the second portion of the set of bit cells in order to set the second portion of bit cells to the second state.

    Abstract translation: 存储器设备被配置为识别要从第一状态改变到第二状态的位单元的集合。 在一些示例中,存储器件可以向该位单元集合施加第一电压以将位组中的至少第一部分改变为第二状态。 在一些情况下,存储器件还可以识别在应用第一电压之后保持在第一状态的位单元的第二部分。 在这些情况下,存储器件可以将具有更大幅度,持续时间或两者的第二电压施加到位单元集合的第二部分,以便将位单元的第二部分设置为第二状态。

    CIRCUIT AND METHOD FOR ACCESSING A BIT CELL IN A SPIN-TORQUE MRAM
    17.
    发明申请
    CIRCUIT AND METHOD FOR ACCESSING A BIT CELL IN A SPIN-TORQUE MRAM 审中-公开
    用于接收转子MRAM中的位单元的电路和方法

    公开(公告)号:US20160042781A1

    公开(公告)日:2016-02-11

    申请号:US14918998

    申请日:2015-10-21

    Abstract: Circuitry and a method for regulating voltages applied to magnetoresistive bit cells of a spin-torque magnetoresistive random access memory (ST-MRAM) reduces time-dependent dielectric breakdown stress of the word line transistors. During a read or write operation, only the ends of the selected bit cells are pulled down to a low voltage and/or pulled up to a high voltage depending on the operation (write 0, write 1, and read) being performed. The ends of the unselected bit cells are held at a precharge voltage while separately timed signals pull up or pull down the ends of the selected bit cells during read and write operations.

    Abstract translation: 用于调节施加到自旋转矩磁阻随机存取存储器(ST-MRAM)的磁阻位元的电压的电路和方法降低了字线晶体管的时间依赖介电击穿应力。 在读或写操作期间,根据正在执行的操作(写0,写1和读),仅将所选位单元的端部下拉至低电压和/或上拉至高电压。 未选择的位单元的端部保持在预充电电压,而在读取和写入操作期间单独定时的信号上拉或下拉所选位单元的端部。

    CIRCUIT AND METHOD FOR SPIN-TORQUE MRAM BIT LINE AND SOURCE LINE VOLTAGE REGULATION
    19.
    发明申请
    CIRCUIT AND METHOD FOR SPIN-TORQUE MRAM BIT LINE AND SOURCE LINE VOLTAGE REGULATION 审中-公开
    用于旋转扭矩MRAM位线和电源线电压调节的电路和方法

    公开(公告)号:US20150206570A1

    公开(公告)日:2015-07-23

    申请号:US14676100

    申请日:2015-04-01

    Abstract: Circuitry and a method for regulating voltages applied to magnetoresistive bit cells of a spin-torque magnetoresistive random access memory (ST-MRAM) reduces time-dependent dielectric breakdown stress of the word line transistors. During a read or write operation, only the ends of the selected bit cells are pulled down to a low voltage and/or pulled up to a high voltage depending on the operation (write 0, write 1, and read) being performed. The ends of the unselected bit cells are held at a precharge voltage while separately timed signals pull up or pull down the ends of the selected bit cells during read and write operations.

    Abstract translation: 用于调节施加到自旋转矩磁阻随机存取存储器(ST-MRAM)的磁阻位元的电压的电路和方法降低了字线晶体管的时间依赖介电击穿应力。 在读或写操作期间,根据正在执行的操作(写0,写1和读),只有所选位单元的末端被拉低至低电压和/或上拉至高电压。 未选择的位单元的端部保持在预充电电压,而在读取和写入操作期间单独定时的信号上拉或下拉所选位单元的端部。

    Write driver circuit and method for writing to a spin-torque MRAM
    20.
    发明授权
    Write driver circuit and method for writing to a spin-torque MRAM 有权
    写入驱动电路和写入自旋转矩MRAM的方法

    公开(公告)号:US08929132B2

    公开(公告)日:2015-01-06

    申请号:US13679454

    申请日:2012-11-16

    Abstract: A write driver for writing to a spin-torque magnetoresistive random access memory (ST-MRAM) minimizes sub-threshold leakage of the unselected (off) word line select transistors in the selected column. An effective metal resistance in the bit line and/or source line is reduced and power supply noise immunity is increased. Write driver bias signals are isolated from global bias signals, and a first voltage is applied at one end of a bit line using one of a first NMOS-follower circuit or a first PMOS-follower circuit. A second voltage is applied at opposite ends of a source line using, respectively, second and third PMOS-follower circuits, or second and third NMOS-follower circuits.

    Abstract translation: 用于写入自旋扭矩磁阻随机存取存储器(ST-MRAM)的写入驱动器使选定列中未选择(关闭)字线选择晶体管的亚阈值泄漏最小化。 位线和/或源极线中的有效金属电阻降低,并且提供电源抗扰度。 写入驱动器偏置信号与全局偏置信号隔离,并且使用第一NMOS跟随器电路或第一PMOS跟随器电路之一在位线的一端施加第一电压。 分别使用第二和第三PMOS跟随器电路或第二和第三NMOS跟随器电路在源极线的相对端施加第二电压。

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