公开(公告)号：US07164154B2

公开(公告)日：2007-01-16

申请号：US10995566

申请日：2004-11-24

Applicant: Rajesh Kumar ,  Yuichi Takeuchi ,  Mitsuhiro Kataoka ,  Suhail Rashid Jeremy ,  Andrei Mihaila ,  Florin Udrea

Inventor： Rajesh Kumar ,  Yuichi Takeuchi ,  Mitsuhiro Kataoka ,  Suhail Rashid Jeremy ,  Andrei Mihaila ,  Florin Udrea

IPC: H01L29/15

CPC classification number: H01L29/8083 ,  H01L29/1608

Abstract: A silicon carbide semiconductor device includes: a semiconductor substrate including first and second gate layers, a channel layer, a source layer, and a trench; a gate wiring having a first portion and a plurality of second portions; and a source wiring having a third portion and a plurality of fourth portions. The trench extends in a predetermined extending direction. The first portion connects to the first gate layer in the trench, and extends to the extending direction. The second portions protrude perpendicularly to be a comb shape. The third portion extends to the extending direction. The fourth portions protrude perpendicularly to be a comb shape, and electrically connect to the source layer. Each of the second portions connects to the second gate layer through a contact hole.

Abstract translation: 碳化硅半导体器件包括：包括第一和第二栅极层，沟道层，源极层和沟槽的半导体衬底; 栅极布线，具有第一部分和多个第二部分; 以及具有第三部分和多个第四部分的源极布线。 沟槽沿预定的延伸方向延伸。 第一部分连接到沟槽中的第一栅极层，并延伸到延伸方向。 第二部分垂直突出成为梳形。 第三部分延伸到延伸方向。 第四部分垂直突出成梳状，并且电连接到源层。 每个第二部分通过接触孔连接到第二栅极层。

公开(公告)号：US20050139859A1

公开(公告)日：2005-06-30

申请号：US10984957

申请日：2004-11-10

Applicant: Rajesh Kumar ,  Andrei Mihaila ,  Florin Udrea

Inventor： Rajesh Kumar ,  Andrei Mihaila ,  Florin Udrea

IPC: H01L29/80 ,  H01L21/04 ,  H01L21/337 ,  H01L29/24 ,  H01L29/808 ,  H01L29/06

CPC classification number: H01L29/1608 ,  H01L29/66068 ,  H01L29/8083 ,  Y10S438/931

Abstract: A silicon carbide semiconductor device includes a substrate and a junction field effect transistor. The transistor includes: a first semiconductor layer disposed on the substrate; a first gate layer disposed on a surface of the first semiconductor layer; a first channel layer adjacent to the first gate layer on the substrate; a first source layer connecting to the first channel layer electrically; a second gate layer adjacent to the first channel layer to sandwich the first channel layer; a second channel layer adjacent to the second gate layer to sandwich the second gate layer; a third gate layer adjacent to the second channel layer to sandwich the second channel layer; and a second source layer connecting to the second channel layer electrically.

Abstract translation: 碳化硅半导体器件包括衬底和结场效应晶体管。 晶体管包括：设置在基板上的第一半导体层; 设置在所述第一半导体层的表面上的第一栅极层; 与所述基板上的所述第一栅极层相邻的第一沟道层; 电连接到第一沟道层的第一源极层; 与所述第一沟道层相邻以夹住所述第一沟道层的第二栅极层; 与所述第二栅极层相邻以夹住所述第二栅极层的第二沟道层; 与所述第二沟道层相邻以夹住所述第二沟道层的第三栅极层; 以及电连接到第二沟道层的第二源极层。

公开(公告)号：US06900518B2

公开(公告)日：2005-05-31

申请号：US10694735

申请日：2003-10-29

Applicant: Florin Udrea ,  Gehan A. J. Amaratunga

Inventor： Florin Udrea ,  Gehan A. J. Amaratunga

IPC: H01L21/329 ,  H01L21/331 ,  H01L21/336 ,  H01L21/76 ,  H01L21/762 ,  H01L21/764 ,  H01L21/8234 ,  H01L27/08 ,  H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/12 ,  H01L29/20 ,  H01L29/24 ,  H01L29/32 ,  H01L29/423 ,  H01L29/739 ,  H01L29/78 ,  H01L29/786 ,  H01L29/861 ,  H01L29/00 ,  H01L23/58

CPC classification number: H01L29/7816 ,  H01L21/76289 ,  H01L21/764 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0657 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/083 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/42368 ,  H01L29/66325 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/7393 ,  H01L29/7394 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7801 ,  H01L29/7802 ,  H01L29/7812 ,  H01L29/7813 ,  H01L29/7824 ,  H01L29/7831 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A power semiconductor device has an active region that includes a drift region. At least a portion of the drift region is provided in a membrane which has opposed top and bottom surfaces. In one embodiment, the top surface of the membrane has electrical terminals connected directly or indirectly thereto to allow a voltage to be applied laterally across the drift region. In another embodiment, at least one electrical terminal is connected directly or indirectly to the top surface and at least one electrical terminal is connected directly or indirectly to the bottom surface to allow a voltage to be applied vertically across the drift region. In each of these embodiments, the bottom surface of the membrane does not have a semiconductor substrate positioned adjacent thereto.

Abstract translation: 功率半导体器件具有包括漂移区域的有源区域。 漂移区域的至少一部分设置在具有相对的顶表面和底表面的膜中。 在一个实施例中，膜的顶表面具有直接或间接连接到其上的电端子，以允许跨越漂移区横向施加电压。 在另一个实施例中，至少一个电端子直接或间接地连接到顶表面，并且至少一个电端子直接或间接地连接到底表面，以允许垂直地跨越漂移区域施加电压。 在这些实施例的每一个中，膜的底表面不具有与其相邻定位的半导体衬底。

公开(公告)号：US06703684B2

公开(公告)日：2004-03-09

申请号：US09957547

申请日：2001-09-21

Applicant: Florin Udrea ,  Gehan A. J. Amaratunga

Inventor： Florin Udrea ,  Gehan A. J. Amaratunga

IPC: H01L2900

CPC classification number: H01L29/7816 ,  H01L21/76289 ,  H01L21/764 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0657 ,  H01L29/0661 ,  H01L29/0696 ,  H01L29/083 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/42368 ,  H01L29/66325 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/7393 ,  H01L29/7394 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7801 ,  H01L29/7802 ,  H01L29/7812 ,  H01L29/7813 ,  H01L29/7824 ,  H01L29/7831 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A power semiconductor device (10) has an active region that includes a drift region (20). At least a portion of the drift region (20) is provided in a membrane (16) which has opposed top and bottom surfaces (15,17). In one embodiment, the top surface (15) of the membrane (16) has electrical terminals connected directly or indirectly thereto to allow a voltage to be applied laterally across the drift region (20). In another embodiment, at least one electrical terminal is connected directly or indirectly to the top surface (15) and at least one electrical terminal is connected directly or indirectly to the bottom surface (17) to allow a voltage to be applied vertically across the drift region (20). In each of these embodiments, the bottom surface (17) of the membrane (16) does not have a semiconductor substrate positioned adjacent thereto.

Abstract translation: 功率半导体器件（10）具有包括漂移区（20）的有源区。 漂移区域（20）的至少一部分设置在具有相对的顶表面和底表面（15,17）的膜（16）中。 在一个实施例中，膜（16）的顶表面（15）具有直接或间接连接到其上的电端子，以允许跨越漂移区域（20）横向施加电压。 在另一个实施例中，至少一个电端子直接或间接地连接到顶表面（15），并且至少一个电端子直接或间接地连接到底表面（17），以允许垂直地施加电压跨越漂移 区域（20）。 在这些实施例的每一个中，膜（16）的底表面（17）不具有与其相邻定位的半导体衬底。

公开(公告)号：US06566240B2

公开(公告)日：2003-05-20

申请号：US09957609

申请日：2001-09-21

Applicant: Florin Udrea ,  Gehan A. J. Amaratunga

Inventor： Florin Udrea ,  Gehan A. J. Amaratunga

IPC: H01L2144

CPC classification number: H01L23/3735 ,  H01L21/84 ,  H01L2924/0002 ,  H01L2924/10158 ,  H01L2924/00

Abstract: A semiconductor device having an active region is formed in a layer provided on a semiconductor substrate. At least a portion of the semiconductor substrate below at least a portion of the active region is removed such that the portion of the active region is provided in a membrane defined by that portion of the layer below which the semiconductor substrate has been removed. A heat conducting and electrically insulating layer is applied to the bottom surface of the membrane. The heat conducting and electrically insulating layer has a thermal conductivity that is higher than the thermal conductivity of the membrane so that the heat conducting and electrically insulating layer allows heat to pass from the active region into the heat conducting and electrically insulating layer during normal operation of the device.

公开(公告)号：US06445054B1

公开(公告)日：2002-09-03

申请号：US09636353

申请日：2000-08-10

Applicant: Tatjana Traijkovic ,  Florin Udrea ,  Gehan Anil Joseph Amaratunga

Inventor： Tatjana Traijkovic ,  Florin Udrea ,  Gehan Anil Joseph Amaratunga

IPC: H01L2358

CPC classification number: H01L29/0619 ,  H01L29/0638 ,  H01L29/0847 ,  H01L29/7397 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device comprises an active area with a voltage termination structure located adjacent to the active area at an edge portion of the device. The edge portion comprises a substrate region (12) of a first semiconductor type. The voltage termination structure comprises at least one first termination region (11) of a second semiconductor type, the or each first termination region having at least one of either second and third termination regions (11a, 11b) of third and fourth semiconductor types located at substantially opposing edges thereof. The second and third termination regions (11a, 11b) respectively have a higher semiconductor doping concentration than the edge portion substrate region (12) and a lower semiconductor doping concentration than the first termination region(s) (11).

Abstract translation: 一种半导体器件包括具有电压终端结构的有源区，位于器件的边缘部分附近与有源区相邻。 边缘部分包括第一半导体类型的衬底区域（12）。 电压端接结构包括至少一个第二半导体类型的第一端接区域（11），该或每个第一端接区域具有第三和第四半导体类型的第二和第三端接区域（11a，11b）中的至少一个位于 基本相对的边缘。 第二和第三端接区域（11a，11b）分别具有比边缘部分衬底区域（12）更高的半导体掺杂浓度和比第一端接区域（11）更低的半导体掺杂浓度。

公开(公告)号：US20160260824A1

公开(公告)日：2016-09-08

申请号：US14986150

申请日：2015-12-31

Applicant: Florin Udrea ,  Alice Pei-Shan Hsieh ,  Gianluca Camuso ,  Chiu Ng ,  Yi Tang ,  Rajeev Krishna Vytla

Inventor： Florin Udrea ,  Alice Pei-Shan Hsieh ,  Gianluca Camuso ,  Chiu Ng ,  Yi Tang ,  Rajeev Krishna Vytla

IPC: H01L29/739 ,  H01L29/10 ,  H01L29/06

CPC classification number: H01L29/7397 ,  H01L29/0634 ,  H01L29/41708 ,  H01L29/7394

Abstract: There are disclosed herein various implementations of a bipolar semiconductor device having a charge-balanced inter-trench structure. Such a device includes a drift region having a first conductivity type situated over an anode layer having a second conductivity type. The device also includes first and second control trenches extending through an inversion region having the second conductivity type into the drift region, each of the first and second control trenches being bordered by a cathode diffusion having the first conductivity type. In addition, the device includes an inter-trench structure situated in the drift region between the first and second control trenches. The inter-trench structure includes one or more first conductivity regions having the first conductivity type and one or more second conductivity region having the second conductivity type, the one or more first conductivity regions and the one or more second conductivity regions configured to substantially charge-balance the inter-trench structure.

Abstract translation: 这里公开了具有电荷平衡的沟槽间结构的双极半导体器件的各种实施方式。 这种器件包括位于具有第二导电类型的阳极层上的具有第一导电类型的漂移区。 该器件还包括延伸穿过具有第二导电类型的反向区域到漂移区域中的第一和第二控制沟槽，第一和第二控制沟槽中的每一个都由具有第一导电类型的阴极扩散区界定。 此外，该器件包括位于第一和第二控制沟槽之间的漂移区域中的沟槽间结构。 沟槽间结构包括具有第一导电类型的一个或多个第一导电区域和具有第二导电类型的一个或多个第二导电区域，一个或多个第一导电区域和一个或多个第二导电区域， 平衡沟槽间结构。

公开(公告)号：US08816468B2

公开(公告)日：2014-08-26

申请号：US13222249

申请日：2011-08-31

Applicant: Chih-Wei Hsu ,  Florin Udrea ,  Yih-Yin Lin

Inventor： Chih-Wei Hsu ,  Florin Udrea ,  Yih-Yin Lin

IPC: H01L29/872

CPC classification number: H01L29/66143 ,  H01L21/22 ,  H01L21/265 ,  H01L29/0619 ,  H01L29/872 ,  H01L29/8725

Abstract: A semiconductor rectifier includes a semiconductor substrate having a first type of conductivity. A first layer, which is formed on the substrate, has the first type of conductivity and is more lightly doped than the substrate. A second layer having a second type of conductivity is formed on the substrate and a metal layer is disposed over the second layer. The second layer is lightly doped so that a Schottky contact is formed between the metal layer and the second layer. A first electrode is formed over the metal layer and a second electrode is formed on a backside of the substrate.

Abstract translation: 半导体整流器包括具有第一类导电性的半导体衬底。 形成在基板上的第一层具有第一类导电性，并且比衬底更轻掺杂。 在基板上形成具有第二导电类型的第二层，并且金属层设置在第二层上。 第二层被轻掺杂，使得在金属层和第二层之间形成肖特基接触。 第一电极形成在金属层的上方，第二电极形成在基板的背面。

公开(公告)号：US07999369B2

公开(公告)日：2011-08-16

申请号：US11511516

申请日：2006-08-29

Applicant: Rajesh Kumar Malhan ,  C. Mark Johnson ,  Cyril Buttay ,  Jeremy Rashid ,  Florin Udrea

Inventor： Rajesh Kumar Malhan ,  C. Mark Johnson ,  Cyril Buttay ,  Jeremy Rashid ,  Florin Udrea

IPC: H01L23/48

CPC classification number: H01L23/49844 ,  H01L23/5385 ,  H01L24/31 ,  H01L24/83 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/33 ,  H01L2224/81894 ,  H01L2224/83801 ,  H01L2224/83894 ,  H01L2924/01079 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/00

Abstract: A power electronic package includes: first and second high thermal conductivity insulating non-planar substrates; and multiple semiconductor chips and electronic components between the substrates. Each substrate includes multiple electrical insulator layers and patterned electrical conductor layers connecting to the electronic components, and further includes multiple raised regions or posts, which are bonded together so that the substrates are mechanically and electrically connected. The number, arrangement, and shape of the raised regions or posts are adjusted to have mechanical separation between the substrates. The electrical conductor layers are separated and isolated one another so that multiple electric circuits are provided on at least one of the substrates.

Abstract translation: 电力电子封装包括：第一和第二高导热绝缘非平面基板; 以及基板之间的多个半导体芯片和电子部件。 每个衬底包括多个电绝缘体层和连接到电子部件的图案化电导体层，并且还包括多个凸起区域或柱体，这些凸起区域或柱体被结合在一起，使得衬底机械地和电连接。 调整凸起区域或柱的数量，布置和形状以在基板之间具有机械分离。 电导体层彼此分离和隔离，使得在至少一个基板上设置多个电路。

公开(公告)号：US20110174799A1

公开(公告)日：2011-07-21

申请号：US12691104

申请日：2010-01-21

Applicant: Syed Zeeshan ALI ,  Florin Udrea ,  Julian William Gardner

Inventor： Syed Zeeshan ALI ,  Florin Udrea ,  Julian William Gardner

IPC: H05B3/68 ,  H01L21/3065 ,  H01L21/306

CPC classification number: H05B3/267 ,  Y10T29/49083

Abstract: A micro-hotplate is provided in the form of a device comprising a sensor and one or more resistive heaters within the micro-hotplate arranged to heat the sensor. Furthermore a controller is provided for applying a bidirectional drive current to at least one of the heaters to reduce electromigration. The controller also serves to drive the heater at a substantially constant temperature. Such an arrangement is advantageous over an arrangement in which a unidirectional DC drive current is applied to the heater. This is because the unidirectional drive current causes electromigration which results in an increase in resistance over time. This is undesirable because it can lead to failure of the micro-hotplate. In contrast, the application of the bidirectional current reduces electromigration and as a result there is insignificant change in the resistance of the heater over time and under high temperature. This in turn improves the reliability of the micro-hotplate and therefore helps to improve the lifetime of the sensor

Abstract translation: 提供微电子装置的形式包括传感器和微电热板内的一个或多个电阻加热器，其布置成加热传感器。 此外，提供了一种控制器，用于向至少一个加热器施加双向驱动电流以减少电迁移。 控制器还用于以基本恒定的温度驱动加热器。 这种布置对于将单向DC驱动电流施加到加热器的布置是有利的。 这是因为单向驱动电流导致电迁移，导致电阻随时间的增加。 这是不希望的，因为它可能导致微电热板的故障。 相比之下，双向电流的应用减少了电迁移，结果是随着时间的推移和高温下电阻的电阻变化不大。 这又提高了微型电热板的可靠性，因此有助于提高传感器的使用寿命