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公开(公告)号:US10290768B2
公开(公告)日:2019-05-14
申请号:US15704982
申请日:2017-09-14
Applicant: GLOBALFOUNDRIES Inc.
Inventor: Srinivasa Banna , Deepak Nayak
IPC: H01L29/06 , H01L31/00 , H01L33/06 , H01L33/00 , H01L33/32 , H01L33/30 , H01L27/15 , H01L33/42 , H01L33/44 , H01L33/62 , H01L33/24
Abstract: Methods of forming an integrated InGaN/GaN or AlInGaP/InGaP LED on Si CMOS for RGB colors and the resulting devices are provided. Embodiments include forming trenches having a v-shaped bottom through an oxide layer and a portion of a substrate; forming AlN or GaAs in the v-shaped bottom; forming a n-GaN or n-InGaP pillar on the AlN or GaAs through and above the first oxide layer; forming an InGaN/GaN MQW or AlInGaP/InGaP MQW over the n-GaN or n-InGaP pillar; forming a p-GaN or p-InGaP layer over the n-GaN pillar and InGaN/GaN MQW or the n-InGaP pillar and AlInGaP/InGaP MQW down to the first oxide layer; forming a TCO layer over the first oxide layer and the p-GaN or p-InGaP layer; forming a second oxide layer over the TCO layer; and forming a metal pad on the TCO layer above each n-GaN or n-InGaP pillar.
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公开(公告)号:US10037981B2
公开(公告)日:2018-07-31
申请号:US15599465
申请日:2017-05-18
Applicant: GLOBALFOUNDRIES Inc.
Inventor: Srinivasa Banna , Sanjay Jha , Deepak Nayak , Ajey P. Jacob
IPC: H01L33/00 , H01L25/16 , H01L23/48 , H01L25/00 , H01L23/00 , H01L25/075 , H01L27/15 , H01L33/32 , H01L33/06 , H01L33/24 , H01L27/092 , H01L21/8258 , H01L27/06
CPC classification number: H01L25/167 , H01L21/76898 , H01L21/8258 , H01L23/481 , H01L24/06 , H01L24/08 , H01L25/0753 , H01L25/50 , H01L27/0688 , H01L27/092 , H01L27/156 , H01L33/06 , H01L33/24 , H01L33/32 , H01L2224/06181 , H01L2224/08146 , H01L2224/08147
Abstract: A display system is disclosed. The display system comprises a light emitting diode (LED) device and a backplane (BP) device. The LED device comprises a plurality of LEDs having LED terminals. An LED bonding surface comprising a dielectric layer with LED bonding surface contact pads is coupled to diode terminals of the LEDs. The backplane (BP) device comprises a BP substrate having top and bottom surfaces. A plurality of system on chip (SoC) chips are bonded to chip pads disposed on a bottom surface of the BP device. The SoC chips are electrically coupled to the CMOS components of the BP device and LEDs of the LED device.
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公开(公告)号:US09627389B1
公开(公告)日:2017-04-18
申请号:US15003304
申请日:2016-01-21
Applicant: GLOBALFOUNDRIES Inc.
Inventor: Youngtag Woo , Lei Yuan , Srinivasa Banna
IPC: H01L21/311 , H01L27/11 , H01L29/66
CPC classification number: H01L27/1104 , H01L29/6653 , H01L29/66545 , H01L29/6656
Abstract: Methods to utilize efficient processes to form and use merged spacers in fin generation and the resulting devices are disclosed. Embodiments include providing mandrels separated from each other across two adjacent bit-cells on an upper surface of a dielectric layer on an upper surface of a silicon (Si) layer; forming first spacers on opposite sides of each mandrel; forming second spacers on exposed sides of the first spacers; removing the mandrels; removing exposed sections of the dielectric layer; removing the first and second spacers; forming fin-spacers on opposite sides of remaining sections of the dielectric layer; removing the remaining sections of the dielectric layer; removing exposed sections of the Si layer; and removing the fin-spacers to reveal Si fins.
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公开(公告)号:US10396121B2
公开(公告)日:2019-08-27
申请号:US15680948
申请日:2017-08-18
Applicant: GLOBALFOUNDRIES INC.
Inventor: Ajey P. Jacob , Srinivasa Banna , Deepak Nayak
Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to finFETs for light emitting diode displays and methods of manufacture. The method includes: forming replacement fin structures with a doped core region, on doped substrate material; forming quantum wells over the replacement fin structures; forming a first color emitting region by doping at least one of the quantum wells over at least a first replacement fin structure of the replacement fin structures, while protecting at least a second replacement fin structure of the replacement fin structures; and forming a second color emitting region by doping another one of the quantum wells over the at least second replacement fin structure of the replacement fin structures, while protecting the first replacement fin structure and other replacement fin structures which are not to be doped.
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公开(公告)号:US10283560B2
公开(公告)日:2019-05-07
申请号:US15899374
申请日:2018-02-20
Applicant: GLOBALFOUNDRIES INC.
Inventor: Deepak Nayak , Srinivasa Banna , Ajey P. Jacob
Abstract: Disclosed is a device which includes first and second major substrate surfaces. The first substrate surface includes an LED with first and second terminals while the second substrate surface includes CMOS circuit components. The CMOS components and LED are coupled by through silicon via (TSV) contacts which extend through the second substrate surface.
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公开(公告)号:US10193011B1
公开(公告)日:2019-01-29
申请号:US15650427
申请日:2017-07-14
Applicant: GLOBALFOUNDRIES Inc.
Inventor: Srinivasa Banna , Deepak Nayak , Luke England , Rahul Agarwal
Abstract: Methods of forming an integrated RGB LED and Si CMOS driver wafer and the resulting devices are provided. Embodiments include providing a plurality of first color die over a CMOS wafer, each first color die being laterally separated with a first oxide and electrically connected to the CMOS wafer; providing a second color die above each first color die, each second color die being separated from each other with a second oxide, bonded to a first color die, and electrically connected to the CMOS wafer through the bonded first color die; removing a portion of each second color die to expose a portion of each bonded first color die; forming a conformal TCO layer over each first and second color die and on a side surface of each second color die and oxide; forming a PECVD oxide layer over the CMOS wafer; and planarizing the PECVD oxide layer.
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公开(公告)号:US09941330B2
公开(公告)日:2018-04-10
申请号:US15599458
申请日:2017-05-18
Applicant: GLOBALFOUNDRIES INC.
Inventor: Srinivasa Banna , Deepak Nayak , Ajey P. Jacob
IPC: H01L21/00 , H01L27/15 , H01L33/06 , H01L33/16 , H01L33/32 , H01L33/12 , H01L33/62 , H01L33/20 , H01L33/00
CPC classification number: H01L27/156 , H01L33/0025 , H01L33/007 , H01L33/06 , H01L33/12 , H01L33/16 , H01L33/20 , H01L33/24 , H01L33/32 , H01L33/62 , H01L2933/0066
Abstract: Devices and methods of forming the devices are disclosed. The device includes a substrate and a color LED pixel disposed on the substrate. The color LED pixel includes a red LED, a green LED and a blue LED. Each of the color LED includes a specific color LED body disposed on the respective color region on the substrate, a specific color multiple quantum well (MQW) on the respective color LED body and a specific color top LED layer disposed over the respective color MQW. The MQWs of the red LED, green LED and blue LED includes at least an indium gallium nitride (InxGa1−xN) layer and a gallium nitride (GaN), where x is the atomic percentage of In in the InxGa1−xN layer, and the MQWs of the red LED, green LED and blue LED have different bandgaps by varying x of the InxGa1−xN layer in the red LED, the green LED and the blue LED.
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公开(公告)号:US09941329B2
公开(公告)日:2018-04-10
申请号:US15599438
申请日:2017-05-18
Applicant: GLOBALFOUNDRIES INC.
Inventor: Deepak Nayak , Srinivasa Banna , Ajey P. Jacob
CPC classification number: H01L27/156 , H01L23/481 , H01L33/0029 , H01L33/06 , H01L33/24 , H01L2933/0066
Abstract: Disclosed is a multi-color semiconductor LED display with integrated with CMOS circuit components, such as thin film transistors (TFTs). LEDs of the display are disposed on a first major surface of a substrate while CMOS circuit components which are configured as circuitry for operating the display are disposed on a second opposing major surface of the substrate. The CMOS components and LEDs are coupled by through silicon via (TSV) contacts through the substrate. Integrating CMOS components with LED on one substrate enhances compactness of the display. Other advantages include low power and low cost with high brightness and resolution desired for portable applications, including virtual reality and augmented reality applications.
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公开(公告)号:US09685529B1
公开(公告)日:2017-06-20
申请号:US15189476
申请日:2016-06-22
Applicant: GLOBALFOUNDRIES Inc.
Inventor: Deepak Nayak , Zoran Krivokapic , Srinivasa Banna
IPC: H01L21/768 , H01L29/66 , H01L23/532
CPC classification number: H01L29/66522 , H01L21/76867 , H01L23/53271 , H01L29/66545 , H01L29/6656 , H01L29/66795 , H01L29/785
Abstract: Methods for creating barrier layers in a III-V electron channel to reduce band-to-band leakage current and the resulting devices are disclosed. Embodiments include forming a fin channel portion comprising a III-V material, on a barrier layer; forming undoped InP semiconductor spacers at opposite ends of the fin channel portion on the barrier layer; forming S/D regions adjacent the undoped InP semiconductor spacers on the barrier layer; and forming a high-k/metal gate over the fin channel portion and undoped InP semiconductor spacers.
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