公开(公告)号：US07635908B2

公开(公告)日：2009-12-22

申请号：US11652157

申请日：2007-01-11

申请人： Hans-Joachim Barth ,  Helmut Tews

发明人： Hans-Joachim Barth ,  Helmut Tews

IPC分类号： H01L29/00

CPC分类号： H01L23/5223 ,  H01L27/0805 ,  H01L28/91 ,  H01L2924/0002 ,  H01L2924/00

摘要： The invention relates to a method for producing a capacitor arrangement, and to a corresponding capacitor arrangement, wherein the first insulating layer is formed at the surface of a carrier substrate and a first capacitor electrode with a multiplicity of interspaced first interconnects is produced in said insulating layer. Using a mask layer, partial regions of the first insulating layer are removed for the purpose of uncovering the multiplicity of first interconnects, and after the formation of a capacitor dielectric at the surface of the uncovered first interconnects, a second capacitor electrode is formed with a multiplicity of interspaced second interconnects lying between the first interconnects coated with capacitor dielectric. This additionally simplified production method enables self-aligning and cost-effective production of capacitors having a high capacitance per unit area and mechanical stability.

摘要翻译： 本发明涉及一种用于制造电容器装置的方法和相应的电容器装置，其中第一绝缘层形成在载体衬底的表面，并且在所述绝缘体中产生具有多个间隔第一互连的第一电容器电极 层。 使用掩模层，为了揭露多个第一互连的目的，除去第一绝缘层的部分区域，并且在未覆盖的第一互连件的表面上形成电容器电介质之后，形成第二电容器电极 位于涂覆有电容器电介质的第一互连之间的间隔第二互连的多重性。 这种另外简化的制造方法能够实现具有每单位面积的高电容和机械稳定性的电容器的自对准和成本有效的生产。

公开(公告)号：US20090236647A1

公开(公告)日：2009-09-24

申请号：US12050192

申请日：2008-03-18

申请人： Hans-Joachim Barth ,  Helmut Tews

发明人： Hans-Joachim Barth ,  Helmut Tews

IPC分类号： H01L29/00 ,  H01L21/00

CPC分类号： H01L23/5389 ,  H01L23/49861 ,  H01L23/50 ,  H01L23/642 ,  H01L24/24 ,  H01L24/82 ,  H01L24/96 ,  H01L28/40 ,  H01L2224/24137 ,  H01L2224/24195 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01044 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01068 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/00

摘要： An embodiment of the invention is a semiconductor structure, comprising: a semiconductor chip at least partially embedded within a support; and a capacitor disposed outside the lateral boundary of the chip, the capacitor electrically coupled to the chip.

摘要翻译： 本发明的实施例是一种半导体结构，包括：半导体芯片，其至少部分地嵌入在支撑体内; 以及设置在所述芯片的横向边界外侧的电容器，所述电容器电耦合到所述芯片。

公开(公告)号：US20070155090A1

公开(公告)日：2007-07-05

申请号：US11652157

申请日：2007-01-11

申请人： Hans-Joachim Barth ,  Helmut Tews

发明人： Hans-Joachim Barth ,  Helmut Tews

IPC分类号： H01L21/8242 ,  H01L21/20

CPC分类号： H01L23/5223 ,  H01L27/0805 ,  H01L28/91 ,  H01L2924/0002 ,  H01L2924/00

摘要： The invention relates to a method for producing a capacitor arrangement, and to a corresponding capacitor arrangement, wherein the first insulating layer is formed at the surface of a carrier substrate and a first capacitor electrode with a multiplicity of interspaced first interconnects is produced in said insulating layer. Using a mask layer, partial regions of the first insulating layer are removed for the purpose of uncovering the multiplicity of first interconnects, and after the formation of a capacitor dielectric at the surface of the uncovered first interconnects, a second capacitor electrode is formed with a multiplicity of interspaced second interconnects lying between the first interconnects coated with capacitor dielectric. This additionally simplified production method enables self-aligning and cost-effective production of capacitors having a high capacitance per unit area and mechanical stability.

摘要翻译： 本发明涉及一种用于制造电容器装置的方法和相应的电容器装置，其中第一绝缘层形成在载体衬底的表面，并且在所述绝缘体中产生具有多个间隔第一互连的第一电容器电极 层。 使用掩模层，为了揭露多个第一互连的目的，除去第一绝缘层的部分区域，并且在未覆盖的第一互连件的表面上形成电容器电介质之后，形成第二电容器电极 位于涂覆有电容器电介质的第一互连之间的间隔第二互连的多重性。 这种另外简化的制造方法能够实现具有每单位面积的高电容和机械稳定性的电容器的自对准和成本有效的生产。

公开(公告)号：US07915132B2

公开(公告)日：2011-03-29

申请号：US12562460

申请日：2009-09-18

申请人： Hans-Joachim Barth ,  Helmut Tews

发明人： Hans-Joachim Barth ,  Helmut Tews

IPC分类号： H01L21/20

CPC分类号： H01L23/5223 ,  H01L27/0805 ,  H01L28/91 ,  H01L2924/0002 ,  H01L2924/00

摘要： The invention relates to a method for producing a capacitor arrangement, and to a corresponding capacitor arrangement, wherein the first insulating layer is formed at the surface of a carrier substrate and a first capacitor electrode with a multiplicity of interspaced first interconnects is produced in said insulating layer. Using a mask layer, partial regions of the first insulating layer are removed for the purpose of uncovering the multiplicity of first interconnects, and after the formation of a capacitor dielectric at the surface of the uncovered first interconnects, a second capacitor electrode is formed with a multiplicity of interspaced second interconnects lying between the first interconnects coated with capacitor dielectric. This additionally simplified production method enables self-aligning and cost-effective production of capacitors having a high capacitance per unit area and mechanical stability.

摘要翻译： 本发明涉及一种用于制造电容器装置的方法和相应的电容器装置，其中第一绝缘层形成在载体衬底的表面，并且在所述绝缘体中产生具有多个间隔第一互连的第一电容器电极 层。 使用掩模层，为了揭露多个第一互连的目的，除去第一绝缘层的部分区域，并且在未覆盖的第一互连件的表面上形成电容器电介质之后，形成第二电容器电极 位于涂覆有电容器电介质的第一互连之间的间隔第二互连的多重性。 这种另外简化的制造方法能够实现具有每单位面积的高电容和机械稳定性的电容器的自对准和成本有效的生产。

公开(公告)号：US20100001373A1

公开(公告)日：2010-01-07

申请号：US12562460

申请日：2009-09-18

申请人： Hans-Joachim Barth ,  Helmut Tews

发明人： Hans-Joachim Barth ,  Helmut Tews

IPC分类号： H01L29/92 ,  H01L21/02

CPC分类号： H01L23/5223 ,  H01L27/0805 ,  H01L28/91 ,  H01L2924/0002 ,  H01L2924/00

摘要： The invention relates to a method for producing a capacitor arrangement, and to a corresponding capacitor arrangement, wherein the first insulating layer is formed at the surface of a carrier substrate and a first capacitor electrode with a multiplicity of interspaced first interconnects is produced in said insulating layer. Using a mask layer, partial regions of the first insulating layer are removed for the purpose of uncovering the multiplicity of first interconnects, and after the formation of a capacitor dielectric at the surface of the uncovered first interconnects, a second capacitor electrode is formed with a multiplicity of interspaced second interconnects lying between the first interconnects coated with capacitor dielectric. This additionally simplified production method enables self-aligning and cost-effective production of capacitors having a high capacitance per unit area and mechanical stability.

摘要翻译： 本发明涉及一种用于制造电容器装置的方法和相应的电容器装置，其中第一绝缘层形成在载体衬底的表面，并且在所述绝缘体中产生具有多个间隔第一互连的第一电容器电极 层。 使用掩模层，为了揭露多个第一互连的目的，除去第一绝缘层的部分区域，并且在未覆盖的第一互连件的表面上形成电容器电介质之后，形成第二电容器电极 位于涂覆有电容器电介质的第一互连之间的间隔第二互连的多重性。 这种另外简化的制造方法能够实现具有每单位面积的高电容和机械稳定性的电容器的自对准和成本有效的生产。

公开(公告)号：US20060005902A1

公开(公告)日：2006-01-12

申请号：US10512016

申请日：2003-04-10

申请人： Hans-Joachim Barth ,  Helmut Tews

发明人： Hans-Joachim Barth ,  Helmut Tews

IPC分类号： C22F1/00

CPC分类号： H01L21/76886

摘要： The invention relates to a method for fabricating thin metal-containing layers (5C) having low electrical resistance, firstly a metal-containing starting layer (5A) having a first grain size being formed on a carrier material (2). Afterwards, a locally delimited thermal region (W) is produced and moved in the metal-containing starting layer (5A) in such a way that a recrystallization of the metal-containing starting layer (5A) is carried out for the purpose of producing the metal-containing layer (5C) having a second grain size, which is enlarged with respect to the first grain size. A metal-containing layer having improved electrical properties is obtained in this way.

摘要翻译： 本发明涉及一种用于制造具有低电阻的薄金属层（5C）的方法，首先在载体材料（2）上形成具有第一晶粒尺寸的含金属的起始层（5A）。 然后，在含金属的起始层（5A）中产生局部限制的热区（W）并移动，使得含金属的起始层（5A）的再结晶进行为 制备具有第二晶粒尺寸的含金属层（5 C），其相对于第一晶粒尺寸扩大。 以这种方式获得具有改善的电性能的含金属层。

公开(公告)号：US09245799B2

公开(公告)日：2016-01-26

申请号：US13484352

申请日：2012-05-31

申请人： Hans-Joachim Barth

发明人： Hans-Joachim Barth

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L27/108 ,  H01L21/768

CPC分类号： H01L21/76898 ,  H01L21/02203 ,  H01L21/76802 ,  H01L21/7682 ,  H01L21/76828 ,  H01L21/76831 ,  H01L21/76895 ,  H01L23/481 ,  H01L2924/0002 ,  H01L2924/0001 ,  H01L2924/00

摘要： A semiconductor device includes a substrate having a top surface. A semiconductor circuit defines a circuit area on the top surface of the substrate. An interconnect is spaced apart from the circuit area and extends from the top surface into the substrate. The interconnect includes a sidewall formed of an electrically insulating material. An opening is provided in the sidewall.

摘要翻译： 半导体器件包括具有顶表面的衬底。 半导体电路限定了衬底的顶表面上的电路区域。 互连件与电路区域间隔开并从顶表面延伸到衬底中。 互连包括由电绝缘材料形成的侧壁。 在侧壁中设置开口。

公开(公告)号：US09012297B2

公开(公告)日：2015-04-21

申请号：US12876866

申请日：2010-09-07

申请人： Hans-Joachim Barth ,  Helmut Horst Tews

发明人： Hans-Joachim Barth ,  Helmut Horst Tews

IPC分类号： H01L21/441 ,  H01L27/08 ,  H01L23/522 ,  H01L23/00 ,  H01L23/58 ,  H01L27/06

CPC分类号： H01L28/75 ,  G06F17/5068 ,  H01L21/76897 ,  H01L22/14 ,  H01L23/5223 ,  H01L23/5226 ,  H01L23/562 ,  H01L23/585 ,  H01L27/0611 ,  H01L27/0805 ,  H01L2924/0002 ,  H01L2924/00

摘要： Structures and methods of forming moisture barrier capacitor on a semiconductor component are disclosed. The capacitor is located on the periphery of a semiconductor chip and includes an inner plate electrically connected to a voltage node, an outer plate with fins for electrically connecting to a different voltage node.

摘要翻译： 公开了在半导体部件上形成防潮电容器的结构和方法。 电容器位于半导体芯片的周围，并且包括电连接到电压节点的内板，具有用于电连接到不同电压节点的翅片的外板。

公开(公告)号：US20140291819A1

公开(公告)日：2014-10-02

申请号：US13854449

申请日：2013-04-01

申请人： Hans-Joachim Barth

发明人： Hans-Joachim Barth

IPC分类号： H01L23/532 ,  H01L23/552 ,  H01L21/768

CPC分类号： H01L51/0048 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/768 ,  H01L21/76805 ,  H01L21/76849 ,  H01L21/76852 ,  H01L21/76879 ,  H01L23/147 ,  H01L23/49811 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49872 ,  H01L23/5226 ,  H01L23/5227 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266 ,  H01L23/53276 ,  H01L23/645 ,  H01L24/13 ,  H01L24/16 ,  H01L24/48 ,  H01L29/1606 ,  H01L2221/1094 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/451 ,  H01L2224/48227 ,  H01L2924/12032 ,  H01L2924/14 ,  H01L2924/1431 ,  H01L2924/1433 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/014 ,  H01L2924/00

摘要： Embodiments of the present disclosure are directed towards techniques and configurations for hybrid carbon-metal interconnect structures in integrated circuit assemblies. In one embodiment, an apparatus includes a substrate, a metal interconnect layer disposed on the substrate and configured to serve as a growth initiation layer for a graphene layer and the graphene layer, wherein the graphene layer is formed directly on the metal interconnect layer, the metal interconnect layer and the graphene layer being configured to route electrical signals. Other embodiments may be described and/or claimed.

摘要翻译： 本公开的实施例涉及集成电路组件中的混合碳 - 金属互连结构的技术和配置。 在一个实施例中，一种装置包括衬底，设置在衬底上并被配置为用作石墨烯层和石墨烯层的生长起始层的金属互连层，其中石墨烯层直接形成在金属互连层上， 金属互连层和石墨烯层被配置为路由电信号。 可以描述和/或要求保护其他实施例。

公开(公告)号：US07986033B2

公开(公告)日：2011-07-26

申请号：US12124335

申请日：2008-05-21

申请人： Hans-Joachim Barth

发明人： Hans-Joachim Barth

IPC分类号： H01L23/02

CPC分类号： H01L25/0657 ,  H01L23/34 ,  H01L2225/06513 ,  H01L2225/06589 ,  H01L2924/0002 ,  H01L2924/01079 ,  H01L2924/00

摘要： A three-dimensional multichip module includes a first integrated circuit chip having at least one first high-temperature functional area and one first low-temperature functional area, and at least one second integrated circuit chip having a second high-temperature functional area and a second low-temperature functional area. The second high-temperature functional area is arranged opposite the first low-temperature functional area. As an alternative, at least one low-temperature chip having only one low-temperature functional area can also be arranged between the first and second chips.

摘要翻译： 三维多芯片模块包括具有至少一个第一高温功能区和一个第一低温功能区的第一集成电路芯片和至少一个具有第二高温功能区和第二高温功能区的第二集成电路芯片 低温功能区。 第二高温功能区与第一低温功能区相对。 作为替代，也可以在第一和第二芯片之间设置至少一个仅具有一个低温功能区的低温芯片。