利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

53 条记录 (耗时 0.035 秒)

    Nonvolatile semiconductor storage device and write time determining method therefor
    14.
    发明授权
    Nonvolatile semiconductor storage device and write time determining method therefor 有权
    非易失性半导体存储装置及其写入时间确定方法

    公开(公告)号：US06987703B2

    公开(公告)日：2006-01-17

    申请号：US10266942

    申请日：2002-10-09

    申请人： Hidehiko Tanaka

    发明人： Hidehiko Tanaka

    IPC分类号： G11C7/00

    CPC分类号： G11C16/3459 ,  G11C16/10 ,  G11C16/32 ,  G11C16/3454

    摘要： A flash memory constructed of a plurality of memory cells M11, . . . , Mn3 selected by the outputs of an X-decoder 1 and a Y-decoder 2 for generating a row address and a column address is provided with a measurement use write pulse generator circuit 7, which simultaneously supplies write signals of different pulse widths to the memory cells on an identical column, and a select circuit 5, which switches over so as to supply the write signals from the measurement use write pulse generator circuit 7 to the word lines M11, . . . , Mn1 on the identical column during pulse width measurement and supply the word line signal from the X-decoder 1 to the corresponding one word line WL1 during normal access. According to this flash memory, the total write time can be reduced by reducing the frequency of repetition of write and verify.

    摘要翻译： 由多个存储单元M 11构成的闪速存储器。 。 。 由用于产生行地址和列地址的X解码器1和Y解码器2的输出选择的M SUB33被提供有测量用写入脉冲发生器电路7，其同时提供 将不同脉冲宽度的信号写入同一列上的存储单元，以及选择电路5，其切换以便将来自测量用写入脉冲发生器电路7的写信号提供给字线M 11， / SUB>，。 。 。 ，Mn1n1在同一列上，并在正常访问期间将来自X解码器1的字线信号提供给对应的一条字线WL1。 根据这个闪存，可以通过减少写入和验证的重复频率来减少总写入时间。

    Semiconductor memory device
    15.
    发明授权
    Semiconductor memory device 失效
    半导体存储器件

    公开(公告)号：US6038162A

    公开(公告)日：2000-03-14

    申请号：US256941

    申请日：1999-02-24

    申请人： Hidekazu Takata ,  Hidehiko Tanaka

    发明人： Hidekazu Takata ,  Hidehiko Tanaka

    IPC分类号： G11C14/00 ,  G11C11/22

    CPC分类号： G11C11/22

    摘要： A semiconductor memory device includes: a plurality of word lines; a plurality of drive lines; a word line driving section for activating one of the plurality of word lines in accordance with a row address; a column selection section for, in accordance with a column address, selecting one of a plurality of ferroelectric memory cells coupled to the activated word line; a plate driving signal application section for applying a plate driving signal to at least a selected one of the plurality of drive lines, the at least one selected drive line being associated with the activated word line; and a switching section for coupling or detaching the plurality of ferroelectric memory cells to or from the at least one selected drive line. The column selection section controls the switching section so that only the selected ferroelectric memory cell is coupled to the at least one selected drive line.

    摘要翻译： 半导体存储器件包括：多个字线; 多个驱动线; 字线驱动部，用于根据行地址来激活所述多个字线中的一个; 列选择部分，用于根据列地址选择耦合到激活字线的多个铁电存储器单元中的一个; 板驱动信号施加部，用于将板驱动信号施加到所述多个驱动线中的至少一个选择的驱动线，所述至少一个所选驱动线与所述激活字线相关联; 以及切换部分，用于将所述多个铁电存储器单元耦合到所述至少一个所选驱动线路或从所述至少一个所选择的驱动线路分离。 列选择部分控制切换部分，使得仅选择的铁电存储器单元耦合到至少一个所选择的驱动线。

    Semiconductor memory device and method for controlling the same
    16.
    发明授权
    Semiconductor memory device and method for controlling the same 失效
    半导体存储器件及其控制方法

    公开(公告)号：US6028812A

    公开(公告)日：2000-02-22

    申请号：US261734

    申请日：1999-03-03

    申请人： Hidehiko Tanaka

    发明人： Hidehiko Tanaka

    IPC分类号： G11C11/407 ,  G11C7/06 ,  G11C7/10 ,  G11C11/401 ,  G11C11/409 ,  G11C7/00

    CPC分类号： G11C7/065 ,  G11C7/06 ,  G11C7/1042

    摘要： A semiconductor memory device includes at least two memory cells included in a first bank; at least two word lines; and a first sensing amplifier and a second sensing amplifier. The first sensing amplifier amplifies and holds data of one of the memory cells connected to one of the word lines. The second sensing amplifier amplifies and holds data of one other memory cell connected to one other word line.

    摘要翻译： 半导体存储器件包括包括在第一存储体中的至少两个存储器单元; 至少两条字线; 以及第一感测放大器和第二感测放大器。 第一感测放大器放大并保持连接到一条字线的一个存储单元的数据。 第二感测放大器放大并保持连接到另一个字线的另一个存储单元的数据。

    Semiconductor memory device for temporarily storing digital image data
    17.
    发明授权
    Semiconductor memory device for temporarily storing digital image data 失效
    用于临时存储数字图像数据的半导体存储器件

    公开(公告)号：US5917770A

    公开(公告)日：1999-06-29

    申请号：US929625

    申请日：1997-09-15

    申请人： Hidehiko Tanaka

    发明人： Hidehiko Tanaka

    IPC分类号： G11C11/401 ,  G11C8/00 ,  G11C8/10 ,  G11C8/12

    CPC分类号： G11C8/00 ,  G11C8/10 ,  G11C8/12

    摘要： A semiconductor memory device of the present invention includes a memory cell array including m sub-arrays, each having a number of memory cells arranged in a matrix and including M/m (m is an integer of 2 or more; M/m is an integer of 2 or more) memory rows and N (N is an integer of 2 or more) memory columns. In an image space in a matrix including M pixel rows and N pixel columns, the M pixel rows are divided into M/m blocks, m pixel rows in each of the M/m blocks are in a one-to-one correspondence with the m sub-arrays, and the M/m blocks are in a one-to-one correspondence with the M/m memory rows in each of the sub-arrays. The semiconductor memory device also includes a row address control circuit for, in a case where a pixel address of data on the image space is input, accessing the memory cell array by selecting a memory row corresponding to a block to which the data belongs in a sub-array corresponding to a pixel row of the block to which the data belongs.

    摘要翻译： 本发明的半导体存储器件包括具有m个子阵列的存储单元阵列，每个子阵列具有排列成矩阵的多个存储单元，包括M / m（m为2以上的整数; M / m为 2个以上的整数）存储器行，N（N是2以上的整数）存储器列。 在包括M个像素行和N个像素列的矩阵的图像空间中，M个像素行被划分为M / m个块，每个M / m个块中的m个像素行与 m个子阵列，并且M / m块与每个子阵列中的M / m个存储器行一一对应。 半导体存储器件还包括行地址控制电路，用于在输入图像空间上的数据的像素地址的情况下，通过选择与数据所属的块相对应的存储行来访问存储单元阵列 子阵列对应于数据所属的块的像素行。

    Device for controlling weft yarn storing units for jet looms
    18.
    发明授权
    Device for controlling weft yarn storing units for jet looms 失效
    用于控制喷气织机纬纱存储单元的装置

    公开(公告)号：US4716943A

    公开(公告)日：1988-01-05

    申请号：US831992

    申请日：1986-02-21

    申请人： Kazunori Yoshida ,  Fujio Suzuki ,  Hidehiko Tanaka ,  Susuma Kawabata

    发明人： Kazunori Yoshida ,  Fujio Suzuki ,  Hidehiko Tanaka ,  Susuma Kawabata

    IPC分类号： D03D47/36 ,  D03D47/38 ,  B65H51/20

    CPC分类号： D03D47/362 ,  D03D47/3046 ,  D03D47/363

    摘要： In a jet loom in which weft yarns are stored in weft yarn storing units according to a weaving command, and are jetted in the weft insertion cycles thereof, a device for controlling the storing unit comprises: rotation detecting means for detecting the rotational condition of the loom spindle, to output a spindle rotation signal; a rotation control circuit which, according to a weft yarn jetting order, calculates the number of standby cycles between weft insertion cycles, and calculates the speeds of rotation of the storing units to store weft yarns in advance according to the numbers of standby cycle, to output rotation command signals; a drive circuit for receiving the spindle rotation signal and the rotation command signal, to output drives signal to determine the speeds of rotation of the storing units; and drive means provided for the storing unit, each receiving the drive signal to drive the storing unit at a speed of rotation corresponding to the drive signal thus received, a weft yarn as long as a predetermined weft insertion length being stored in the storing units in the weft insertion cycles selected according to the weft yarn jetting order.

    摘要翻译： 在根据编织指令将纬纱存储在纬纱存放单元中并在纬纱插入循环中喷射的喷气织机中，用于控制存储单元的装置包括：旋转检测装置，用于检测 编织主轴，输出主轴旋转信号; 旋转控制电路，根据纬纱喷射顺序，计算引纬周期之间的待机周期数，并根据待机周期数预先计算存储单元的转动速度以存储纬纱， 输出旋转指令信号; 用于接收主轴旋转信号和旋转指令信号的驱动电路，输出驱动信号以确定存储单元的旋转速度; 以及为所述存储单元设置的驱动装置，每个所述驱动装置接收所述驱动信号，以与所接收的所述驱动信号相对应的旋转速度驱动所述存储单元;纬纱，只要预定的纬纱插入长度被存储在所述存储单元中 根据纬纱喷射顺序选择纬纱插入循环。

    METHOD FOR MANUFACTURING A DROPLET DISCHARGE HEAD
    19.
    发明申请
    METHOD FOR MANUFACTURING A DROPLET DISCHARGE HEAD 审中-公开
    制造喷射头的方法

    公开(公告)号：US20120000595A1

    公开(公告)日：2012-01-05

    申请号：US13118836

    申请日：2011-05-31

    申请人： Atsushi MASE ,  Hidehiko Tanaka ,  Hideki Shimizu

    发明人： Atsushi MASE ,  Hidehiko Tanaka ,  Hideki Shimizu

    IPC分类号： C04B33/32 ,  C04B37/00

    CPC分类号： B41J2/1607 ,  B41J2/1637

    摘要： In a method for manufacturing a droplet discharge head, a first mold is prepared having first convexity portions shaped like pressure chambers of the droplet discharge head. A slurry is filled into the first mold, and the first mold is placed on a first porous plate. A solvent included in the slurry permeates into the first porous plate. The slurry is dried to form a first compact. Similarly, a second mold is prepared which has second convexity portions shaped like nozzle sections of the droplet discharge head. The slurry is filled into the second mold, and the second mold is placed on a second porous plate. The solvent included in the slurry permeates into the second porous plate. The slurry is dried to form a second compact. Thereafter, the first compact and the second compact are press bonded and fired.

    摘要翻译： 在制造液滴喷射头的方法中，制备具有像液滴喷射头的压力室一样形成的第一凸部的第一模具。 将浆料填充到第一模具中，并将第一模具放置在第一多孔板上。 包含在浆料中的溶剂渗透到第一多孔板中。 将浆料干燥以形成第一压块体。 类似地，制备具有类似于液滴喷射头的喷嘴部分的第二凸起部分的第二模具。 将浆料填充到第二模具中，将第二模具放置在第二多孔板上。 包含在浆料中的溶剂渗透到第二多孔板中。 将浆料干燥以形成第二压块。 此后，第一压块和第二压块被压合并烧结。