公开(公告)号：US09842745B2

公开(公告)日：2017-12-12

申请号：US14600595

申请日：2015-01-20

Applicant: Invensas Corporation

Inventor： Ilyas Mohammed ,  Masud Beroz

IPC: H01L21/48 ,  H01L23/14 ,  H01L23/00 ,  H01L21/52 ,  H01L21/768 ,  H01L23/495

CPC classification number: H01L21/4853 ,  H01L21/486 ,  H01L21/52 ,  H01L21/768 ,  H01L23/142 ,  H01L23/49568 ,  H01L24/97 ,  H01L2224/16225 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/19107 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00011

Abstract: Heat spreading substrate with embedded interconnects. In an embodiment in accordance with the present invention, an apparatus includes a metal parallelepiped comprising a plurality of wires inside the metal parallelepiped. The plurality of wires have a different grain structure than the metal parallelepiped. The plurality of wires are electrically isolated from the metal parallelepiped. The plurality of wires may be electrically isolated from one another.

公开(公告)号：US20170179046A1

公开(公告)日：2017-06-22

申请号：US15449993

申请日：2017-03-05

Applicant: Invensas Corporation

Inventor： Liang Wang ,  Ilyas Mohammed ,  Masud Beroz

IPC: H01L23/00 ,  H01L23/544 ,  H01L21/02

CPC classification number: H01L23/562 ,  H01L21/02002 ,  H01L21/02035 ,  H01L21/02378 ,  H01L21/02381 ,  H01L21/02389 ,  H01L21/02392 ,  H01L21/02395 ,  H01L21/02414 ,  H01L21/6835 ,  H01L23/544 ,  H01L24/19 ,  H01L24/32 ,  H01L24/83 ,  H01L25/50 ,  H01L27/0207 ,  H01L33/005 ,  H01L33/0062 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/13091 ,  H01L2924/351 ,  H01L2924/00

Abstract: In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one another. The plurality of piggyback substrates are removed from the carrier substrate to form a substrate assembly. The substrate assembly is processed to produce a plurality of integrated circuit devices on the substrate assembly. The processing may use manufacturing equipment designed to process wafers larger than individual instances of the plurality of piggyback substrates.

公开(公告)号：US20150171265A1

公开(公告)日：2015-06-18

申请号：US14629487

申请日：2015-02-23

Applicant: Invensas Corporation

Inventor： Liang Wang ,  Ilyas Mohammed ,  Masud Beroz

IPC: H01L33/00 ,  H01L33/32 ,  H01L33/62 ,  H01L33/06

CPC classification number: H01L33/0075 ,  B82Y20/00 ,  H01L31/035236 ,  H01L31/105 ,  H01L33/0025 ,  H01L33/0066 ,  H01L33/06 ,  H01L33/24 ,  H01L33/32 ,  H01L33/62 ,  H01L2933/0033 ,  H01L2933/0066 ,  H01S5/2009 ,  H01S5/3205 ,  H01S5/3407 ,  H01S5/34333

Abstract: Improved quantum efficiency of multiple quantum wells. In accordance with an embodiment of the present invention, an article of manufacture includes a p side for supplying holes and an n side for supplying electrons. The article of manufacture also includes a plurality of quantum well periods between the p side and the n side, each of the quantum well periods includes a quantum well layer and a barrier layer, with each of the barrier layers having a barrier height. The plurality of quantum well periods include different barrier heights.

Abstract translation: 提高多量子阱的量子效率。 根据本发明的实施例，制品包括用于供应空穴的p侧和用于提供电子的n侧。 制品还包括在p侧和n侧之间的多个量子阱周期，每个量子阱周期包括量子阱层和阻挡层，其中每个势垒层具有势垒高度。 多个量子阱周期包括不同的屏障高度。