公开(公告)号：US20220262825A1

公开(公告)日：2022-08-18

申请号：US17739486

申请日：2022-05-09

Applicant: Japan Display Inc.

Inventor： Yohei YAMAGUCHI

IPC: H01L27/12 ,  G02F1/1343 ,  G09G3/36 ,  H01L29/786 ,  H01L29/66 ,  G02F1/1368

Abstract: The purpose of the invention is to form a stable oxide semiconductor TFT in a display device. The concrete structure is: A display device having a TFT substrate that includes a TET having an oxide semiconductor layer comprising: the oxide semiconductor layer is formed on a first insulating film that is formed by a silicon oxide layer, the oxide semiconductor layer and an aluminum oxide film are directly formed on the first insulating film. The first insulating film becomes oxygen rich when the aluminum oxide film is formed on the first insulating film by sputtering. Oxygens in the first insulating film is effectively confined in the first insulating film, eventually, the oxygens diffuse to the oxide semiconductor for a stable operation of the oxide semiconductor TET.

公开(公告)号：US20210305434A1

公开(公告)日：2021-09-30

申请号：US17347630

申请日：2021-06-15

Applicant: Japan Display Inc.

Inventor： Yohei YAMAGUCHI ,  Kazufumi WATABE ,  Tmoyuki ARIYOSHI ,  Osamu KARIKOME ,  Ryohei TAKAYA

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/45 ,  H01L29/49 ,  H01L29/423 ,  H01L29/40

Abstract: The invention allows stable fabrication of a TFT circuit board used in a display device and having thereon an oxide semiconductor TFT. A TFT circuit board includes a TFT that includes an oxide semiconductor. The TFT has a gate insulating film formed on part of the oxide semiconductor and a gate electrode formed on the gate insulating film. A portion of the oxide semiconductor that is covered with the gate electrode 104 and a portion of the oxide semiconductor that is not covered with the gate electrode are both covered with a first interlayer insulating film. The first interlayer insulating film is covered with a first film 106, and the first film is covered with a first AlO film.

公开(公告)号：US20200152668A1

公开(公告)日：2020-05-14

申请号：US16743080

申请日：2020-01-15

Applicant: Japan Display Inc.

Inventor： Isao SUZUMURA ,  Kazufumi WATABE ,  Yoshinori ISHII ,  Hidekazu MIYAKE ,  Yohei YAMAGUCHI

IPC: H01L27/12 ,  H01L29/49 ,  H01L29/423 ,  H01L29/417 ,  G02F1/1362 ,  G02F1/133 ,  G02F1/1368 ,  H01L29/786 ,  H01L29/24 ,  H01L29/51

Abstract: The object of the present invention is to make it possible to form an LTPS TFT and an oxide semiconductor TFT on the same substrate. A display device includes a substrate having a display region in which pixels are formed. The pixel includes a first TFT using an oxide semiconductor 109. An oxide film 110 as an insulating material is formed on the oxide semiconductor 109. A gate electrode 111 is formed on the oxide film 110. A first electrode 115 is connected to a drain of the first TFT via a first through hole formed in the oxide film 110. A second electrode 116 is connected to a source of the first TFT via a second through hole formed in the oxide film 110.

公开(公告)号：US20180294286A1

公开(公告)日：2018-10-11

申请号：US16004546

申请日：2018-06-11

Applicant: Japan Display Inc.

Inventor： Yohei YAMAGUCHI ,  lsao SUZUMURA ,  Hidekazu MIYAKE

IPC: H01L27/12 ,  H01L29/786 ,  H01L27/32 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: H01L27/1288 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2201/123 ,  G02F2202/104 ,  H01L27/1225 ,  H01L27/1229 ,  H01L27/1233 ,  H01L27/124 ,  H01L27/1251 ,  H01L27/127 ,  H01L27/3262 ,  H01L27/3276 ,  H01L29/78693

Abstract: The invention allows formation of LTPS TFTs and TAOS TFTs on the same substrate. The invention provides a display device including a substrate having a display area in which pixels are formed. The pixels include a first TFT made of a TAOS. The drain of the first TFT is formed of first LTPS 112. The source of the first TFT is formed of second LTPS 113. The first LTPS 112 is connected to a first electrode 106 via a first through-hole 108 formed in an insulating film 105 covering the first TFT. The second LTPS 113 is connected to a second electrode 107 via a second through-hole 108 formed in the insulating film 105 covering the first TFT.

公开(公告)号：US20160284867A1

公开(公告)日：2016-09-29

申请号：US15172576

申请日：2016-06-03

Applicant: Japan Display Inc.

Inventor： Isao SUZUMURA ,  Norihiro UEMURA ,  Takeshi NODA ,  Hidekazu MIYAKE ,  Yohei YAMAGUCHI

IPC: H01L29/786 ,  H01L27/12 ,  G02F1/1368 ,  G02F1/1335 ,  G02F1/1337 ,  G02F1/1343 ,  H01L29/24 ,  G02F1/1333

CPC classification number: H01L29/78696 ,  G02F1/133345 ,  G02F1/133512 ,  G02F1/133514 ,  G02F1/1337 ,  G02F1/134309 ,  G02F1/1368 ,  G02F2001/133357 ,  H01L27/1225 ,  H01L27/1285 ,  H01L29/24 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78633 ,  H01L29/7869 ,  H01L29/78693

Abstract: In a bottom gate thin film transistor using a first oxide semiconductor layer as a channel layer, the first oxide semiconductor layer and second semiconductor layers include In and O. An (O/In) ratio of the second oxide semiconductor layers is equal to or larger than that of the first oxide semiconductor layer, and a film thickness thereof is thicker than that of the first oxide semiconductor layer.

Abstract translation: 在使用第一氧化物半导体层作为沟道层的底栅极薄膜晶体管中，第一氧化物半导体层和第二半导体层包括In和O.第二氧化物半导体层的（O / In）比等于或大于 比第一氧化物半导体层的厚度厚，其厚度比第一氧化物半导体层厚。

公开(公告)号：US20240184177A1

公开(公告)日：2024-06-06

申请号：US18428228

申请日：2024-01-31

Applicant: Japan Display Inc.

Inventor： Yohei YAMAGUCHI ,  Arichika ISHIDA ,  Hidekazu MIYAKE ,  Hiroto MIYAKE ,  Isao SUZUMURA

IPC: G02F1/1368 ,  G02F1/1343 ,  G02F1/1362 ,  H01L27/12 ,  H01L29/423 ,  H01L29/786

CPC classification number: G02F1/1368 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/136209 ,  G02F1/136227 ,  H01L27/1225 ,  H01L29/78633 ,  H01L29/7869 ,  G02F1/136218 ,  G02F1/13685 ,  G02F2202/10 ,  H01L29/42384

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first metal layer on the insulating substrate, a first insulating layer on the insulating substrate and the first metal layer, a semiconductor layer on the first insulating layer, a second insulating layer on the semiconductor layer and the first insulating layer, a second metal layer on the second insulating layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer. The first metal layer overlaps the second metal layer. A third metal layer contacts a top surface of the second metal layer and a top surface of the first metal layer.

公开(公告)号：US20230387319A1

公开(公告)日：2023-11-30

申请号：US18447400

申请日：2023-08-10

Applicant: Japan Display Inc.

Inventor： Yohei YAMAGUCHI ,  Yuichiro HANYU ,  Hiroki HIDAKA

IPC: H01L29/786 ,  H01L21/02 ,  H01L29/423 ,  H01L27/12 ,  H10K59/126

CPC classification number: H01L29/7869 ,  H01L21/02554 ,  H01L21/02266 ,  H01L29/42384 ,  H01L29/78696 ,  H01L27/1251 ,  H01L29/78648 ,  H01L27/124 ,  H01L27/1225 ,  H10K59/126

Abstract: A semiconductor device including a first oxide semiconductor layer, a first gate electrode opposing the first oxide semiconductor layer, a first gate insulating layer between the first oxide semiconductor layer and the first gate electrode, a first insulating layer covering the first oxide semiconductor layer and having a first opening, a first conductive layer above the first insulating layer and in the first opening, the first conductive layer being electrically connected to the first oxide semiconductor layer, and an oxide layer between an upper surface of the first insulating layer and the first conductive layer, wherein the first insulating layer is exposed from the oxide layer in a region not overlapping the first conductive layer in a plan view.

公开(公告)号：US20220376009A1

公开(公告)日：2022-11-24

申请号：US17879829

申请日：2022-08-03

Applicant: Japan Display Inc.

Inventor： Yohei YAMAGUCHI

IPC: H01L27/32 ,  H01L51/56

Abstract: A semiconductor device includes an insulating substrate, a first semiconductor region configured of polysilicon formed on the insulating substrate, an insulating film laminated on the first semiconductor region, a contact hole formed in the insulating film and reaching the first semiconductor region, a second semiconductor region configured of an oxide semiconductor formed on the insulating film, a contact electrode configured of a conductive material and electrically connected to the first semiconductor region, where the conductive material is embedded in the contact hole. The insulating film contains a metallic element at an interface with the contact hole, where the metallic element forms the oxide semiconductor.

公开(公告)号：US20210141256A1

公开(公告)日：2021-05-13

申请号：US17126112

申请日：2020-12-18

Applicant: Japan Display Inc.

Inventor： Yohei YAMAGUCHI ,  Arichika Ishida ,  Hidekazu Miyake ,  Hiroto Miyake ,  Isao Suzumura

IPC: G02F1/1368 ,  G02F1/1362 ,  H01L27/12 ,  H01L29/786 ,  G02F1/1343

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first metal layer on the insulating substrate, a first insulating layer on the insulating substrate and the first metal layer, a semiconductor layer on the first insulating layer, a second insulating layer on the semiconductor layer and the first insulating layer, a second metal layer on the second insulating layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer. The first metal layer overlaps the second metal layer. A third metal layer contacts a top surface of the second metal layer and a top surface of the first metal layer.

公开(公告)号：US20180286889A1

公开(公告)日：2018-10-04

申请号：US15895139

申请日：2018-02-13

Applicant: Japan Display Inc.

Inventor： Yohei YAMAGUCHI

IPC: H01L27/12 ,  H01L29/786 ,  G02F1/1368 ,  G02F1/1333

CPC classification number: H01L27/1225 ,  G02F1/133345 ,  G02F1/134363 ,  G02F1/1368 ,  G02F2001/136295 ,  G02F2001/13685 ,  G02F2202/10 ,  G02F2202/104 ,  H01L27/1248 ,  H01L27/1251 ,  H01L27/3262 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/78675 ,  H01L29/7869 ,  H01L2251/303

Abstract: The purpose of the present invention is to improve reliability of the TFT of the oxide semiconductor. The feature of the invention is: A display device comprising: a substrate including a display area where plural pixels are formed, the pixel includes a first TFT of a first oxide semiconductor, a first gate insulating film is formed under the first oxide semiconductor, a first gate electrode is formed under the first gate insulating film, an interlayer insulating film is formed on the first oxide semiconductor; a drain wiring, which connects with the first oxide semiconductor, and a source wiring, which connects with the first oxide semiconductor, are formed on the interlayer insulating film; the drain wiring or the source wiring is a laminated structure of a second oxide semiconductor and a first metal, the second oxide semiconductor is under the first metal.