公开(公告)号：US08384220B2

公开(公告)日：2013-02-26

申请号：US12126386

申请日：2008-05-23

申请人： Tatsuyuki Saito ,  Junji Noguchi ,  Hizuru Yamaguchi ,  Nobuo Owada

发明人： Tatsuyuki Saito ,  Junji Noguchi ,  Hizuru Yamaguchi ,  Nobuo Owada

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76843 ,  H01L21/76838 ,  H01L21/7685 ,  H01L21/76877 ,  H01L21/76882 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53228 ,  H01L24/48 ,  H01L2224/05624 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01021 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor IC device includes a buried interconnection in interconnection layers over a semiconductor substrate, in which electrical connection of interconnections are provided over and under an interconnection layer of an embedded interconnection from among the interconnection layers such that a first connecting conductor portion within a connecting hole extending from an upper interconnection toward the interconnection layer of a predetermined buried interconnection and a second connecting conductor portion within the connecting hole extending from a lower interconnection toward the interconnection layer of the predetermined buried interconnection are electrically connected via a connecting conductor portion for relay in the connecting groove of the interconnection layer of a predetermined buried interconnection. The connecting conductor portion for relay is sized so that the length of the connecting conductor portion for relay in an extending direction of the predetermined buried interconnection is longer than that of the connecting hole.

摘要翻译： 半导体IC器件包括在半导体衬底上的互连层中的埋入互连，其中互连层的电连接在互连层之间设置在嵌入式互连的互连层之上和之下，使得连接孔内的第一连接导体部分 从上互连延伸到预定埋地布线的互连层，并且连接孔内的第二连接导体部分从下互连延伸到预定埋地互连的互连层，经由用于继电器的连接导体部分电连接 互连层的连接槽。 继电器的连接导体部分的尺寸设定成使得用于继电器的连接导体部分在预定的埋入互连的延伸方向上的长度比连接孔的长度长。

公开(公告)号：US20050151264A1

公开(公告)日：2005-07-14

申请号：US11058601

申请日：2005-02-16

申请人： Tatsuyuki Saito ,  Junji Noguchi ,  Hizuru Yamaguchi ,  Nobuo Owada

发明人： Tatsuyuki Saito ,  Junji Noguchi ,  Hizuru Yamaguchi ,  Nobuo Owada

IPC分类号： H01L21/768 ,  H01L23/485 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L21/44

CPC分类号： H01L21/76843 ,  H01L21/76838 ,  H01L21/7685 ,  H01L21/76877 ,  H01L21/76882 ,  H01L23/485 ,  H01L23/5226 ,  H01L23/5283 ,  H01L23/53228 ,  H01L24/48 ,  H01L2224/05624 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01021 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/04941 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： In a fabrication process of a semiconductor integrated circuit device, upon effecting connection of an interconnection made of aluminum or aluminum alloy and another interconnection made of Cu or Cu alloy, a barrier conductor film or plug is disposed at the joint portion between these interconnections. Among the interconnection layers formed, the uppermost one is made of a wiring material such as aluminum or aluminum alloy, while the lower one is made of Cu or Cu alloy. The lowest interconnection is made of a conductive material other than Cu or Cu alloy. For example, the conductive material which permits minute processing and has both low resistance and high EM resistance such as tungsten is employed.

摘要翻译： 在半导体集成电路器件的制造工艺中，在实现由铝或铝合金构成的互连和由Cu或Cu合金制成的另一互连的连接时，在这些互连之间的接合部分处设置阻挡导体膜或插塞。 在形成的互连层中，最上面的一个由诸如铝或铝合金的布线材料制成，而下层由Cu或Cu合金制成。 最低的互连由不是Cu或Cu合金的导电材料制成。 例如，采用允许微小加工且具有低电阻和高电阻电阻（如钨）的导电材料。

公开(公告)号：US06849535B2

公开(公告)日：2005-02-01

申请号：US10128265

申请日：2002-04-24

申请人： Junji Noguchi ,  Naofumi Ohashi ,  Kenichi Takeda ,  Tatsuyuki Saito ,  Hizuru Yamaguchi ,  Nobuo Owada

发明人： Junji Noguchi ,  Naofumi Ohashi ,  Kenichi Takeda ,  Tatsuyuki Saito ,  Hizuru Yamaguchi ,  Nobuo Owada

IPC分类号： H01L21/3205 ,  H01L21/02 ,  H01L21/28 ,  H01L21/321 ,  H01L21/3213 ,  H01L21/70 ,  H01L21/768 ,  H01L23/532 ,  H01L21/44

CPC分类号： H01L21/0217 ,  H01L21/02063 ,  H01L21/02074 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/3185 ,  H01L21/3212 ,  H01L21/32136 ,  H01L21/67115 ,  H01L21/68792 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76838 ,  H01L21/7684 ,  H01L21/76882 ,  H01L21/76883 ,  H01L21/76886 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device comprises a semiconductor substrate; a first insulating film overlying a surface of the semiconductor substrate, an upper surface of the first insulating film being nitrided; a first copper-embedded interconnection embedded in the first insulating film, and which first copper-embedded interconnection contains copper as a main component; a copper nitride film overlying an upper surface of the first copper-embedded interconnection; a cap insulating film overlying an upper surface of the first insulating film and an upper surface of the copper nitride film; and a second insulting film overlying the cap insulating film.

摘要翻译： 半导体器件包括半导体衬底; 覆盖所述半导体衬底的表面的第一绝缘膜，所述第一绝缘膜的上表面被氮化; 嵌入在第一绝缘膜中的第一铜嵌入式互连，并且第一铜嵌入式互连以铜为主要成分; 覆盖在所述第一铜嵌入式互连件的上表面上的氮化铜膜; 覆盖在所述第一绝缘膜的上表面上的帽绝缘膜和所述氮化铜膜的上表面; 和覆盖绝缘膜的第二绝缘膜。

公开(公告)号：US06716749B2

公开(公告)日：2004-04-06

申请号：US10233430

申请日：2002-09-04

申请人： Junji Noguchi ,  Naofumi Ohashi ,  Kenichi Takeda ,  Tatsuyuki Saito ,  Hizuru Yamaguchi ,  Nobuo Owada

发明人： Junji Noguchi ,  Naofumi Ohashi ,  Kenichi Takeda ,  Tatsuyuki Saito ,  Hizuru Yamaguchi ,  Nobuo Owada

IPC分类号： H01L2144

CPC分类号： H01L21/0217 ,  H01L21/02063 ,  H01L21/02074 ,  H01L21/02164 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/3185 ,  H01L21/3212 ,  H01L21/32136 ,  H01L21/67115 ,  H01L21/68792 ,  H01L21/76826 ,  H01L21/76829 ,  H01L21/76834 ,  H01L21/76838 ,  H01L21/7684 ,  H01L21/76882 ,  H01L21/76883 ,  H01L21/76886 ,  H01L23/53238 ,  H01L2924/0002 ,  H01L2924/00

摘要： After formation of Cu interconnections 46a to 46e each to be embedded in an interconnection groove 40 of a silicon oxide film 39 by CMP and then washing, the surface of each of the silicon oxide film 39 and Cu interconnections 46a to 46e is treated with a reducing plasma (ammonia plasma). Then, without vacuum break, a cap film (silicon nitride film) is formed continuously. This process makes it possible to improve the dielectric breakdown resistance (reliability) of a copper interconnection formed by the damascene method.

公开(公告)号：US07642652B2

公开(公告)日：2010-01-05

申请号：US11872295

申请日：2007-10-15

申请人： Tatsuyuki Saito ,  Naohumi Ohashi ,  Toshinori Imai ,  Junji Noguchi ,  Tsuyoshi Tamaru

发明人： Tatsuyuki Saito ,  Naohumi Ohashi ,  Toshinori Imai ,  Junji Noguchi ,  Tsuyoshi Tamaru

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76849 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/28562 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76861 ,  H01L21/76862 ,  H01L21/76877 ,  H01L21/76882 ,  H01L21/76883 ,  H01L21/76889 ,  H01L23/53295 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05025 ,  H01L2224/05027 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/13

摘要： A barrier layer and a copper film are successively formed on a silicon oxide film including a groove for wiring in the silicon oxide film and a silicon nitride film, both formed on a semiconductor substrate. Thereafter, the barrier layer and the copper film are removed from outside of the groove for wiring, thereby forming a wiring. Tungsten is selectively or preferentially grown on the wiring to selectively form a tungsten film on the wiring. After the formation of the copper film, a treatment with hydrogen may be performed. After the formation of the wiring, the semiconductor substrate may be cleaned with a cleaning solution capable of removing a foreign matter or a contaminant metal. After the formation of the wiring, a treatment with hydrogen is carried out.

摘要翻译： 在半导体衬底上形成的氧化硅膜上形成有用于配线的沟槽的氧化硅膜和氮化硅膜，依次形成阻挡层和铜膜。 此后，从用于布线的槽的外侧除去阻挡层和铜膜，从而形成布线。 钨选择性地或优先地生长在布线上以在布线上选择性地形成钨膜。 铜膜形成后，可以进行氢处理。 在形成布线之后，可以用能够除去异物或污染金属的清洁溶液来清洁半导体衬底。 形成布线后，进行氢的处理。

公开(公告)号：US20080042282A1

公开(公告)日：2008-02-21

申请号：US11872295

申请日：2007-10-15

申请人： Tatsuyuki SAITO ,  Naohumi Ohashi ,  Toshinori Imai ,  Junji Noguchi ,  Tsuyoshi Tamaru

发明人： Tatsuyuki SAITO ,  Naohumi Ohashi ,  Toshinori Imai ,  Junji Noguchi ,  Tsuyoshi Tamaru

IPC分类号： H01L21/4763 ,  H01L23/48

CPC分类号： H01L21/76849 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/28562 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76861 ,  H01L21/76862 ,  H01L21/76877 ,  H01L21/76882 ,  H01L21/76883 ,  H01L21/76889 ,  H01L23/53295 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05025 ,  H01L2224/05027 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/13

摘要： A barrier layer and a copper film are successively formed on a silicon oxide film including a groove for wiring in the silicon oxide film and a silicon nitride film, both formed on a semiconductor substrate. Thereafter, the barrier layer and the copper film are removed from outside of the groove for wiring, thereby forming a wiring. Tungsten is selectively or preferentially grown on the wiring to selectively form a tungsten film on the wiring. After the formation of the copper film, a treatment with hydrogen may be performed. After the formation of the wiring, the semiconductor substrate may be cleaned with a cleaning solution capable of removing a foreign matter or a contaminant metal. After the formation of the wiring, a treatment with hydrogen is carried out.

摘要翻译： 在半导体衬底上形成的氧化硅膜上形成有用于配线的沟槽的氧化硅膜和氮化硅膜，依次形成阻挡层和铜膜。 此后，从用于布线的槽的外侧除去阻挡层和铜膜，从而形成布线。 钨选择性地或优先地生长在布线上以在布线上选择性地形成钨膜。 铜膜形成后，可以进行氢处理。 在形成布线之后，可以用能够除去异物或污染金属的清洁溶液来清洁半导体衬底。 形成布线后，进行氢的处理。

公开(公告)号：US06908847B2

公开(公告)日：2005-06-21

申请号：US10329831

申请日：2002-12-27

申请人： Tatsuyuki Saito ,  Naofumi Ohashi ,  Toshinori Imai ,  Junji Noguchi ,  Tsuyoshi Tamaru

发明人： Tatsuyuki Saito ,  Naofumi Ohashi ,  Toshinori Imai ,  Junji Noguchi ,  Tsuyoshi Tamaru

IPC分类号： H01L29/43 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/768 ,  H01L21/84 ,  H01L23/532 ,  H01L27/12 ,  H01L29/423 ,  H01L29/49 ,  H01L21/4763

CPC分类号： H01L21/76844 ,  H01L21/28562 ,  H01L21/76801 ,  H01L21/76811 ,  H01L21/76814 ,  H01L21/76834 ,  H01L21/76835 ,  H01L21/76838 ,  H01L21/76849 ,  H01L21/76877 ,  H01L21/84 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/5329 ,  H01L27/1203 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device has first interlayer insulating film having a wiring trench; a wiring portion having a first barrier metal layer formed over side walls and bottom surface of the wiring trench, a first conductor layer formed over the first barrier metal layer to embed the wiring trench, and a capping barrier metal film formed over the first conductor layer; second interlayer insulating film formed over the first interlayer insulating film and having a connecting hole; and a connecting portion having a second barrier metal layer formed over side walls and bottom surface of the connecting hole, and a second conductor layer formed over the second barrier metal layer to embed the connecting hole; wherein, at a joint between the connecting portion and wiring portion, at least one of the second barrier metal layer and capping barrier metal film on the bottom surface of the connecting hole is removed.

摘要翻译： 半导体器件具有具有布线沟槽的第一层间绝缘膜; 布线部分，其具有形成在所述布线沟槽的侧壁和底表面上的第一阻挡金属层，形成在所述第一阻挡金属层上以嵌入所述布线沟槽的第一导体层和形成在所述第一导体层上的封盖阻挡金属膜 ; 第二层间绝缘膜，形成在所述第一层间绝缘膜上并具有连接孔; 以及连接部，其具有形成在所述连接孔的侧壁和下表面上的第二阻挡金属层，以及形成在所述第二阻挡金属层上以嵌入所述连接孔的第二导体层; 其中，在所述连接部分和所述布线部分之间的连接处，所述连接孔底面上的所述第二阻挡金属层和覆盖阻挡金属膜中的至少一个被去除。

公开(公告)号：US06818546B2

公开(公告)日：2004-11-16

申请号：US09850162

申请日：2001-05-08

申请人： Tatsuyuki Saito ,  Naohumi Ohashi ,  Toshinori Imai ,  Junji Noguchi ,  Tsuyoshi Tamaru

发明人： Tatsuyuki Saito ,  Naohumi Ohashi ,  Toshinori Imai ,  Junji Noguchi ,  Tsuyoshi Tamaru

IPC分类号： H01L214763

CPC分类号： H01L21/76849 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/28562 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76861 ,  H01L21/76862 ,  H01L21/76877 ,  H01L21/76882 ,  H01L21/76883 ,  H01L21/76889 ,  H01L23/53295 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05025 ,  H01L2224/05027 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/13

摘要： A barrier layer and a copper film are successively formed on a silicon oxide film including a groove for wiring in the silicon oxide film and a silicon nitride film, both formed on a semiconductor substrate. Thereafter, the barrier layer and the copper film are removed from outside of the groove for wiring, thereby forming a wiring. Tungsten is selectively or preferentially grown on the wiring to selectively form a tungsten film on the wiring. After the formation of the copper film, a treatment with hydrogen may be performed. After the formation of the wiring, the semiconductor substrate may be cleaned with a cleaning solution capable of removing a foreign matter or a contaminant metal. After the formation of the wiring, a treatment with hydrogen is carried out.

摘要翻译： 在半导体衬底上形成的氧化硅膜上形成有用于配线的沟槽的氧化硅膜和氮化硅膜，依次形成阻挡层和铜膜。 此后，从用于布线的槽的外侧除去阻挡层和铜膜，从而形成布线。 钨选择性地或优先地生长在布线上以在布线上选择性地形成钨膜。 铜膜形成后，可以进行氢处理。 在形成布线之后，可以用能够除去异物或污染金属的清洁溶液来清洁半导体衬底。 形成布线后，进行氢的处理。

公开(公告)号：US07321171B2

公开(公告)日：2008-01-22

申请号：US10970024

申请日：2004-10-22

申请人： Tatsuyuki Saito ,  Naohumi Ohashi ,  Toshinori Imai ,  Junji Noguchi ,  Tsuyoshi Tamaru

发明人： Tatsuyuki Saito ,  Naohumi Ohashi ,  Toshinori Imai ,  Junji Noguchi ,  Tsuyoshi Tamaru

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L21/76849 ,  H01L21/28518 ,  H01L21/2855 ,  H01L21/28562 ,  H01L21/76801 ,  H01L21/76808 ,  H01L21/76834 ,  H01L21/76843 ,  H01L21/76861 ,  H01L21/76862 ,  H01L21/76877 ,  H01L21/76882 ,  H01L21/76883 ,  H01L21/76889 ,  H01L23/53295 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05024 ,  H01L2224/05025 ,  H01L2224/05027 ,  H01L2224/05569 ,  H01L2224/05572 ,  H01L2224/13

摘要： A barrier layer and a copper film are successively formed on a silicon oxide film including a groove for wiring in the silicon oxide film and a silicon nitride film, both formed on a semiconductor substrate. Thereafter, the barrier layer and the copper film are removed from outside of the groove for wiring, thereby forming a wiring. Tungsten is selectively or preferentially grown on the wiring to selectively form a tungsten film on the wiring. After the formation of the copper film, a treatment with hydrogen may be performed. After the formation of the wiring, the semiconductor substrate may be cleaned with a cleaning solution capable of removing a foreign matter or a contaminant metal. After the formation of the wiring, a treatment with hydrogen is carried out.

摘要翻译： 在半导体衬底上形成的氧化硅膜上形成有用于配线的沟槽的氧化硅膜和氮化硅膜，依次形成阻挡层和铜膜。 此后，从用于布线的槽的外侧除去阻挡层和铜膜，从而形成布线。 钨选择性地或优先地生长在布线上以在布线上选择性地形成钨膜。 铜膜形成后，可以进行氢处理。 在形成布线之后，可以用能够除去异物或污染金属的清洁溶液来清洁半导体衬底。 形成布线后，进行氢的处理。

公开(公告)号：US07053487B2

公开(公告)日：2006-05-30

申请号：US10294937

申请日：2002-11-15

申请人： Tatsuyuki Saito ,  Naofumi Ohashi ,  Toshinori Imai ,  Junji Noguchi ,  Tsuyoshi Tamaru

发明人： Tatsuyuki Saito ,  Naofumi Ohashi ,  Toshinori Imai ,  Junji Noguchi ,  Tsuyoshi Tamaru

IPC分类号： H01L23/48

CPC分类号： H01L21/76844 ,  H01L21/28562 ,  H01L21/76801 ,  H01L21/76811 ,  H01L21/76814 ,  H01L21/76834 ,  H01L21/76835 ,  H01L21/76838 ,  H01L21/76849 ,  H01L21/76877 ,  H01L21/84 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/5329 ,  H01L27/1203 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device has first interlayer insulating film having a wiring trench; a wiring portion having a first barrier metal layer formed over side walls and bottom surface of the wiring trench, a first conductor layer formed over the first barrier metal layer to embed the wiring trench, and a capping barrier metal film formed over the first conductor layer; second interlayer insulating film formed over the first interlayer insulating film and having a connecting hole; and a connecting portion having a second barrier metal layer formed over side walls and bottom surface of the connecting hole, and a second conductor layer formed over the second barrier metal layer to embed the connecting hole; wherein, at a joint between the connecting portion and wiring portion, at least one of the second barrier metal layer and capping barrier metal film on the bottom surface of the connecting hole is removed.