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    Method and system for weak pattern quantification
    14.
    发明授权
    Method and system for weak pattern quantification 有权

    公开(公告)号：US10262831B2

    公开(公告)日：2019-04-16

    申请号：US15729458

    申请日：2017-10-10

    Applicant: KLA-Tencor Corporation

    Inventor： Andrew Cross ,  Allen Park

    IPC: H01J37/26 ,  H01L21/66 ,  G06T7/00 ,  G03F7/20

    Abstract: A weak pattern identification method includes acquiring inspection data from a set of patterns on a wafer, identifying failing pattern types on the wafer, and grouping like pattern types of the failing pattern types into a set of pattern groups. The weak pattern identification method also includes acquiring image data from multiple varied instances of a first pattern type grouped in a first group, wherein the multiple varied instances of the first pattern type are formed under different conditions. The weak pattern identification method also includes comparing images obtained from common structures of the instances of the first pattern type to identify local differences within a portion of the first pattern type. Further, the weak pattern identification method includes identifying metrology sites within the portion of the first pattern type proximate to a location of the local differences within the portion of the first pattern type.

    Computer Assisted Weak Pattern Detection and Quantification System
    16.
    发明申请
    Computer Assisted Weak Pattern Detection and Quantification System 审中-公开

    公开(公告)号：US20170309009A1

    公开(公告)日：2017-10-26

    申请号：US15275726

    申请日：2016-09-26

    Applicant: KLA-Tencor Corporation

    Inventor： Naoshin Haque ,  Allen Park ,  Ajay Gupta

    IPC: G06T7/00

    CPC classification number: G06T7/0004 ,  G06T2207/10061 ,  G06T2207/30148 ,  H01L22/12 ,  H01L22/20

    Abstract: Methods and systems for providing weak pattern (or hotspot) detection and quantification are disclosed. A weak pattern detection and quantification system may include a wafer inspection tool configured to inspect a wafer and detect defects present on the wafer. The system may also include at least one processor in communication with the wafer inspection tool. The at least one processor may be configured to: perform pattern grouping on the detected defects based on design of the wafer; identify regions of interest based on the pattern grouping; identify weak patterns contained in the regions of interest identified, the weak patterns being patterns deviating from the design by an amount greater than a threshold; validate the weak patterns identified; and report the validated weak patterns or facilitate revision of the design of the wafer based on the validated weak patterns.

    Method and System for Universal Target Based Inspection and Metrology
    17.
    发明申请
    Method and System for Universal Target Based Inspection and Metrology 有权
    通用目标检测和计量方法与系统

    公开(公告)号：US20140199791A1

    公开(公告)日：2014-07-17

    申请号：US14083126

    申请日：2013-11-18

    Applicant: KLA-Tencor Corporation

    Inventor： Allen Park ,  Ellis Chang ,  Michael Adel ,  Kris Bhaskar ,  Ady Levy ,  Amir Widmann ,  Mark Wagner ,  Songnian Rong

    IPC: H01L21/66 ,  G06F17/50

    CPC classification number: H01L22/12 ,  G06F17/5081

    Abstract: Universal target based inspection drive metrology includes designing a plurality of universal metrology targets measurable with an inspection tool and measurable with a metrology tool, identifying a plurality of inspectable features within at least one die of a wafer using design data, disposing the plurality of universal targets within the at least one die of the wafer, each universal target being disposed at least proximate to one of the identified inspectable features, inspecting a region containing one or more of the universal targets with an inspection tool, identifying one or more anomalistic universal targets in the inspected region with an inspection tool and, responsive to the identification of one or more anomalistic universal targets in the inspected region, performing one or more metrology processes on the one or more anomalistic universal metrology targets with the metrology tool.

    Abstract translation: 通用的基于目标的检测驱动度量包括设计多个通过检测工具测量的通用度量目标并且可以用计量工具测量，使用设计数据识别晶片的至少一个管芯内的多个检查特征，将多个通用目标 在晶片的至少一个模具内，每个通用目标被设置为至少接近所识别的可检查特征之一，用检查工具检查包含一个或多个通用目标的区域，以识别一个或多个异常通用目标 检查区域具有检查工具，并且响应于在被检查区域中识别一个或多个异常通用目标，对所述一个或多个异常通用度量目标与计量工具执行一个或多个计量过程。

    Design Alteration for Wafer Inspection
    18.
    发明申请
    Design Alteration for Wafer Inspection 有权
    晶圆检测设计改造

    公开(公告)号：US20130318485A1

    公开(公告)日：2013-11-28

    申请号：US13893267

    申请日：2013-05-13

    Applicant: KLA-Tencor Corporation

    Inventor： Allen Park ,  Ellis Chang

    IPC: G06F17/50

    CPC classification number: G06F17/5045 ,  G01N21/956 ,  G06F17/5081 ,  G06F2217/14

    Abstract: Methods and systems for binning defects on a wafer are provided. One method includes identifying areas in a design for a layer of a device being fabricated on a wafer that are not critical to yield of fabrication of the device and generating an altered design for the layer by eliminating features in the identified areas from the design for the layer. The method also includes binning defects detected on the layer into groups using the altered design such that features in the altered design proximate positions of the defects in each of the groups are at least similar.

    Abstract translation: 提供了一种用于对晶片上的缺陷进行合并的方法和系统。 一种方法包括识别在晶片上制造的器件层的设计领域，其对于制造器件的制造不是至关重要的，并且通过从该设计中消除所识别的区域中的特征，从而为该层产生改变的设计 层。 该方法还包括使用改变的设计将层上检测到的缺陷分组成组，使得每个组中的缺陷的改变设计中的特征至少相似。

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