公开(公告)号：US06906394B2

公开(公告)日：2005-06-14

申请号：US10448277

申请日：2003-05-30

申请人： Hiroshi Muto ,  Tsuyoshi Fukada ,  Kenichi Ao ,  Minekazu Sakai ,  Yukihiro Takeuchi ,  Kazuhiko Kano ,  Junji Oohara

发明人： Hiroshi Muto ,  Tsuyoshi Fukada ,  Kenichi Ao ,  Minekazu Sakai ,  Yukihiro Takeuchi ,  Kazuhiko Kano ,  Junji Oohara

IPC分类号： G01P15/125 ,  B81B3/00 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/762 ,  H01L29/84 ,  H01L27/01

CPC分类号： B81C1/00936 ,  B81B2203/0136 ,  B81C1/0019 ,  B81C1/00531 ,  B81C2201/0132 ,  G01P2015/0814 ,  H01L21/76232 ,  H01L21/76264 ,  H01L21/76283

摘要： A method of manufacturing a semiconductor device is provided. The device is manufactured with use of an SOI (Silicon On Insulator) substrate having a first silicon layer, an oxide layer, and a second silicon layer laminated in this order. After forming a trench reaching the oxide layer from the second silicon layer, dry etching is performed, thus allowing the oxide layer located at the trench bottom to be charged at first. This charging forces etching ions to impinge upon part of the second silicon layer located laterally to the trench bottom. Such part is removed, forming a movable section. For example, ions to neutralize the electric charges are administered into the trench, so that the electric charges are removed from charged movable electrodes and their charged surrounding regions. Removing the electric charges prevents the movable section to stick to its surrounding portions.

摘要翻译： 提供一种制造半导体器件的方法。 使用具有按顺序层叠的第一硅层，氧化物层和第二硅层的SOI（绝缘体上硅）基板来制造器件。 在形成从第二硅层到达氧化物层的沟槽之后，进行干蚀刻，从而允许首先将位于沟槽底部的氧化物层充电。 该充电迫使蚀刻离子撞击位于沟槽底部横向的第二硅层的一部分。 去除这样的部件，形成可动部分。 例如，中和电荷的离子被施加到沟槽中，使得电荷从带电的可移动电极及其带电的周围区域中去除。 拆卸电荷可防止可动部分粘附到其周围部分。

公开(公告)号：US06429506B1

公开(公告)日：2002-08-06

申请号：US09525514

申请日：2000-03-15

申请人： Tetsuo Fujii ,  Tsuyoshi Fukada ,  Hiroshi Muto ,  Kenichi Ao ,  Shinji Yoshihara ,  Sumitomo Inomata

发明人： Tetsuo Fujii ,  Tsuyoshi Fukada ,  Hiroshi Muto ,  Kenichi Ao ,  Shinji Yoshihara ,  Sumitomo Inomata

IPC分类号： H01L21301

CPC分类号： H01L21/6836 ,  B29C33/0022 ,  B29C2043/023 ,  B81C1/00888 ,  B81C1/00896 ,  B81C2201/053 ,  H01L2221/68327 ,  H01L2224/16 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48095 ,  H01L2224/48465 ,  H01L2224/73265 ,  H01L2924/01057 ,  H01L2924/01068 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/16235 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/00014

摘要： A protective sheet is fixed to a jig, and regions of the protective sheet corresponding to regions where dicing-cut is to be performed are removed to form grooves. Then, a semiconductor wafer is bonded to the protective sheet at an opposite side of the jig, and the jig is detached from the protective sheet and the semiconductor wafer bonded together. After that, the semiconductor wafer is cut into semiconductor chips by dicing along the grooves of the protective sheet. Because the protective sheet is not cut by dicing, no scraps of the protective sheet is produced, thereby preventing contamination to the chips.

摘要翻译： 将保护片固定在夹具上，除去对应于要进行切割的区域的保护片的区域，形成槽。 然后，在夹具的相反侧将半导体晶片接合到保护片，并将夹具与保护片和半导体晶片接合在一起。 之后，通过沿保护片的沟槽切割将半导体晶片切割成半导体芯片。 由于保护片不是通过切割而切割的，所以不会产生保护片的废料，从而防止对芯片的污染。

公开(公告)号：US06287885B1

公开(公告)日：2001-09-11

申请号：US09306381

申请日：1999-05-06

申请人： Hiroshi Muto ,  Tsuyoshi Fukada ,  Masakazu Terada ,  Hiroshige Sugito ,  Masakazu Kanosue ,  Shinji Yoshihara ,  Shoji Ozoe ,  Seiji Fujino ,  Minekazu Sakai ,  Minoru Murata ,  Yukihiro Takeuchi ,  Seiki Aoyama ,  Toshio Yamamoto ,  Kazushi Asami

发明人： Hiroshi Muto ,  Tsuyoshi Fukada ,  Masakazu Terada ,  Hiroshige Sugito ,  Masakazu Kanosue ,  Shinji Yoshihara ,  Shoji Ozoe ,  Seiji Fujino ,  Minekazu Sakai ,  Minoru Murata ,  Yukihiro Takeuchi ,  Seiki Aoyama ,  Toshio Yamamoto ,  Kazushi Asami

IPC分类号： H01L21302

CPC分类号： B81C1/00936 ,  B81B3/0005 ,  B81B2201/0235 ,  B81B2201/025 ,  B81B2203/0136 ,  B81B2203/033 ,  B81B2203/04 ,  B81C2201/0132 ,  B81C2201/053 ,  B81C2201/112 ,  G01P15/0802 ,  G01P15/125 ,  G01P2015/0814 ,  G01P2015/084

摘要： In a method for manufacturing a semiconductor acceleration sensor, a movable portion including a mass portion and movable electrodes is formed in a single crystal silicon thin film provided on a silicon wafer through an insulation film by etching both the single crystal silicon thin film and the silicon wafer. In this case, the movable portion is finally defined at a movable portion defining step that is carried out in a vapor phase atmosphere. Accordingly, the movable portion is prevented from sticking to other regions due to etchant during the manufacture thereof.

公开(公告)号：US5731730A

公开(公告)日：1998-03-24

申请号：US745631

申请日：1996-11-08

申请人： Hiroshi Muto

发明人： Hiroshi Muto

IPC分类号： G11B20/10 ,  H03M1/12 ,  H03K5/08

CPC分类号： H03M1/1295 ,  G11B20/10037 ,  G11B20/10203 ,  G11B20/10527

摘要： In a magnetic disk drive in which an analog signal having symmetrical positive and negative odd levels with respect to a zero-level is read out of a magnetic disk by a head, the read analog signal is processed by an AGC circuit and a low pass filter, the processed analog signal is converted into a digital signal by an A/D converter, and the digital signal is demodulated by a demodulator, a zero-level setting circuit for the A/D converter is comprised of: a reference voltage generator for the A/D converter; a zero-level error detector between the read signal and the reference voltage; an accumulator for accumulating the zero-level error from the zero-level error detector; and an equalizer for equalizing the zero-level of the A/D converter to the reference voltage in accordance to an output signal from the zero-level error accumulator. As a result, the conversion accuracy of the A/D converter is improved while employing a small number of bits.

摘要翻译： 在其中通过磁头从磁盘读出相对于零电平具有对称正和负奇数电平的模拟信号的磁盘驱动器中，读取的模拟信号由AGC电路和低通滤波器 通过A / D转换器将经处理的模拟信号转换为数字信号，数字信号由解调器解调，用于A / D转换器的零电平设置电路包括：用于 A / D转换器; 读取信号与参考电压之间的零电平误差检测器; 累加器，用于从零电平误差检测器累积零电平误差; 以及均衡器，用于根据来自零电平误差累加器的输出信号将A / D转换器的零电平与参考电压相等。 结果，A / D转换器的转换精度得到改善，同时采用少量的位。

公开(公告)号：US5602503A

公开(公告)日：1997-02-11

申请号：US267208

申请日：1994-07-06

申请人： Hiroshi Muto

发明人： Hiroshi Muto

IPC分类号： G11B20/10 ,  H03M1/12 ,  H03K5/08

CPC分类号： H03M1/1295 ,  G11B20/10037 ,  G11B20/10203 ,  G11B20/10527

摘要： In a magnetic disk drive in which an analog signal having symmetrical positive and negative odd levels with respect to a zero-level is read out of a magnetic disk by a head, the read analog signal is processed by an AGC circuit and a low pass filter, the proceed analog signal is converted into a digital signal by an A/D converter, and the digital signal is demodulated by a demodulator, a zero-level setting circuit for the A/D converter is comprised of: a reference voltage generator for the A/D converter; a zero-level error detector between the read signal and the reference voltage; an accumulator for accumulating the zero-level error from the zero-level error detector; and an equalizer for equalizing the zero-level of the A/D converter to the reference voltage in accordance to an output signal from the zero-level error accumulator. As a result, the conversion accuracy of the A/D converter is improved while employing a small number of bits.

摘要翻译： 在其中通过磁头从磁盘读出相对于零电平具有对称正和负奇数电平的模拟信号的磁盘驱动器中，读取的模拟信号由AGC电路和低通滤波器 ，通过A / D转换器将继续的模拟信号转换为数字信号，数字信号由解调器解调，用于A / D转换器的零电平设置电路包括：用于 A / D转换器; 读取信号与参考电压之间的零电平误差检测器; 累加器，用于从零电平误差检测器累积零电平误差; 以及均衡器，用于根据来自零电平误差累加器的输出信号将A / D转换器的零电平与参考电压相等。 结果，A / D转换器的转换精度得到改善，同时采用少量的位。

公开(公告)号：US5264720A

公开(公告)日：1993-11-23

申请号：US879550

申请日：1992-05-04

申请人： Hiroshi Muto ,  Masami Yamaoka

发明人： Hiroshi Muto ,  Masami Yamaoka

IPC分类号： H01L27/12 ,  H01L27/01 ,  H01L29/76

CPC分类号： H01L27/1203

摘要： A high withstanding voltage transistor is provided with a substrate with its main surface at least part of which is electrically insulated, and a plurality of MOS type field effect transistors of the same channel type that are formed on the insulated main surface of the substrate, the channel regions of the number of MOS type field effect transistors are electrically separated respectively, the gates of the plurality of MOS type field effect transistors are mutually connected electrically, between and among the plurality of MOS type field effect transistors, the source of one transistor is connected to the drain of another transistor, and connecting in series the plurality of MOS type field effect transistors, they are made into a single transistor, thereby dividing the voltage applied in between the drain and the source of this high withstanding voltage transistor with depletion layer of the respective transistors and in turn improving the withstanding voltage of the whole.

摘要翻译： 高耐压晶体管设置有其主表面的至少一部分是电绝缘的基板，以及形成在基板的绝缘主表面上的多个相同沟道类型的MOS型场效应晶体管， 多个MOS型场效应晶体管的通道区分别电分离，多个MOS型场效应晶体管的栅极电连接，在多个MOS型场效应晶体管之间和之间相互连接，一个晶体管的源极 连接到另一个晶体管的漏极，并串联连接多个MOS型场效应晶体管，将它们制成单个晶体管，从而将施加在该耐高压晶体管的漏极和源极之间的电压除以耗尽层 并进而改善整体的耐受电压。

公开(公告)号：US06953753B2

公开(公告)日：2005-10-11

申请号：US10373964

申请日：2003-02-27

申请人： Junji Oohara ,  Kazuhiko Kano ,  Hiroshi Muto

发明人： Junji Oohara ,  Kazuhiko Kano ,  Hiroshi Muto

IPC分类号： B81B3/00 ,  B81C1/00 ,  G01P15/08 ,  G01P15/125 ,  H01L29/84 ,  H01L21/302

CPC分类号： B81C1/0019 ,  B81B2201/0235 ,  B81B2203/033 ,  B81C1/00579 ,  B81C2201/0132 ,  G01P15/0802 ,  G01P15/125 ,  G01P2015/0814 ,  Y10T428/169

摘要： A method for manufacturing a semiconductor device having a movable unit includes a step of forming an SOI substrate that includes a semiconductor substrate, an insulating layer, and a semiconductor layer such that the insulating layer is located between the semiconductor layer and the semiconductor substrate. The method further includes a step of dry etching the semiconductor layer to form a trench with a charge prevented from building up on a surface of the insulating layer that is exposed at a bottom of the trench during the dry etching. The method further includes a step of dry etching a sidewall defining the trench at a portion adjacent to the bottom of the trench to form the movable unit. The later dry etching is performed with a charge building up on the surface of the insulating layer such that etching ions strike to etch the portion of the sidewall.

摘要翻译： 一种具有可移动单元的半导体器件的制造方法包括：形成包括半导体衬底，绝缘层和半导体层的SOI衬底的步骤，使得绝缘层位于半导体层和半导体衬底之间。 该方法还包括干法蚀刻半导体层以形成沟槽的步骤，其中在干蚀刻期间，在沟槽底部露出的绝缘层的表面上阻止电荷积聚。 该方法还包括在邻近沟槽底部的部分干蚀刻限定沟槽的侧壁以形成可移动单元的步骤。 稍后的干法蚀刻是通过在绝缘层的表面上积聚的电荷进行的，使得蚀刻离子发生蚀刻以蚀刻侧壁的一部分。

公开(公告)号：US20050054153A1

公开(公告)日：2005-03-10

申请号：US10936539

申请日：2004-09-09

申请人： Kazushi Asami ,  Junji Oohara ,  Hiroshi Muto ,  Kazuhiko Sugiura ,  Tsuyoshi Fukada ,  Yukihiro Takeuchi

发明人： Kazushi Asami ,  Junji Oohara ,  Hiroshi Muto ,  Kazuhiko Sugiura ,  Tsuyoshi Fukada ,  Yukihiro Takeuchi

IPC分类号： B81C1/00 ,  H01L21/306 ,  H01L29/80 ,  H05K3/06

CPC分类号： B81C1/00619 ,  B81C2201/0112

摘要： A method for manufacturing a semiconductor device having a movable portion includes the steps of: forming a trench on a semiconductor layer so that the trench reaches an insulation layer; and forming a movable portion by etching a sidewall of the trench so that the semiconductor layer is separated from the insulation layer. The steps of forming the trench and forming the movable portion are performed by a reactive ion etching method. The insulation layer disposed on the bottom of the trench is prevented from charging positively in the step of forming the trench. The insulation layer disposed on the bottom of the trench is charged positively in the step of forming the movable portion.

摘要翻译： 一种制造具有可移动部分的半导体器件的方法包括以下步骤：在半导体层上形成沟槽，使得沟槽到达绝缘层; 以及通过蚀刻沟槽的侧壁形成可动部分，使得半导体层与绝缘层分离。 通过反应离子蚀刻方法进行形成沟槽并形成可动部的步骤。 在形成沟槽的步骤中，防止设置在沟槽底部的绝缘层被正面地充电。 设置在沟槽底部的绝缘层在形成可移动部分的步骤中被正向地充电。

公开(公告)号：US06444543B2

公开(公告)日：2002-09-03

申请号：US09866709

申请日：2001-05-30

申请人： Minekazu Sakai ,  Hiroshige Sugito ,  Hiroshi Muto ,  Motoki Ito ,  Tsuyoshi Fukada

发明人： Minekazu Sakai ,  Hiroshige Sugito ,  Hiroshi Muto ,  Motoki Ito ,  Tsuyoshi Fukada

IPC分类号： H01L21301

CPC分类号： B81C1/00896 ,  G01P15/0802 ,  G01P15/125 ,  G01P2015/0814

摘要： Plural semiconductor chips such as acceleration sensor chips formed on the first surface of a substrate are separated into individual pieces by dicing the substrate from the second surface thereof. A groove surrounding each sensor chip, along which the sensor chip is diced out, is formed at the same time the sensor chip is formed on the first surface. Before dicing, a protecting sheet covering the first surface is pasted along the sidewalls and the bottom wall of the groove. The groove is made sufficiently wide to ensure that the protecting sheet is bent along the walls of the groove without leaving a space between the groove and the protecting sheet. Thus, dicing dusts generated in the dicing process are prevented from being scattered and entering the sensor chip.

摘要翻译： 通过从基板的第二表面切割基板，形成在基板的第一表面上的加速度传感器芯片的多个半导体芯片被分离成单独的部件。 在传感器芯片形成在第一表面上的同时形成围绕传感器芯片的每个传感器芯片周围的凹槽，该传感器芯片被切出。 在切割之前，覆盖第一表面的保护片沿着凹槽的侧壁和底壁粘贴。 所述凹槽被制成足够宽以确保保护片沿着凹槽的壁弯曲，而不会在凹槽和保护片之间留下空间。 因此，防止在切割工艺中产生的切割粉尘被散射并进入传感器芯片。

公开(公告)号：US06245593B1

公开(公告)日：2001-06-12

申请号：US09444724

申请日：1999-11-24

申请人： Shinji Yoshihara ,  Yasuo Souki ,  Kinya Atsumi ,  Hiroshi Muto

发明人： Shinji Yoshihara ,  Yasuo Souki ,  Kinya Atsumi ,  Hiroshi Muto

IPC分类号： H01L2144

CPC分类号： B81C1/00888 ,  B81C1/00896 ,  C09J7/385 ,  C09J2203/326 ,  C09J2423/006 ,  C09J2433/00 ,  H01L21/6836 ,  H01L2221/68327

摘要： A semiconductor device has a semiconductor wafer having sensing portions exposed on a surface thereof and an adhesive sheet attached to the semiconductor wafer as a protective cap to cover the sensing portions. The adhesive sheet is composed of a flat adhesive sheet and adhesive disposed generally on an entire surface of the adhesive sheet. Adhesion of the adhesive is selectively reduced by UV irradiation to have adhesion reduced regions, and the adhesion reduced regions face the sensing portions. The protective cap can be produced with high productivity, and securely protect the sensing portions when the semiconductor wafer is diced and is transported.

摘要翻译： 半导体器件具有其表面上具有感测部分的半导体晶片和附接到半导体晶片的粘合片作为保护盖以覆盖感测部分。 粘合片由通常在粘合片的整个表面上设置的平坦粘合片和粘合剂构成。 通过UV照射选择性地降低粘合剂的粘附性以具有粘合减少区域，并且粘合降低区域面对感测部分。 可以以高生产率制造保护盖，并且在半导体晶片被切割并被输送时可靠地保护感测部分。