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    Flexible clocking for audio sample rate converter in a USB system
    11.
    发明授权
    Flexible clocking for audio sample rate converter in a USB system 有权
    适用于USB系统中音频采样率转换器的灵活时钟

    公开(公告)号：US09429980B2

    公开(公告)日：2016-08-30

    申请号：US14202517

    申请日：2014-03-10

    Applicant: Microchip Technology Incorporated

    Inventor： Yong Yuenyongsgool ,  Igor Wojewoda ,  Sergey Pavlov ,  Anton Alkhimenok ,  Kim Otten

    IPC: G06F17/00 ,  G06F1/04 ,  G06F1/10 ,  H03H17/06

    CPC classification number: G06F1/04 ,  G06F1/10 ,  H03H17/0642

    Abstract: A processor according to embodiments comprises an on-board sample rate converter for converting a source audio signal that is sampled at a first sampling rate to an output audio signal that is sampled at a second sampling rate. The sample rate converter utilizes a master clock signal in converting the audio signal. The sample rate converter selects the master clock signal from available reference clock signals, such as an on-chip system clock or a bus interface clock, and scales the frequency of the selected clock signal to generate the master clock signal with the frequency of the second sampling rate.

    Abstract translation: 根据实施例的处理器包括板载采样率转换器，用于将以第一采样率采样的源音频信号转换为以第二采样率采样的输出音频信号。 采样率转换器利用主时钟信号来转换音频信号。 采样率转换器从可用的参考时钟信号（例如片上系统时钟或总线接口时钟）中选择主时钟信号，并且缩放所选择的时钟信号的频率，以产生具有第二频率的主时钟信号 采样率。

    Flexible Clocking for Audio Sample Rate Converter in a USB System
    13.
    发明申请
    Flexible Clocking for Audio Sample Rate Converter in a USB System 有权
    USB系统中音频采样率转换器的灵活时钟

    公开(公告)号：US20140270253A1

    公开(公告)日：2014-09-18

    申请号：US14202517

    申请日：2014-03-10

    Applicant: Microchip Technology Incorporated

    Inventor： Yong Yuenyongsgool ,  Igor Wojewoda ,  Sergey Pavlov ,  Anton Alkhimenok ,  Kim Otten

    IPC: H04R3/04

    CPC classification number: G06F1/04 ,  G06F1/10 ,  H03H17/0642

    Abstract: A processor according to embodiments comprises an on-board sample rate converter for converting a source audio signal that is sampled at a first sampling rate to an output audio signal that is sampled at a second sampling rate. The sample rate converter utilizes a master clock signal in converting the audio signal. The sample rate converter selects the master clock signal from available reference clock signals, such as an on-chip system clock or a bus interface clock, and scales the frequency of the selected clock signal to generate the master clock signal with the frequency of the second sampling rate.

    Abstract translation: 根据实施例的处理器包括板载采样率转换器，用于将以第一采样率采样的源音频信号转换为以第二采样率采样的输出音频信号。 采样率转换器利用主时钟信号来转换音频信号。 采样率转换器从可用的参考时钟信号（例如片上系统时钟或总线接口时钟）中选择主时钟信号，并且缩放所选时钟信号的频率，以产生具有第二频率的主时钟信号 采样率。

    TEMPERATURE COMPENSATED CLOCK FREQUENCY MONITOR
    16.
    发明申请
    TEMPERATURE COMPENSATED CLOCK FREQUENCY MONITOR 审中-公开

    公开(公告)号：US20190094905A1

    公开(公告)日：2019-03-28

    申请号：US16143967

    申请日：2018-09-27

    Applicant: Microchip Technology Incorporated

    Inventor： Bryan Kris ,  Igor Wojewoda ,  Stephen Bowling ,  Yong Yuenyongsgool

    IPC: G06F1/08 ,  G06F1/20 ,  G06F11/30 ,  G01R23/15 ,  G01R19/25 ,  G05B13/02

    Abstract: A temperature-compensating clock frequency monitor circuit may be provided to detect a clock pulse frequency in an electronic device that may cause erratic or dangerous operation of the device, as a function of an operating temperature of the device. The temperature-compensating clock frequency monitor circuit include a temperature sensor configured to measure a temperature associated with an electronic device, a clock having an operating frequency, and a frequency monitoring system. The frequency monitoring system may be configured to determine the operating frequency of the clock, and based at least on (a) the operating frequency of the clock and (b) the measured temperature associated with the electronic device, generate a corrective action signal to initiate a corrective action associated with the electronic device or a related device. The temperature sensor, clock, and frequency monitoring system may, for example, be provided on a microcontroller.

    Boot sequencing for multi boot devices
    18.
    发明授权
    Boot sequencing for multi boot devices 有权

    公开(公告)号：US09733950B2

    公开(公告)日：2017-08-15

    申请号：US14209068

    申请日：2014-03-13

    Applicant: Microchip Technology Incorporated

    Inventor： Roshan Samuel ,  Rodney Pesavento ,  Igor Wojewoda

    IPC: G06F9/00 ,  G06F15/177 ,  G06F9/44

    CPC classification number: G06F9/441 ,  G06F9/4408

    Abstract: A multi-boot device capable of booting from a plurality of boot devices, each storing a boot image. The multi-boot device determines which boot device to load based on sequence numbers assigned to each of the boot devices. Some embodiments will make this determination using only hardware operations. The multi-boot device compares the sequence numbers of the available boot devices in order to determine the boot image to be loaded. The address of the selected boot image is then mapped to the device's default boot vector. The remaining images are likewise mapped to a secondary boot memory. The device then boots from the default boot vector. The user can change the boot device to be loaded by modifying one or more of the boot sequence numbers. The boot images can be updated without resetting the device by switching execution to and from boot images in the secondary boot memory.

    Low-Pin Microcontroller Device With Multiple Independent Microcontrollers
    19.
    发明申请
    Low-Pin Microcontroller Device With Multiple Independent Microcontrollers 有权
    具有多个独立微控制器的低引脚微控制器器件

    公开(公告)号：US20160267047A1

    公开(公告)日：2016-09-15

    申请号：US15065027

    申请日：2016-03-09

    Applicant: Microchip Technology Incorporated

    Inventor： Bryan Kris ,  Igor Wojewoda ,  Alex Dumais ,  Mike Catherwood ,  Brian Fall ,  Jason Tollefson ,  Calum Wilke ,  Dave Mickey ,  Thomas Spohrer ,  Jim Pepping ,  Vincent Sheard

    IPC: G06F13/42 ,  G06F13/16 ,  G06F13/364

    CPC classification number: G06F13/4282 ,  G06F1/22 ,  G06F13/1673 ,  G06F13/364 ,  G06F13/385 ,  G06F15/167 ,  Y02D10/14 ,  Y02D10/151

    Abstract: A microcontroller device has a housing with a plurality of external pins a first microcontroller with a first central processing unit (CPU), a first system bus coupled with the first CPU, first memory coupled with the first system bus, and a first plurality of peripheral devices coupled with the first system bus, and a second microcontroller with a second central processing unit (CPU), a second system bus coupled with the second CPU, second memory coupled with the second system bus, and a second plurality of peripheral devices coupled with the second system bus, wherein first and second microcontroller communicate only via a dedicated interface.

    Abstract translation: 微控制器装置具有壳体，其具有多个外部引脚，第一微控制器具有第一中央处理单元（CPU），与第一CPU耦合的第一系统总线，与第一系统总线耦合的第一存储器和第一多个外设 与第一系统总线耦合的设备，以及具有第二中央处理单元（CPU）的第二微控制器，与第二CPU耦合的第二系统总线，与第二系统总线耦合的第二存储器以及与第二系统总线耦合的第二多个外围设备 第二系统总线，其中第一和第二微控制器仅通过专用接口进行通信。

    Boot Sequencing for Multi Boot Devices
    20.
    发明申请
    Boot Sequencing for Multi Boot Devices 有权
    多引导设备的引导排序

    公开(公告)号：US20140281466A1

    公开(公告)日：2014-09-18

    申请号：US14209068

    申请日：2014-03-13

    Applicant: Microchip Technology Incorporated

    Inventor： Roshan Samuel ,  Rodney Pesavento ,  Igor Wojewoda

    IPC: G06F9/44

    CPC classification number: G06F9/441 ,  G06F9/4408

    Abstract: A multi-boot device capable of booting from a plurality of boot devices, each storing a boot image. The multi-boot device determines which boot device to load based on sequence numbers assigned to each of the boot devices. Some embodiments will make this determination using only hardware operations. The multi-boot device compares the sequence numbers of the available boot devices in order to determine the boot image to be loaded. The address of the selected boot image is then mapped to the device's default boot vector. The remaining images are likewise mapped to a secondary boot memory. The device then boots from the default boot vector. The user can change the boot device to be loaded by modifying one or more of the boot sequence numbers. The boot images can be updated without resetting the device by switching execution to and from boot images in the secondary boot memory.

    Abstract translation: 一种能够从多个引导设备引导的多引导设备，每个引导设备存储引导映像。 多引导设备基于分配给每个引导设备的序列号确定要加载的引导设备。 一些实施例将仅使用硬件操作进行该确定。 多引导设备比较可用引导设备的序列号，以确定要加载的引导映像。 然后将所选引导映像的地址映射到设备的默认引导向量。 其余图像同样映射到辅助引导存储器。 然后，设备将从默认启动向量启动。 用户可以通过修改一个或多个引导序列号来更改要加载的引导设备。 可以更新引导映像，而不需要通过切换第二引导存储器中的引导映像的执行来重置设备。

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