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11.发明申请公开(公告)号：US20170083063A1
公开(公告)日：2017-03-23
申请号：US14860127
申请日：2015-09-21
Applicant: QUALCOMM Incorporated
Inventor： Mehdi Saeidi , Melika Roshandell , Arpit Mittal , Farsheed Mahmoudi
Abstract: A method includes: receiving an electrical signal from a temperature sensor, wherein the temperature sensor is disposed within a package including a processor chip, further wherein the temperature sensor is thermally separated from the processor chip by materials within the package, generating temperature information from the electrical signal, processing the temperature information to determine that a performance of the processor chip should be mitigate, and mitigating the performance of the processor chip in response to the temperature information, wherein processing the temperature information and mitigating the performance of the processor are performed by the processor chip.
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公开(公告)号：US20170052552A1
公开(公告)日：2017-02-23
申请号：US14831874
申请日：2015-08-21
Applicant: QUALCOMM Incorporated
Inventor： Farsheed Mahmoudi , Sassan Shahrokhinia , James Thomas Doyle
IPC: G05F1/575
CPC classification number: G05F1/575
Abstract: Low dropout (LDO) regulators are described herein for providing regulated voltages for multiple voltage domains. In one embodiment, a voltage regulator comprises a plurality of pass transistors, each of the plurality of pass transistors being coupled between an input supply rail and a respective one of a plurality of regulator outputs. The voltage regulator also comprises a plurality of averaging resistors configured to average a plurality of feedback voltages to generate an average feedback voltage, wherein each of the plurality of feedback voltages provides voltage feedback for a respective one of the plurality of regulator outputs. The voltage regular further comprises an amplifier having a first input coupled to the average feedback voltage, and a second input coupled to a reference voltage, wherein the amplifier is configured to drive the plurality of pass transistors in a direction that reduces a difference between the reference voltage and the average feedback voltage.
Abstract translation: 本文描述了低压降（LDO）调节器，用于为多个电压域提供调节电压。 在一个实施例中，电压调节器包括多个传输晶体管，多个传输晶体管中的每一个耦合在输入电源轨和多个调节器输出中的相应一个之间。 电压调节器还包括多个平均电阻器，其被配置为平均多个反馈电压以产生平均反馈电压，其中多个反馈电压中的每一个为多个调节器输出中的相应一个提供电压反馈。 电压规则还包括具有耦合到平均反馈电压的第一输入和耦合到参考电压的第二输入的放大器，其中放大器被配置为沿着减小参考电压之间的差的方向驱动多个传输晶体管 电压和平均反馈电压。
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13.发明授权Circuits and methods providing three-level signals at a synchronous buck converter 有权在同步降压转换器中提供三电平信号的电路和方法公开(公告)号：US09450491B2
公开(公告)日：2016-09-20
申请号：US14630318
申请日：2015-02-24
Applicant: QUALCOMM Incorporated
Inventor： Chuang Zhang , James Thomas Doyle , Farsheed Mahmoudi , Amirali Shayan Arani
CPC classification number: H02M3/158 , H02M1/14 , H02M7/483 , H02M2003/072
Abstract: A circuit including: a three-level buck converter having: a plurality of input switches and an inductor configured to receive a voltage from the plurality of input switches, the plurality of input switches coupled with a first capacitor and configured to charge and discharge the first capacitor; a second capacitor at an output of the buck converter; and a switched capacitor at an input node of the inductor, wherein the switched capacitor is smaller than either the first capacitor or the second capacitor.
Abstract translation: 一种电路，包括：三电平降压转换器，具有：多个输入开关和电感器，被配置为从所述多个输入开关接收电压，所述多个输入开关与第一电容器耦合并且被配置为对所述第一电容器进行充电和放电 电容器 在降压转换器的输出处的第二电容器; 以及在所述电感器的输入节点处的开关电容器，其中所述开关电容器小于所述第一电容器或所述第二电容器。
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公开(公告)号：US20140225700A1
公开(公告)日：2014-08-14
申请号：US13791388
申请日：2013-03-08
Applicant: QUALCOMM INCORPORATED
Inventor： James Thomas Doyle , Farsheed Mahmoudi , Amirali Shayan Arani
CPC classification number: H01L23/49822 , H01F17/0006 , H01L23/645 , H01L25/105 , H01L28/10 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2225/06562 , H01L2225/1023 , H01L2225/1058 , H01L2924/15313 , H01L2924/15331 , H01L2924/19106 , Y10T29/4902 , H01L2924/00
Abstract: Some novel features pertain to an inductor structure that includes a first inductor winding, a second inductor winding and a filler. The first inductor winding includes an electrically conductive material. The second inductor winding includes an electrically conductive material. The filler is laterally located between the first inductor winding and the second inductor winding. The filler is configured to provide structural coupling of the first and second inductor windings. In some implementations, the first inductor winding is laterally co-planar to the second inductor winding. In some implementations, the first inductor winding has a first spiral shape and the second inductor winding has a second spiral shape. In some implementations, the first inductor winding and the second inductor winding have an elongated circular shape. In some implementations, the filler is an epoxy.
Abstract translation: 一些新颖的特征涉及一种电感器结构，其包括第一电感器绕组，第二电感器绕组和填充器。 第一电感器绕组包括导电材料。 第二电感线圈包括导电材料。 填料侧向位于第一电感器绕组和第二电感器绕组之间。 填充物被配置为提供第一和第二电感器绕组的结构耦合。 在一些实施方案中，第一电感器绕组与第二电感器绕组横向共面。 在一些实施方案中，第一电感器绕组具有第一螺旋形状并且第二电感器绕组具有第二螺旋形状。 在一些实施方案中，第一电感器绕组和第二电感器绕组具有细长的圆形形状。 在一些实施方案中，填料是环氧树脂。
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公开(公告)号：US10470309B2
公开(公告)日：2019-11-05
申请号：US14859320
申请日：2015-09-20
Applicant: QUALCOMM Incorporated
Inventor： Mete Erturk , Farsheed Mahmoudi , James Thomas Doyle , Ravindra Vaman Shenoy , Jitae Kim
IPC: H05K1/16 , H01L27/01 , H01L23/522 , H01L49/02 , H01L23/498 , H05K1/11 , H05K3/42
Abstract: An integrated circuit device, such as a system-on-a-chip (SOC) device that includes an integrated or embedded voltage regulator, comprises an integrated capacitor and an integrated inductor having a magnetic core that can be fabricated in the same process as the capacitive structure of the integrated capacitor.
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Patent Agency Ranking
公开(公告)号：US10393594B2
公开(公告)日：2019-08-27
申请号：US15675604
申请日：2017-08-11
Applicant: QUALCOMM Incorporated
Inventor： Ali Akbar Merrikh , Farsheed Mahmoudi , Mehdi Saeidi , Evan Bentley Fleming
Abstract: A semiconductor device may include a semiconductor die having an active region. The semiconductor device may also include a thermocouple mesh proximate to the active region. The thermocouple mesh may include a first set of wires of a first material extending in a first direction, and a second set of wires of a second material. The second material may be different from the first material. In addition, the second set of wires may extend in a second direction different than the first direction of the first wires.
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17.发明申请Circuits and Methods Providing Three-Level Signals At A Synchronous Buck Converter 有权在同步降压转换器中提供三电平信号的电路和方法公开(公告)号：US20160380543A1
公开(公告)日：2016-12-29
申请号：US15248267
申请日：2016-08-26
Applicant: QUALCOMM Incorporated
Inventor： Chuang Zhang , James Thomas Doyle , Farsheed Mahmoudi , Amirali Shayan Arani
CPC classification number: H02M3/158 , H02M1/14 , H02M7/483 , H02M2003/072
Abstract: A circuit including: a three-level buck converter having: a plurality of input switches and an inductor configured to receive a voltage from the plurality of input switches, the plurality of input switches coupled with a first capacitor and configured to charge and discharge the first capacitor; a second capacitor at an output of the buck converter; and a switched capacitor at an input node of the inductor, wherein the switched capacitor is smaller than either the first capacitor or the second capacitor.
Abstract translation: 一种电路，包括：三电平降压转换器，具有：多个输入开关和电感器，被配置为从所述多个输入开关接收电压，所述多个输入开关与第一电容器耦合并且被配置为对所述第一电容器进行充电和放电 电容器 在降压转换器的输出处的第二电容器; 以及在所述电感器的输入节点处的开关电容器，其中所述开关电容器小于所述第一电容器或所述第二电容器。
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18.发明申请CIRCUITS AND METHODS PROVIDING THREE-LEVEL SIGNALS AT A SYNCHRONOUS BUCK CONVERTER 有权在同步转换器上提供三级信号的电路和方法公开(公告)号：US20160118886A1
公开(公告)日：2016-04-28
申请号：US14630318
申请日：2015-02-24
Applicant: QUALCOMM Incorporated
Inventor： Chuang Zhang , James Thomas Doyle , Farsheed Mahmoudi , Amirali Shayan Arani
IPC: H02M3/158
CPC classification number: H02M3/158 , H02M1/14 , H02M7/483 , H02M2003/072
Abstract: A circuit including: a three-level buck converter having: a plurality of input switches and an inductor configured to receive a voltage from the plurality of input switches, the plurality of input switches coupled with a first capacitor and configured to charge and discharge the first capacitor; a second capacitor at an output of the buck converter; and a switched capacitor at an input node of the inductor, wherein the switched capacitor is smaller than either the first capacitor or the second capacitor.
Abstract translation: 一种电路，包括：三电平降压转换器，具有：多个输入开关和电感器，被配置为从所述多个输入开关接收电压，所述多个输入开关与第一电容器耦合并且被配置为对所述第一电容器进行充电和放电 电容器 在降压转换器的输出处的第二电容器; 以及在所述电感器的输入节点处的开关电容器，其中所述开关电容器小于所述第一电容器或所述第二电容器。
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公开(公告)号：US09843259B2
公开(公告)日：2017-12-12
申请号：US15248267
申请日：2016-08-26
Applicant: QUALCOMM Incorporated
Inventor： Chuang Zhang , James Thomas Doyle , Farsheed Mahmoudi , Amirali Shayan Arani
CPC classification number: H02M3/158 , H02M1/14 , H02M7/483 , H02M2003/072
Abstract: A circuit including: a three-level buck converter having: a plurality of input switches and an inductor configured to receive a voltage from the plurality of input switches, the plurality of input switches coupled with a first capacitor and configured to charge and discharge the first capacitor; a second capacitor at an output of the buck converter; and a switched capacitor at an input node of the inductor, wherein the switched capacitor is smaller than either the first capacitor or the second capacitor.
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公开(公告)号：US09748847B2
公开(公告)日：2017-08-29
申请号：US14863269
申请日：2015-09-23
Applicant: QUALCOMM Incorporated
Inventor： Farsheed Mahmoudi , James Thomas Doyle , Chuang Zhang , Zhengming Fu
CPC classification number: H02M3/1584 , G06F1/3296 , H02M1/088 , H02M3/157 , H02M2001/0048 , H02M2001/0054 , Y02B70/1491
Abstract: An apparatus and method are disclosed for providing efficient operation in a feedback loop having a synchronous buck converter. The synchronous buck converter includes a plurality of individually selectable phases, where each of the phases has a plurality of individually selectable and parallel switching legs. The circuit stores information that associates multiple different load values with respective configuration settings that each define a number of phases and a number of switching legs. As the load changes, the circuit measures the load and selects an appropriate configuration setting. The circuit applies the selected configuration setting to operate the number of phases and a number of parallel switching legs in the buck converter.
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