公开(公告)号：US20180182700A1

公开(公告)日：2018-06-28

申请号：US15817267

申请日：2017-11-19

Applicant: Renesas Electronics Corporation

Inventor： Yoshiaki Sato ,  Shuuichi Kariyazaki ,  Kazuyuki Nakagawa

IPC: H01L23/498 ,  H01L23/64 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L21/48 ,  H01L21/56 ,  H01L25/065

CPC classification number: H01L23/49838 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/486 ,  H01L21/565 ,  H01L22/32 ,  H01L23/3157 ,  H01L23/367 ,  H01L23/3675 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49894 ,  H01L23/50 ,  H01L23/642 ,  H01L24/13 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L25/0655 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/15311 ,  H01L2924/19041 ,  H01L2924/19103 ,  H05K1/0231 ,  H05K1/0268 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/10015 ,  H01L2924/00014

Abstract: A semiconductor device which provides improved reliability. The semiconductor device includes: a wiring substrate having a first surface and a second surface opposite to the first surface; a chip condenser built in the wiring substrate, having a first electrode and a second electrode; a first terminal and a second terminal disposed on the first surface; and a third terminal disposed on the second surface. The semiconductor device further includes: a first conduction path for coupling the first terminal and the third terminal; a second conduction path for coupling the first terminal and the first electrode; a third conduction path for coupling the third terminal and the first electrode; and a fourth conduction path for coupling the second terminal and the first electrode.

公开(公告)号：US10515890B2

公开(公告)日：2019-12-24

申请号：US15817267

申请日：2017-11-19

Applicant: Renesas Electronics Corporation

Inventor： Yoshiaki Sato ,  Shuuichi Kariyazaki ,  Kazuyuki Nakagawa

IPC: H01L21/66 ,  H01L23/498 ,  H01L23/64 ,  H01L23/31 ,  H01L23/367 ,  H01L21/48 ,  H01L21/56 ,  H01L25/065 ,  H05K1/02 ,  H01L23/50 ,  H01L23/00 ,  H05K1/18 ,  H05K3/46

Abstract: A semiconductor device which provides improved reliability. The semiconductor device includes: a wiring substrate having a first surface and a second surface opposite to the first surface; a chip condenser built in the wiring substrate, having a first electrode and a second electrode; a first terminal and a second terminal disposed on the first surface; and a third terminal disposed on the second surface. The semiconductor device further includes: a first conduction path for coupling the first terminal and the third terminal; a second conduction path for coupling the first terminal and the first electrode; a third conduction path for coupling the third terminal and the first electrode; and a fourth conduction path for coupling the second terminal and the first electrode.

公开(公告)号：US09837369B2

公开(公告)日：2017-12-05

申请号：US15023716

申请日：2013-09-27

Applicant: Renesas Electronics Corporation

Inventor： Yoshikazu Shimote ,  Shinji Baba ,  Toshihiro Iwasaki ,  Kazuyuki Nakagawa

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/00 ,  H01L23/498 ,  H01L23/50 ,  H01L21/78 ,  H05K3/28 ,  H05K3/34 ,  H01L21/683

CPC classification number: H01L24/17 ,  H01L21/561 ,  H01L21/563 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/3142 ,  H01L23/49805 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/49894 ,  H01L23/50 ,  H01L23/562 ,  H01L23/564 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L24/97 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/05009 ,  H01L2224/05022 ,  H01L2224/05124 ,  H01L2224/05572 ,  H01L2224/11 ,  H01L2224/1134 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13012 ,  H01L2224/13014 ,  H01L2224/13016 ,  H01L2224/13076 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16055 ,  H01L2224/16105 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/16237 ,  H01L2224/1713 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2224/48235 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/81 ,  H01L2224/81191 ,  H01L2224/81385 ,  H01L2224/814 ,  H01L2224/81815 ,  H01L2224/83 ,  H01L2224/83104 ,  H01L2224/85 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/014 ,  H01L2924/05442 ,  H01L2924/0665 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2924/186 ,  H01L2924/2064 ,  H01L2924/351 ,  H05K3/284 ,  H05K3/3436 ,  H05K2201/068 ,  H05K2201/09427 ,  H05K2201/10704 ,  H05K2201/10977 ,  H05K2203/0465 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2224/45099 ,  H01L2924/207

Abstract: In a semiconductor device (SP1) according to an embodiment, a solder resist film (first insulating layer, SR1) which is in contact with the base material layer, and a resin body (second insulating layer, 4) which is in contact with the solder resist film and the semiconductor chip, are laminated in between the base material layer (2CR) of a wiring substrate 2 and a semiconductor chip (3). In addition, a linear expansion coefficient of the solder resist film is equal to or larger than a linear expansion coefficient of the base material layer, and the linear expansion coefficient of the solder resist film is equal to or smaller than a linear expansion coefficient of the resin body. Also, the linear expansion coefficient of the base material layer is smaller than the linear expansion coefficient of the resin body. According to the above-described configuration, damage of the semiconductor device caused by a temperature cyclic load can be suppressed, and thereby reliability can be improved.

公开(公告)号：US09023717B2

公开(公告)日：2015-05-05

申请号：US14485649

申请日：2014-09-12

Applicant: Renesas Electronics Corporation

Inventor： Kazuyuki Nakagawa ,  Shunichi Abe

IPC: H01L21/78 ,  H01L21/66

CPC classification number: H01L21/78 ,  H01L22/32 ,  H01L22/34 ,  H01L2223/54453 ,  H01L2223/5446 ,  H01L2223/54473 ,  H01L2223/5448 ,  H01L2224/02166 ,  H01L2224/05554

Abstract: To provide a semiconductor device having improved reliability. A method of manufacturing a semiconductor device according to one embodiment includes a step of cutting, in a dicing region arranged between two chip regions adjacent to each other, a wafer along an extending direction of the dicing region. The dicing region has therein a plurality of metal patterns in a plurality of columns. In the step of cutting the wafer, one or more of the columns of metal patterns formed in a plurality of columns are removed, and the metal patterns of the column(s) different from the above-mentioned one or more of the columns are not removed.

Abstract translation: 提供具有提高的可靠性的半导体器件。 根据一个实施例的制造半导体器件的方法包括在切割区域的延伸方向上切割在彼此相邻的两个芯片区域之间的切割区域中的晶片的步骤。 切割区域中具有多个列中的多个金属图案。 在切割晶片的步骤中，去除在多个列中形成的一列或多列金属图案，并且与上述一个或多个列不同的列的金属图案不是 删除。