公开(公告)号：US20230361007A1

公开(公告)日：2023-11-09

申请号：US18351253

申请日：2023-07-12

Applicant: ROHM CO., LTD.

Inventor： Kenji FUJII ,  Taro NISHIOKA ,  Shinya HIKITA

IPC: H01L23/495 ,  H01L23/31

CPC classification number: H01L23/49548 ,  H01L23/4951 ,  H01L23/3121

Abstract: A semiconductor device includes leads each having an obverse surface facing in a thickness direction and extending in a first direction crossing the thickness direction, a semiconductor element including electrodes connected to the obverse surfaces of the leads, and a sealing resin covering the leads and semiconductor element. The sealing resin includes a resin bottom surface opposite from the semiconductor element with respect to the leads in the thickness direction. The leads are mutually separated in a second direction orthogonal to the thickness direction and the first direction. Each lead includes a first reverse surface, a second reverse surface and a recessed surface facing away from the obverse surface in the thickness direction. The first and the second reverse surfaces are mutually separated with the recessed surface intervening in the first direction and exposed at the resin bottom surface. The recessed surface is covered with the sealing resin.

公开(公告)号：US20170287817A1

公开(公告)日：2017-10-05

申请号：US15629243

申请日：2017-06-21

Applicant: ROHM CO., LTD.

Inventor： Akihiro KOGA ,  Taro NISHIOKA

IPC: H01L23/495 ,  H01L23/31 ,  H01L23/29 ,  H01L23/00

CPC classification number: H01L23/49548 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49541 ,  H01L24/32 ,  H01L24/42 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05599 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48177 ,  H01L2224/48247 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/1715 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor device is disclosed. The semiconductor device has a semiconductor chip, an island having an upper surface to which the semiconductor chip is bonded, a lead disposed around the island, a bonding wire extended between the surface of the semiconductor chip and the upper surface of the lead, and a resin package sealing the semiconductor chip, the island, the lead, and the bonding wire, while the lower surface of the island and the lower surface of the lead are exposed on the rear surface of the resin package, and the lead is provided with a recess concaved from the lower surface side and opened on a side surface thereof.

公开(公告)号：US20240112995A1

公开(公告)日：2024-04-04

申请号：US18256150

申请日：2021-11-29

Applicant: ROHM CO., LTD.

Inventor： Moe YAMAGUCHI ,  Hiroaki MATSUBARA ,  Yoshizo OSUMI ,  Tomohira KIKUCHI ,  Ryohei UMENO ,  Taro NISHIOKA

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49575 ,  H01L23/3107 ,  H01L23/49513 ,  H01L23/49517 ,  H01L23/49558 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/29139 ,  H01L2224/32245 ,  H01L2224/48245 ,  H01L2224/73265

Abstract: A semiconductor device includes a first die pad with a first obverse surface facing in z direction, a second die pad spaced from the first die pad and including a second obverse surface facing in z direction, a first semiconductor element on the first obverse surface, a second semiconductor element on the second obverse surface, an insulating element on the first or second obverse surface and located between the first and second semiconductor elements in x direction to relay signals between the first and second semiconductor elements while electrically insulating these semiconductor elements, and a wire bonded to the first semiconductor element and the first obverse surface. The first die pad includes a first bond portion bonded to the wire, and a first opening located between the first bond portion and the first semiconductor element in y direction and including an opening end in the first obverse surface.

公开(公告)号：US20240030109A1

公开(公告)日：2024-01-25

申请号：US18474654

申请日：2023-09-26

Applicant: ROHM CO., LTD.

Inventor： Yoshizo OSUMI ,  Taro NISHIOKA ,  Hiroaki MATSUBARA

IPC: H01L23/495 ,  H01L23/00

CPC classification number: H01L23/49562 ,  H01L23/49503 ,  H01L24/48 ,  H01L24/45 ,  H01L2924/13091 ,  H01L2224/48247 ,  H01L2224/45144

Abstract: A semiconductor device includes: a plurality of conductive members including a first die pad and a second die pad that are spaced apart from each other; a first semiconductor element mounted on the first die pad; a second semiconductor element mounted on the second die pad; and an insulator that is electrically connected to the first semiconductor element and the second semiconductor element, and that insulates the first semiconductor element and the second semiconductor element from each other. The plurality of conductive members include a third die pad spaced apart from the first die pad and the second die pad. The insulator is mounted on the third die pad.

公开(公告)号：US20180182729A1

公开(公告)日：2018-06-28

申请号：US15905324

申请日：2018-02-26

Applicant: ROHM CO., LTD.

Inventor： Hiroaki MATSUBARA ,  Yasumasa KASUYA ,  Taro NISHIOKA

IPC: H01L23/00 ,  H01L23/544

CPC classification number: H01L24/32 ,  H01L21/4828 ,  H01L23/3107 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49575 ,  H01L23/544 ,  H01L23/564 ,  H01L24/05 ,  H01L24/06 ,  H01L24/29 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/54486 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05639 ,  H01L2224/06155 ,  H01L2224/29139 ,  H01L2224/29239 ,  H01L2224/29294 ,  H01L2224/29339 ,  H01L2224/29387 ,  H01L2224/2939 ,  H01L2224/29499 ,  H01L2224/32013 ,  H01L2224/32105 ,  H01L2224/32106 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/83439 ,  H01L2224/85439 ,  H01L2924/00014 ,  H01L2924/01047 ,  H01L2924/05442 ,  H01L2924/181 ,  H01L2924/3512 ,  H01L2924/35121 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/207

Abstract: An electronic device includes an electronic element, a plurality of first sub-electrodes arrayed in a first direction, a plurality of second sub-electrodes arrayed in a second direction that is orthogonal to the first direction, a dummy electrode, and a sealing resin. The sealing resin has a resin back surface from which the plurality of first sub-electrodes, the plurality of second sub-electrodes and the dummy electrode are exposed. The plurality of second sub-electrodes are located further in the first direction than any of the plurality of first sub-electrodes. The plurality of first sub-electrodes are located further in the second direction than any of the plurality of second sub-electrodes. The dummy electrode is located further in the first direction than any of the plurality of first sub-electrodes, and is located further in the second direction than any of the plurality of second sub-electrodes.

公开(公告)号：US20150179554A1

公开(公告)日：2015-06-25

申请号：US14637565

申请日：2015-03-04

Applicant: ROHM CO., LTD.

Inventor： Akihiro KOGA ,  Taro NISHIOKA

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L23/49548 ,  H01L23/293 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/49 ,  H01L23/49503 ,  H01L23/4952 ,  H01L23/49541 ,  H01L24/32 ,  H01L24/42 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05599 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48177 ,  H01L2224/48247 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/1715 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A semiconductor device is disclosed. The semiconductor device has a semiconductor chip, an island having an upper surface to which the semiconductor chip is bonded, a lead disposed around the island, a bonding wire extended between the surface of the semiconductor chip and the upper surface of the lead, and a resin package sealing the semiconductor chip, the island, the lead, and the bonding wire, while the lower surface of the island and the lower surface of the lead are exposed on the rear surface of the resin package, and the lead is provided with a recess concaved from the lower surface side and opened on a side surface thereof.

Abstract translation: 公开了一种半导体器件。 半导体器件具有半导体芯片，具有半导体芯片接合的上表面的岛，设置在岛上的引线，在半导体芯片的表面和引线的上表面之间延伸的接合线，以及 树脂封装密封半导体芯片，岛，引线和接合线，而岛的下表面和引线的下表面暴露在树脂封装的后表面上，并且引线设置有 从下表面侧凹入并在其侧面开口的凹部。

公开(公告)号：US20150035528A1

公开(公告)日：2015-02-05

申请号：US14450896

申请日：2014-08-04

Applicant: ROHM CO., LTD.

Inventor： Taro NISHIOKA ,  Mamoru YAMAGAMI

IPC: G01R33/02 ,  G01B7/00

CPC classification number: G01R33/0206 ,  G01C17/28 ,  G01R33/0005 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/4554

Abstract: A semiconductor device is provided with a substrate including a main surface and a back surface that face in opposite directions to each other in a thickness direction, and first, second and third direction sensor elements having different detection reference axes from each other. The substrate is formed with a recessed portion that is recessed from the main surface toward the back surface side. The first direction sensor element is disposed at least partially within the recessed portion. The second direction sensor element is disposed so as to overlap with the main surface as viewed in the thickness direction.

Abstract translation: 半导体器件具有基板，该基板包括在厚度方向上彼此相反方向的主表面和背面，以及具有彼此不同的检测基准轴的第一，第二和第三方向传感器元件。 基板形成有从主表面朝向背面侧凹陷的凹部。 第一方向传感器元件至少部分地设置在凹部内。 第二方向传感器元件设置成在厚度方向上与主表面重叠。

公开(公告)号：US20240047438A1

公开(公告)日：2024-02-08

申请号：US18267455

申请日：2021-11-22

Applicant: ROHM CO., LTD.

Inventor： Hiroaki MATSUBARA ,  Taro NISHIOKA ,  Yoshizo OSUMI ,  Tomohira KIKUCHI ,  Moe YAMAGUCHI ,  Ryohei UMENO

IPC: H01L25/16 ,  H01L23/31 ,  H01L23/495 ,  H01L23/00

CPC classification number: H01L25/16 ,  H01L23/3107 ,  H01L23/49579 ,  H01L24/45 ,  H01L24/46 ,  H01L24/48 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45664 ,  H01L2224/46 ,  H01L2224/48195 ,  H01L2224/48245 ,  H01L2224/48991 ,  H01L2224/48455 ,  H01L2924/19042 ,  H01L2924/3512

Abstract: A semiconductor device includes first and second semiconductor elements, and first and second circuits at different potentials. The second semiconductor element, electrically connected to the first semiconductor element, relays mutual signals between the first and the second circuits, while insulating them. The semiconductor device further includes a first terminal lead electrically connected to the first semiconductor element, a first wire connected to the first and the second semiconductor elements, and a second wire connected to the first semiconductor element and the first terminal lead. The first wire contains a first metal. The second wire includes a first core containing a second metal, and a first surface layer containing a third metal and covering the first core. The second metal has a smaller atomic number than that of the first metal. The third metal has a greater bonding strength with respect to the first terminal lead than the second metal.

公开(公告)号：US20230335529A1

公开(公告)日：2023-10-19

申请号：US18340346

申请日：2023-06-23

Applicant: ROHM CO., LTD.

Inventor： Ryohei UMENO ,  Taro NISHIOKA ,  Hiroaki MATSUBARA ,  Yoshizo OSUMI ,  Tomohira KIKUCHI ,  Moe YAMAGUCHI

IPC: H01L23/00 ,  H01L23/495 ,  H01L23/31

CPC classification number: H01L24/48 ,  H01L23/49562 ,  H01L23/4952 ,  H01L23/3107 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/48137 ,  H01L2924/13091 ,  H01L2924/13055 ,  H01L2224/32245 ,  H01L2224/73265

Abstract: A semiconductor device includes: a semiconductor element; an island lead on which the semiconductor element is mounted; a terminal lead electrically connected to the semiconductor element; a wire connected to the semiconductor element and the terminal lead; and a sealing resin covering the semiconductor element, the island lead, the terminal lead, and the wire. The terminal lead includes a base member having an obverse surface facing in a thickness direction of the terminal lead, and a metal layer located between the obverse surface and the wire. The base member has a greater bonding strength with respect to the sealing resin than the metal layer. The obverse surface includes an opposing side facing the island lead. The obverse surface includes a first portion that includes at least a portion of the opposing side and that is exposed from the metal layer.

公开(公告)号：US20220068776A1

公开(公告)日：2022-03-03

申请号：US17454576

申请日：2021-11-11

Applicant: ROHM CO., LTD.

Inventor： Yoshizo OSUMI ,  Taro NISHIOKA ,  Tomohira KIKUCHI ,  Tsunehisa ONO

IPC: H01L23/495 ,  H01L25/07 ,  H01L25/065 ,  H01L23/00

Abstract: A semiconductor device includes a first semiconductor chip and a second semiconductor chip to which different power-supply voltages are supplied, connection bonding wires connecting the first semiconductor chip and the second semiconductor chip to each other, and a sealing resin provided to fill a gap between a first lead frame on which the first semiconductor chip is mounted and a second lead frame on which the second semiconductor chip is mounted so as to cover the respective circumferences of the first semiconductor chip and the second semiconductor chip. The respective surfaces of the first lead frame and the second lead frame in the regions opposed to each other are covered with an insulating protection film including a material having higher electrical breakdown voltage than a material included in the sealing resin.