公开(公告)号：US20230395172A1

公开(公告)日：2023-12-07

申请号：US18237429

申请日：2023-08-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masayuki SAKAKURA ,  Yuugo GOTO ,  Hiroyuki MIYAKE ,  Daisuke KUROSAKI

IPC: G11C19/18 ,  H01L27/12

CPC classification number: G11C19/184 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/0248

Abstract: A semiconductor device in which a decrease in the yield by electrostatic destruction can be prevented is provided. A scan line driver circuit for supplying a signal for selecting a plurality of pixels to a scan line includes a shift register for generating the signal. One conductive film functioning as respective gate electrodes of a plurality of transistors in the shift register is divided into a plurality of conductive films. The divided conductive films are electrically connected to each other by a conductive film which is formed in a layer different from the divided conductive films are formed. The plurality of transistors includes a transistor on an output side of the shift register.

公开(公告)号：US20220004070A1

公开(公告)日：2022-01-06

申请号：US17291663

申请日：2019-11-25

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kenichi OKAZAKI ,  Yukinori SHIMA ,  Daisuke KUROSAKI ,  Masataka NAKADA

IPC: G02F1/1362 ,  G02F1/1368

Abstract: The manufacturing yield of a display device is improved. The resistance of a display device to ESD is increased. The display device includes a substrate, a display portion, a connection terminal, a first wiring, and a second wiring. The first wiring is electrically connected to the connection terminal and includes a portion positioned between the connection terminal and the display portion. The second wiring is electrically connected to the connection terminal, is positioned between the connection terminal and an end portion of the substrate, and includes a portion in which a side surface is exposed at an end portion of the substrate. The display portion includes a transistor. The transistor includes a semiconductor layer, a gate insulating layer, and a gate electrode. The semiconductor layer and the second wiring include a metal oxide.

公开(公告)号：US20200161340A1

公开(公告)日：2020-05-21

申请号：US16635290

申请日：2018-08-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masami JINTYOU ,  Daisuke KUROSAKI ,  Masakatsu OHNO ,  Junichi KOEZUKA

IPC: H01L27/12 ,  H01L33/62 ,  G02F1/1368

Abstract: A highly reliable semiconductor device is provided. A second insulating layer is positioned over a first insulating layer. A semiconductor layer is positioned between the first insulating layer and the second insulating layer. A third insulating layer is positioned over the second insulating layer. A fourth insulating layer is positioned over the third insulating layer. A first conductive layer includes a region overlapping with the semiconductor layer, and is positioned between the third insulating layer and the fourth insulating layer. The third insulating layer includes a region in contact with a bottom surface of the first conductive layer and a region in contact with the fourth insulating layer. The fourth insulating layer is in contact with atop surface and a side surface of the first conductive layer. A fifth insulating layer is in contact with a top surface and a side surface of the semiconductor layer. The fifth insulating layer includes a first opening and a second opening in a region overlapping with the semiconductor layer and not overlapping with the first conductive layer. A second conductive layer and a third conductive layer are electrically connected to the semiconductor layer in the first opening and the second opening, respectively. The third to fifth insulating layers include metal, and oxygen or nitrogen. A sixth insulating layer includes a region in contact with a top surface and a side surface of the fifth insulating layer and a region in contact with the first insulating layer.

公开(公告)号：US20180337039A1

公开(公告)日：2018-11-22

申请号：US16033721

申请日：2018-07-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Daisuke KUROSAKI ,  Yasutaka NAKAZAWA ,  Kenichi OKAZAKI

IPC: H01L21/02 ,  H01L29/786 ,  H01L21/28 ,  H01L27/32 ,  H01L29/423 ,  H01L29/49 ,  H01L29/51

CPC classification number: H01L21/02266 ,  H01L21/02142 ,  H01L21/02164 ,  H01L21/02472 ,  H01L21/02483 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02601 ,  H01L21/02631 ,  H01L21/28211 ,  H01L27/1225 ,  H01L27/1255 ,  H01L27/3244 ,  H01L29/4232 ,  H01L29/4908 ,  H01L29/517 ,  H01L29/786 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: To provide a novel method for manufacturing a semiconductor device. To provide a method for manufacturing a highly reliable semiconductor device at relatively low temperature. The method includes a first step of forming a first oxide semiconductor film in a deposition chamber and a second step of forming a second oxide semiconductor film over the first oxide semiconductor film in the deposition chamber. Water vapor partial pressure in an atmosphere in the deposition chamber is lower than water vapor partial pressure in atmospheric air. The first oxide semiconductor film and the second oxide semiconductor film are formed such that the first oxide semiconductor film and the second oxide semiconductor film each have crystallinity. The second oxide semiconductor film is formed such that the crystallinity of the second oxide semiconductor film is higher than the crystallinity of the first oxide semiconductor film.

公开(公告)号：US20180219102A1

公开(公告)日：2018-08-02

申请号：US15935324

申请日：2018-03-26

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Junichi KOEZUKA ,  Masami JINTYOU ,  Yukinori SHIMA ,  Daisuke KUROSAKI ,  Masataka NAKADA ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L27/12

CPC classification number: H01L29/78693 ,  H01L27/1225 ,  H01L27/1251 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: The semiconductor device includes a first transistor provided in a driver circuit portion and a second transistor provided in a pixel portion; the first transistor and the second transistor have different structures. In an oxide semiconductor film of each of the transistors, an impurity element is contained in regions which do not overlap with a gate electrode. The regions of the oxide semiconductor film which contain the impurity element function as low-resistance regions. Furthermore, the regions of the oxide semiconductor film which contain the impurity element are in contact with a film containing hydrogen. Furthermore, the first transistor provided in the driver circuit portion may include the oxide semiconductor film in which a first film and a second film are stacked, and the second transistor provided in the pixel portion may include the oxide semiconductor film which differs from the first film in the atomic ratio of metal elements.

公开(公告)号：US20180174862A1

公开(公告)日：2018-06-21

申请号：US15893748

申请日：2018-02-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi KOEZUKA ,  Daisuke KUROSAKI ,  Yukinori SHIMA ,  Takuya HANDA

IPC: H01L21/477 ,  H01L21/02

CPC classification number: H01L21/477 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/02172 ,  H01L21/02274 ,  H01L21/02323 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02614 ,  H01L21/02631 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78693

Abstract: In a semiconductor device including an oxide semiconductor, a change in electrical characteristics is inhibited and reliability is improved. The semiconductor device is manufactured by a method including first to fourth steps. The first step includes a step of forming an oxide semiconductor film, the second step includes a step of forming an oxide insulating film over the oxide semiconductor film, the third step includes a step of forming a protective film over the oxide insulating film, and the fourth step includes a step of adding oxygen to the oxide insulating film through the protective film. In the first step, the oxide semiconductor film is formed under a condition in which an oxygen vacancy is formed. The oxygen from the oxide insulating film fills the oxygen vacancy after the fourth step.

公开(公告)号：US20180090602A1

公开(公告)日：2018-03-29

申请号：US15825153

申请日：2017-11-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi KOEZUKA ,  Kenichi OKAZAKI ,  Daisuke KUROSAKI ,  Yukinori SHIMA ,  Yasuharu HOSAKA

IPC: H01L29/66 ,  H01L27/12 ,  H01L21/02 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/022 ,  H01L21/02274 ,  H01L21/02472 ,  H01L21/02483 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L27/1225 ,  H01L27/1259 ,  H01L29/78606 ,  H01L29/7869 ,  H01L29/78696

Abstract: The transistor includes a gate electrode, a gate insulating film over the gate electrode, an oxide semiconductor film over the gate insulating film, a source electrode and a drain electrode electrically connected to the oxide semiconductor film The oxide semiconductor film includes a first oxide semiconductor film on the gate electrode side and a second oxide semiconductor film over the first oxide semiconductor film. The first oxide semiconductor film includes a first region in which an atomic proportion of In is larger than that of M (M is Ti, Ga, Sn, Y, Zr, La, Ce, Nd, or Hf). The second oxide semiconductor film includes a second region in which an atomic proportion of In is smaller than that of the first oxide semiconductor film. The second region includes a portion thinner than the first region.

公开(公告)号：US20170301699A1

公开(公告)日：2017-10-19

申请号：US15471368

申请日：2017-03-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kenichi OKAZAKI ,  Daisuke KUROSAKI ,  Yasutaka NAKAZAWA

IPC: H01L27/12

CPC classification number: H01L27/1225 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: To improve field-effect mobility and reliability of a transistor including an oxide semiconductor film. A semiconductor device includes an oxide semiconductor film, a gate electrode, an insulating film over the gate electrode, the oxide semiconductor film over the insulating film, and a pair of electrodes over the oxide semiconductor film. The oxide semiconductor film includes a first oxide semiconductor film and a second oxide semiconductor film over the first oxide semiconductor film. The first oxide semiconductor film and the second oxide semiconductor film, include the same element. The first oxide semiconductor film includes a region having lower crystallinity than the second oxide semiconductor film.

公开(公告)号：US20170160576A1

公开(公告)日：2017-06-08

申请号：US15433539

申请日：2017-02-15

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Toru TANABE ,  Takahiro FUKUTOME ,  Koji MORIYA ,  Daisuke KUROSAKI ,  Masakatsu OHNO

IPC: G02F1/1333 ,  G06F3/044 ,  G02F1/1337 ,  G02F1/137 ,  G02F1/1368 ,  G02F1/1343

CPC classification number: G02F1/13338 ,  G02F1/133345 ,  G02F1/1337 ,  G02F1/134309 ,  G02F1/1368 ,  G02F1/137 ,  G02F2001/133334 ,  G02F2201/121 ,  G02F2201/123 ,  G06F3/0412 ,  G06F3/044 ,  G06F2203/04103

Abstract: A liquid crystal display device that is not influenced by a noise in obtaining positional information can be provided. The liquid crystal display device includes a first substrate provided with a pixel electrode and a common electrode with a first insulating film interposed therebetween. The pixel electrode and the common electrode partly overlap with each other. The liquid crystal display device further includes a second substrate provided with a pair of electrodes, a resin film covering the pair of electrodes, and a conductive film on the resin film. The pair of electrodes partly overlap with each other with a second insulating film interposed therebetween. The liquid crystal display device further includes a liquid crystal layer between the conductive film on the second substrate side and the pixel electrode and the common electrode on the first substrate side. A predetermined potential is supplied to the conductive film.

公开(公告)号：US20160276486A1

公开(公告)日：2016-09-22

申请号：US15070306

申请日：2016-03-15

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Junichi KOEZUKA ,  Kenichi OKAZAKI ,  Masami JINTYOU ,  Daisuke KUROSAKI ,  Takahiro IGUCHI ,  Naoto GOTO ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L29/49 ,  H01L29/04 ,  H01L29/24

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/24 ,  H01L29/4908 ,  H01L29/4966 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/78696

Abstract: To suppress a change in electrical characteristics and improve reliability in a transistor including an oxide semiconductor film. Provided is a semiconductor device including a transistor including a first gate electrode, a first insulating film over the first gate electrode, a first oxide semiconductor film over the first insulating film, a source electrode electrically connected to the first oxide semiconductor film, a drain electrode electrically connected to the first oxide semiconductor film, a second insulating film over the first oxide semiconductor film, a second oxide semiconductor film as a second gate electrode over the second insulating film, and a third insulating film over the second oxide semiconductor film. The second insulating film includes an excess oxygen region having a concentration gradient.

Abstract translation: 抑制包含氧化物半导体膜的晶体管的电特性变化和提高可靠性。 本发明提供一种半导体器件，包括晶体管，其包括第一栅电极，第一栅电极上的第一绝缘膜，第一绝缘膜上的第一氧化物半导体膜，电连接到第一氧化物半导体膜的源电极，漏电极 电连接到第一氧化物半导体膜，在第一氧化物半导体膜上方的第二绝缘膜，在第二绝缘膜上的作为第二栅电极的第二氧化物半导体膜，以及在第二氧化物半导体膜上的第三绝缘膜。 第二绝缘膜包括具有浓度梯度的过量氧区域。