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公开(公告)号：US20170331182A1
公开(公告)日：2017-11-16
申请号：US15667259
申请日：2017-08-02
Inventor： David Auchere , Laurent Marechal , Laurent Schwarz , Yvon Imbs
CPC classification number: H01Q1/38 , H01L21/4853 , H01L21/486 , H01L21/4889 , H01L21/52 , H01L21/56 , H01L23/13 , H01L23/3114 , H01L23/3128 , H01L23/315 , H01L23/481 , H01L23/498 , H01L23/49811 , H01L23/49827 , H01L23/645 , H01L23/66 , H01L24/81 , H01L2223/6677 , H01L2224/16227 , H01L2924/15311 , H01L2924/1815 , H01Q1/2283
Abstract: An electronic device includes a support board having a mounting face and an integrated circuit chip mounted on the mounting face. An encapsulation block embeds the integrated circuit chip, the encapsulation block extending above the integrated circuit chip and around the integrated circuit chip on the mounting face of the support board. The encapsulation block includes a front face with a hole passing through the encapsulation block to uncovering at least part of an electrical contact. A layer made of an electrically conducting material fills the hole to make electrical connection to the electrical contact and further extends over the front face of the encapsulation block.
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12.发明申请公开(公告)号：US20170323841A1
公开(公告)日：2017-11-09
申请号：US15659078
申请日：2017-07-25
Inventor： Yvon Imbs , Laurent Schwarz , David Auchere , Laurent Marechal
IPC: H01L23/31 , H01L21/768 , H01L23/498 , H01L21/3105 , H01L23/66 , H01L23/00 , H01L21/56 , H01L23/48
CPC classification number: H01L23/3121 , H01L21/3105 , H01L21/56 , H01L21/76802 , H01L21/76877 , H01L23/3135 , H01L23/481 , H01L23/49811 , H01L23/49838 , H01L23/66 , H01L24/48 , H01L24/85 , H01L2223/6611 , H01L2223/6677 , H01L2224/16225 , H01L2224/45124 , H01L2224/45147 , H01L2224/48227 , H01L2224/48235 , H01L2224/73257 , H01L2224/8538 , H01L2924/00012 , H01L2924/00014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19107 , H01L2224/05599 , H01L2224/85399
Abstract: An electronic device includes a supporting substrate having a front mounting face and an electrical connection network. An integrated circuit chip is mounted to the mounting face and is electrically connected to the electrical connection network. A primary encapsulation block embeds the integrated circuit chip and extends above and around the integrated circuit chip on the mounting face of the supporting substrate. An opening is provided in the primary encapsulation block to at least partially uncover an electrical contact. An additional wire made from an electrically conductive material has an end that is electrically connected to the electrical contact. An additional encapsulation block above the primary encapsulation block embeds the additional wire.
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公开(公告)号：US11756874B2
公开(公告)日：2023-09-12
申请号：US17945822
申请日：2022-09-15
Inventor： David Auchere , Claire Laporte , Deborah Cogoni , Laurent Schwartz
CPC classification number: H01L23/50 , H01L23/315 , H01L23/3128
Abstract: An electronic device includes a carrier substrate with an electronic IC chip mounted on top of the carrier substrate. An encapsulation block on top of the front face of the carrier substrate embeds the IC chip. The encapsulation block has a through-void for positioning and confinement that extends through the encapsulation block to the top of the carrier substrate. At least one electronic component is positioned within the through-void and mounted to the top of the carrier substrate. Solder bumps or pads are located within the through-void to electrically connect the at least one electronic component to the carrier substrate.
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公开(公告)号：US10116037B2
公开(公告)日：2018-10-30
申请号：US15668816
申请日：2017-08-04
Inventor： David Auchere , Laurent Marechal , Yvon Imbs , Laurent Schwarz
Abstract: An electronic device includes a support plate having a mounting face and an electrical connection network. An integrated circuit chip is mounted on the mounting face and linked to the electrical connection network. An en encapsulation block embeds the integrated circuit chip. An additional element made of an electrically conductive material is at least partly embedded within the encapsulation block. The additional conductive element has a main portion extending parallel to the support plate and has a secondary portion that is linked electrically to the integrated circuit chip. An opening is formed in the encapsulation block, and the secondary portion extends into that opening to make the electrical link. The additional conductive element may be an antenna.
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公开(公告)号：US10103079B2
公开(公告)日：2018-10-16
申请号：US15659078
申请日：2017-07-25
Inventor： Yvon Imbs , Laurent Schwarz , David Auchere , Laurent Marechal
IPC: H01L23/48 , H01L23/31 , H01L21/56 , H01L21/768 , H01L21/3105 , H01L23/498 , H01L23/66 , H01L23/00
Abstract: An electronic device includes a supporting substrate having a front mounting face and an electrical connection network. An integrated circuit chip is mounted to the mounting face and is electrically connected to the electrical connection network. A primary encapsulation block embeds the integrated circuit chip and extends above and around the integrated circuit chip on the mounting face of the supporting substrate. An opening is provided in the primary encapsulation block to at least partially uncover an electrical contact. An additional wire made from an electrically conductive material has an end that is electrically connected to the electrical contact. An additional encapsulation block above the primary encapsulation block embeds the additional wire.
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Patent Agency Ranking
16.发明申请公开(公告)号：US20180213654A1
公开(公告)日：2018-07-26
申请号：US15926583
申请日：2018-03-20
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor： David Auchere , Laurent Marechal
IPC: H05K3/42 , H01L23/498 , H01L23/64
CPC classification number: H05K3/42 , H01L23/49811 , H01L23/49822 , H01L23/49827 , H01L23/645 , H01L2224/16225 , H01L2924/15311 , Y10T29/4913
Abstract: An electronic device includes a substrate having an external surface, and an integrated circuit over the external surface of the substrate. The substrate is provided with an electrical connection network including electrical links for linking the integrated circuit to another electrical device. Some of the electrical links include an impedance-compensating inductor on an external surface of the substrate.
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公开(公告)号：US09949381B2
公开(公告)日：2018-04-17
申请号：US14330176
申请日：2014-07-14
Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS
Inventor： David Auchere , Laurent Marechal
IPC: H05K1/18 , H05K3/42 , H01L23/64 , H01L23/498
CPC classification number: H05K3/42 , H01L23/49811 , H01L23/49822 , H01L23/49827 , H01L23/645 , H01L2224/16225 , H01L2924/15311 , Y10T29/4913
Abstract: An electronic device includes a substrate having an external surface, and an integrated circuit over the external surface of the substrate. The substrate is provided with an electrical connection network including electrical links for linking the integrated circuit to another electrical device. Some of the electrical links include an impedance-compensating inductor on an external surface of the substrate.
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公开(公告)号：US09754851B2
公开(公告)日：2017-09-05
申请号：US15050253
申请日：2016-02-22
Inventor： David Auchere , Laurent Marechal , Yvon Imbs , Laurent Schwarz
IPC: H01L23/48 , H01L23/31 , H01L21/56 , H01L23/66 , H01Q1/22 , H01L21/3105 , H01L21/48 , H01L23/498
CPC classification number: H01Q1/2283 , H01L21/3105 , H01L21/4853 , H01L21/56 , H01L23/3121 , H01L23/3135 , H01L23/315 , H01L23/49838 , H01L23/66 , H01L2223/6677 , H01L2224/16227 , H01L2924/15311 , H01L2924/1815
Abstract: An electronic device includes a support plate having a mounting face and an electrical connection network. An integrated circuit chip is mounted on the mounting face and linked to the electrical connection network. An en encapsulation block embeds the integrated circuit chip. An additional element made of an electrically conductive material is at least partly embedded within the encapsulation block. The additional conductive element has a main portion extending parallel to the support plate and has a secondary portion that is linked electrically to the integrated circuit chip. An opening is formed in the encapsulation block, and the secondary portion extends into that opening to make the electrical link. The additional conductive element may be an antenna.
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19.发明授权公开(公告)号：US09402331B2
公开(公告)日：2016-07-26
申请号：US14512214
申请日：2014-10-10
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor： David Auchere , Yvon Imbs
IPC: H05K1/02 , H05K1/18 , H05K1/11 , H05K7/20 , H05K1/14 , H01L23/473 , H01L23/498 , H01L25/10
CPC classification number: H05K7/20 , H01L23/473 , H01L23/49816 , H01L25/105 , H01L2224/48091 , H01L2224/73204 , H05K1/0201 , H05K1/0203 , H05K1/111 , H05K1/14 , H05K1/181 , H05K2201/064 , H01L2924/00014
Abstract: An electronic device includes a substrate wafer made of an insulating material and having an electrical connection network. An integrated circuit chip is mounted to a top side of the substrate wafer. The substrate wafer contains an internal duct. The duct is formed by a covered trench located in the top side of the substrate wafer. The trench contains a thermally conductive material, for example being a fluid. Openings in the top side of the substrate wafer that are offset from the trench permit the making of an electrical connection between the integrated circuit and the electrical connection network.
Abstract translation: 电子设备包括由绝缘材料制成并具有电连接网络的衬底晶片。 集成电路芯片安装在基板晶片的顶侧。 衬底晶片包含内部管道。 导管由位于基板晶片顶侧的覆盖沟槽形成。 沟槽包含导热材料，例如是流体。 偏离沟槽的衬底晶片顶部的开口允许在集成电路和电连接网络之间形成电连接。
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公开(公告)号：US12170262B2
公开(公告)日：2024-12-17
申请号：US18081884
申请日：2022-12-15
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor： David Auchere , Asma Hajji , Fabien Quercia , Jerome Lopez
IPC: H01L23/00 , H01L23/31 , H01L23/552
Abstract: An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.
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