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公开(公告)号：US10522899B2
公开(公告)日：2019-12-31
申请号：US16017611
申请日：2018-06-25
Inventor： David Auchere , Laurent Marechal , Yvon Imbs , Laurent Schwarz
IPC: H01Q1/22 , H01L23/31 , H01L21/56 , H01L23/66 , H01L21/3105 , H01L21/48 , H01L23/498
Abstract: An electronic device includes a support plate having a mounting face and an electrical connection network. An integrated circuit chip is mounted on the mounting face and linked to the electrical connection network. An encapsulation block embeds the integrated circuit chip. An additional element made of an electrically conductive material is at least partly embedded within the encapsulation block. The additional conductive element has a main portion extending parallel to the support plate and has a secondary portion that is linked electrically to the integrated circuit chip. An opening is formed in the encapsulation block, and the secondary portion extends into that opening to make the electrical link. The additional conductive element may be an antenna.
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公开(公告)号：US09754853B2
公开(公告)日：2017-09-05
申请号：US15050216
申请日：2016-02-22
Inventor： David Auchere , Laurent Marechal , Laurent Schwarz , Yvon Imbs
IPC: H01L23/48 , H01L23/31 , H01L23/64 , H01L23/66 , H01L23/00 , H01Q1/22 , H01L21/48 , H01L21/52 , H01L21/56 , H01L23/13 , H01L23/498
CPC classification number: H01Q1/38 , H01L21/4853 , H01L21/486 , H01L21/4889 , H01L21/52 , H01L21/56 , H01L23/13 , H01L23/3114 , H01L23/3128 , H01L23/315 , H01L23/481 , H01L23/498 , H01L23/49811 , H01L23/49827 , H01L23/645 , H01L23/66 , H01L24/81 , H01L2223/6677 , H01L2224/16227 , H01L2924/15311 , H01L2924/1815 , H01Q1/2283
Abstract: An electronic device includes a support board having a mounting face and an integrated circuit chip mounted on the mounting face. An encapsulation block embeds the integrated circuit chip, the encapsulation block extending above the integrated circuit chip and around the integrated circuit chip on the mounting face of the support board. The encapsulation block includes a front face with a hole passing through the encapsulation block to uncovering at least part of an electrical contact. A layer made of an electrically conducting material fills the hole to make electrical connection to the electrical contact and further extends over the front face of the encapsulation block.
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3.发明申请公开(公告)号：US20170062298A1
公开(公告)日：2017-03-02
申请号：US15050216
申请日：2016-02-22
Inventor： David Auchere , Laurent Marechal , Laurent Schwarz , Yvon Imbs
CPC classification number: H01Q1/38 , H01L21/4853 , H01L21/486 , H01L21/4889 , H01L21/52 , H01L21/56 , H01L23/13 , H01L23/3114 , H01L23/3128 , H01L23/315 , H01L23/481 , H01L23/498 , H01L23/49811 , H01L23/49827 , H01L23/645 , H01L23/66 , H01L24/81 , H01L2223/6677 , H01L2224/16227 , H01L2924/15311 , H01L2924/1815 , H01Q1/2283
Abstract: An electronic device includes a support board having a mounting face and an integrated circuit chip mounted on the mounting face. An encapsulation block embeds the integrated circuit chip, the encapsulation block extending above the integrated circuit chip and around the integrated circuit chip on the mounting face of the support board. The encapsulation block includes a front face with a hole passing through the encapsulation block to uncovering at least part of an electrical contact. A layer made of an electrically conducting material fills the hole to make electrical connection to the electrical contact and further extends over the front face of the encapsulation block.
Abstract translation: 电子设备包括具有安装面的支撑板和安装在安装面上的集成电路芯片。 封装块嵌入集成电路芯片，封装块在集成电路芯片上方延伸，并围绕集成电路芯片在支撑板的安装面上。 封装块包括具有穿过封装块的孔的前表面以露出至少一部分电触点。 由导电材料制成的层填充孔以与电接触电连接并且进一步在封装块的前表面上延伸。
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4.发明申请ELECTRONIC DEVICE WITH INTEGRATED CIRCUIT CHIP PROVIDED WITH AN EXTERNAL ELECTRICAL CONNECTION NETWORK 有权具有外部电气连接网络的集成电路芯片的电子设备公开(公告)号：US20150016081A1
公开(公告)日：2015-01-15
申请号：US14330176
申请日：2014-07-14
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor： David Auchere , Laurent Marechal
CPC classification number: H05K3/42 , H01L23/49811 , H01L23/49822 , H01L23/49827 , H01L23/645 , H01L2224/16225 , H01L2924/15311 , Y10T29/4913
Abstract: An electronic device may include a substrate, and an integrated circuit over the substrate. The substrate may be provided with an electrical connection network including electrical links for linking the integrated circuit to another electrical device. Some of the electrical links may include an impedance-compensating inductor.
Abstract translation: 电子设备可以包括衬底，以及在衬底上的集成电路。 衬底可以设置有包括用于将集成电路连接到另一电气设备的电连接的电连接网络。 一些电连接可以包括阻抗补偿电感器。
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公开(公告)号：US10292259B2
公开(公告)日：2019-05-14
申请号：US15142213
申请日：2016-04-29
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor： Laurent Marechal , Richard Rembert , Jerome Lopez
Abstract: An electronic device disclosed herein includes a first conductor layer, a first nonconducting layer, and a second conductor layer in a stacked arrangement. A signal carrying conductive via is formed in the first nonconducting layer and extends between the first conductor layer and the second conductor layer. A shielding conductive via is formed in the first nonconducting layer, is not electrically coupled to the signal carrying conductive via, and substantially completely surrounds the signal carrying conductive via in spaced apart relation thereto.
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Patent Agency Ranking
6.发明申请公开(公告)号：US20180309187A1
公开(公告)日：2018-10-25
申请号：US16017611
申请日：2018-06-25
Inventor： David Auchere , Laurent Marechal , Yvon Imbs , Laurent Schwarz
IPC: H01Q1/22 , H01L23/31 , H01L21/56 , H01L23/498 , H01L21/48 , H01L23/66 , H01L21/3105
Abstract: An electronic device includes a support plate having a mounting face and an electrical connection network. An integrated circuit chip is mounted on the mounting face and linked to the electrical connection network. An encapsulation block embeds the integrated circuit chip. An additional element made of an electrically conductive material is at least partly embedded within the encapsulation block. The additional conductive element has a main portion extending parallel to the support plate and has a secondary portion that is linked electrically to the integrated circuit chip. An opening is formed in the encapsulation block, and the secondary portion extends into that opening to make the electrical link. The additional conductive element may be an antenna.
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7.发明申请SEMICONDUCTOR DEVICE COMPRISING A PASSIVE COMPONENT OF CAPACITORS AND PROCESS FOR FABRICATION 审中-公开包含电容器被动元件和制造工艺的半导体器件公开(公告)号：US20140206154A1
公开(公告)日：2014-07-24
申请号：US14221921
申请日：2014-03-21
Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS
Inventor： Romain Coffy , Yvon Imbs , Laurent Marechal
IPC: H01L21/56
CPC classification number: H01L21/56 , H01L21/568 , H01L23/5383 , H01L23/5389 , H01L23/642 , H01L24/18 , H01L24/19 , H01L24/82 , H01L24/96 , H01L24/97 , H01L25/16 , H01L2224/04105 , H01L2224/12105 , H01L2224/18 , H01L2224/24195 , H01L2224/73267 , H01L2224/9222 , H01L2224/97 , H01L2924/01033 , H01L2924/01058 , H01L2924/14 , H01L2924/15311 , H01L2924/18162 , H01L2924/19105 , H05K1/185 , H05K2201/10015 , H05K2201/10674 , H05K2203/1469 , H01L2224/82 , H01L2924/00
Abstract: A semiconductor device includes a wafer having a frontside and a backside. The wafer is formed from at least one integrated circuit chip having an electrical connection frontside co-planar with the wafer frontside and a backside co-planar with the wafer backside. A passive component including at least one conductive plate and a dielectric plate is positioned adjacent the integrated circuit chip. An encapsulation block embeds the integrated circuit chip and the passive component, the block having a frontside co-planar with the wafer frontside and a backside co-planar with the wafer backside. An electrical connection is made between the electrical connection frontside and the passive component. That electrical connection includes connection lines placed on the wafer frontside and wafer backside. The electrical connection further includes at least one via passing through the encapsulation block.
Abstract translation: 半导体器件包括具有前侧和后侧的晶片。 晶片由至少一个集成电路芯片形成，该集成电路芯片具有与晶片前侧共面的电连接，以及与晶片背面共面的背面。 包括至少一个导电板和电介质板的无源部件位于集成电路芯片附近。 封装块嵌入集成电路芯片和无源部件，该块具有与晶片前侧共面的前侧和与晶片背面共面的背面。 在电连接前端和被动部件之间进行电连接。 该电连接包括放置在晶片正面和晶片背面上的连接线。 电连接还包括至少一个通过封装块的通孔。
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公开(公告)号：US10257943B2
公开(公告)日：2019-04-09
申请号：US15926583
申请日：2018-03-20
Applicant: STMicroelectronics (Grenoble 2) SAS
Inventor： David Auchere , Laurent Marechal
IPC: H05K1/18 , H05K3/42 , H01L23/64 , H01L23/498
Abstract: An electronic device includes a substrate having an external surface, and an integrated circuit over the external surface of the substrate. The substrate is provided with an electrical connection network including electrical links for linking the integrated circuit to another electrical device. Some of the electrical links include an impedance-compensating inductor on an external surface of the substrate.
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9.发明申请公开(公告)号：US20170338543A1
公开(公告)日：2017-11-23
申请号：US15668816
申请日：2017-08-04
Inventor： David Auchere , Laurent Marechal , Yvon Imbs , Laurent Schwarz
IPC: H01Q1/22 , H01L21/56 , H01L23/498 , H01L23/31 , H01L23/66
CPC classification number: H01Q1/2283 , H01L21/3105 , H01L21/4853 , H01L21/56 , H01L23/3121 , H01L23/3135 , H01L23/315 , H01L23/49838 , H01L23/66 , H01L2223/6677 , H01L2224/16227 , H01L2924/15311 , H01L2924/1815
Abstract: An electronic device includes a support plate having a mounting face and an electrical connection network. An integrated circuit chip is mounted on the mounting face and linked to the electrical connection network. An en encapsulation block embeds the integrated circuit chip. An additional element made of an electrically conductive material is at least partly embedded within the encapsulation block. The additional conductive element has a main portion extending parallel to the support plate and has a secondary portion that is linked electrically to the integrated circuit chip. An opening is formed in the encapsulation block, and the secondary portion extends into that opening to make the electrical link. The additional conductive element may be an antenna.
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公开(公告)号：US09748159B2
公开(公告)日：2017-08-29
申请号：US15050289
申请日：2016-02-22
Inventor： Yvon Imbs , Laurent Schwarz , David Auchere , Laurent Marechal
IPC: H01L23/48 , H01L23/31 , H01L23/498 , H01L23/00 , H01L23/66 , H01L21/3105 , H01L21/56 , H01L21/768
CPC classification number: H01L23/3121 , H01L21/3105 , H01L21/56 , H01L21/76802 , H01L21/76877 , H01L23/3135 , H01L23/481 , H01L23/49811 , H01L23/49838 , H01L23/66 , H01L24/48 , H01L24/85 , H01L2223/6611 , H01L2223/6677 , H01L2224/16225 , H01L2224/45124 , H01L2224/45147 , H01L2224/48227 , H01L2224/48235 , H01L2224/73257 , H01L2224/8538 , H01L2924/00012 , H01L2924/00014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19107 , H01L2224/05599 , H01L2224/85399
Abstract: An electronic device includes a supporting substrate having a front mounting face and an electrical connection network. An integrated circuit chip is mounted to the mounting face and is electrically connected to the electrical connection network. A primary encapsulation block embeds the integrated circuit chip and extends above and around the integrated circuit chip on the mounting face of the supporting substrate. An opening is provided in the primary encapsulation block to at least partially uncover an electrical contact. An additional wire made from an electrically conductive material has an end that is electrically connected to the electrical contact. An additional encapsulation block above the primary encapsulation block embeds the additional wire.
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