公开(公告)号：US20160204125A1

公开(公告)日：2016-07-14

申请号：US14799995

申请日：2015-07-15

Applicant: Samsung Display Co., Ltd.

Inventor： Yung Bin CHUNG ,  Chul-Hyun BAEK ,  Eun Jeong CHO ,  Jung Yun JO

IPC: H01L27/12 ,  H01L21/02 ,  H01L29/417 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/124 ,  H01L21/0217 ,  H01L27/1248 ,  H01L27/1259 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78606 ,  H01L29/78669 ,  H01L29/78678

Abstract: A thin-film transistor array panel includes an insulation substrate, a gate line disposed on the insulation substrate, a gate insulating layer disposed on the gate line, a semiconductor layer disposed on the gate insulating layer, a data line disposed on the semiconductor layer and including a source electrode, a drain electrode disposed on the semiconductor layer and facing the source electrode, a first electrode disposed on the gate insulating layer, a first passivation layer disposed on the first electrode and including silicon nitride, a second passivation layer disposed on the first passivation and including silicon nitride, and a second electrode disposed on the passivation layer, in which a first ratio of nitrogen-hydrogen bonds to silicon-hydrogen bonds in the first passivation layer is different from a second ratio of nitrogen-hydrogen bonds to silicon-hydrogen bonds in the second passivation layer.

Abstract translation: 薄膜晶体管阵列面板包括绝缘基板，设置在绝缘基板上的栅极线，设置在栅极线上的栅极绝缘层，设置在栅极绝缘层上的半导体层，设置在半导体层上的数据线，以及 包括源电极，设置在半导体层上并面对源电极的漏电极，设置在栅绝缘层上的第一电极，设置在第一电极上并包括氮化硅的第一钝化层，设置在第一电极上的第二钝化层 第一钝化并且包括氮化硅，以及设置在钝化层上的第二电极，其中第一钝化层中氮 - 氢键与硅 - 氢键的第一比例不同于氮 - 氢键与硅的第二比率 在第二钝化层中的氢键。

公开(公告)号：US20230197853A1

公开(公告)日：2023-06-22

申请号：US18109301

申请日：2023-02-14

Applicant: Samsung Display Co., LTD.

Inventor： Ji Hye HAN ,  Jung Yun JO ,  Chul Min BAE

IPC: H01L29/786 ,  H01L27/12 ,  H10K59/121

CPC classification number: H01L29/78606 ,  H01L27/1225 ,  H10K59/1213

Abstract: A display device includes a buffer layer disposed on a substrate and comprising a first buffer film, and a second buffer film, wherein the first buffer film and the second buffer film are sequentially stacked in a thickness direction of the display device; a semiconductor pattern disposed on the buffer layer; a gate insulating layer disposed on the semiconductor pattern; and a gate electrode disposed on the gate insulating layer, wherein the first buffer film and the second buffer film comprise a same material, and a density of the first buffer film is greater than a density of the second buffer film.

公开(公告)号：US20180175178A1

公开(公告)日：2018-06-21

申请号：US15895464

申请日：2018-02-13

Applicant: Samsung Display Co., Ltd.

Inventor： Jung Yun JO ,  Su Bin BAE ,  Ki Seong SEO

IPC: H01L29/66 ,  H01L29/786 ,  H01L29/45 ,  H01L29/417 ,  H01L21/4763 ,  H01L21/02

CPC classification number: H01L29/66969 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/47635 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/78606 ,  H01L29/7869

Abstract: There is provided a method of manufacturing an oxide thin film transistor (TFT). The method includes forming a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an oxide semiconductor layer including a channel layer on the gate insulating layer, forming a source electrode and a drain electrode separated from each other on the oxide semiconductor layer, first plasma processing the substrate on which the source electrode and the drain electrode are formed at a carbon (C) atmosphere, secondly plasma processing the substrate at a nitrogen oxide atmosphere, and sequentially forming a first protective layer and a second protective layer on the substrate.

公开(公告)号：US20180068931A1

公开(公告)日：2018-03-08

申请号：US15685640

申请日：2017-08-24

Applicant: Samsung Display Co., Ltd.

Inventor： Seung Hwa HA ,  Jung Yun JO ,  Byoung Yong KIM ,  Jeong Do YANG ,  Jeong Ho HWANG

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L23/4952 ,  H01L23/49816 ,  H01L24/10 ,  H01L24/12 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/13019

Abstract: A semiconductor chip includes: a base substrate; a conductive pad on one surface of the base substrate; an insulating layer on the one surface of the base substrate and having an opening exposing a portion of the conductive pad; and a bump on the exposed portion of the conductive pad and on the insulating layer around the opening. The bump includes a plurality of concave portions corresponding to the opening and is arranged in a longitudinal direction of the bump.

公开(公告)号：US20180063953A1

公开(公告)日：2018-03-01

申请号：US15677395

申请日：2017-08-15

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jung Yun JO ,  Jeong Do YANG

IPC: H05K1/11 ,  H05K3/18 ,  H05K3/28 ,  H05K3/40

CPC classification number: H05K1/111 ,  H05K1/0313 ,  H05K1/09 ,  H05K3/188 ,  H05K3/28 ,  H05K3/36 ,  H05K3/4007 ,  H05K2201/0314 ,  H05K2201/0367 ,  H05K2201/09045 ,  H05K2201/0939 ,  H05K2201/10128 ,  H05K2201/10136 ,  H05K2203/0723

Abstract: A circuit board, a display device including the same, and a method of manufacturing a circuit board are provided. A circuit board includes a base substrate, a wiring line provided on the base substrate, a passivation layer provided on the wiring line, an elastic bump provided on the passivation layer, and a conductive layer provided on the elastic bump. The passivation layer includes a first opening and a second opening that expose a partial region of the wiring line, and the second opening is arranged in a region adjacent to the first opening.

公开(公告)号：US20170170209A1

公开(公告)日：2017-06-15

申请号：US15445650

申请日：2017-02-28

Applicant: Samsung Display Co., Ltd.

Inventor： Jung Yun JO ,  Ki Seong SEO ,  Eun Jeong CHO

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1222 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02667 ,  H01L21/02686 ,  H01L29/66757 ,  H01L29/78675

Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes: an insulating substrate; a polycrystal semiconductor layer formed on the insulating substrate; a buffer layer formed below the polycrystal semiconductor layer and containing fluorine; a gate electrode overlapping the polycrystal semiconductor layer; a source electrode and a drain electrode overlapping the polycrystal semiconductor layer and separated from each other; and a pixel electrode electrically connected to the drain electrode.

公开(公告)号：US20240065030A1

公开(公告)日：2024-02-22

申请号：US18501590

申请日：2023-11-03

Applicant: Samsung Display Co., LTD.

Inventor： Jung Yun JO ,  Ji Hye HAN

IPC: H10K59/121 ,  H10K71/00

CPC classification number: H10K59/121 ,  H10K71/00

Abstract: A display device includes a substrate including pixels; a buffer layer disposed on the substrate; an etch stopper layer disposed between the substrate and the buffer layer; and at least one penetrating-hole penetrating the substrate, the buffer layer, and the etch stopper layer, wherein the etch stopper layer includes amorphous carbon.

公开(公告)号：US20220285428A1

公开(公告)日：2022-09-08

申请号：US17526009

申请日：2021-11-15

Applicant: Samsung Display Co., Ltd.

Inventor： Jung Yun JO ,  Kwang Hyun KIM

IPC: H01L27/15 ,  H01L33/00 ,  H01L33/50

Abstract: Provided is a display device. The display device comprises a first substrate, a barrier layer disposed on the first substrate and having amorphous carbon, a first pad part disposed on the barrier layer, a second substrate disposed on the first pad part, a display layer disposed on the second substrate, and a second pad part disposed on a bottom surface of the first substrate and inserted into a first contact hole formed in the first substrate and the barrier layer.

公开(公告)号：US20210399177A1

公开(公告)日：2021-12-23

申请号：US17188783

申请日：2021-03-01

Applicant: Samsung Display Co., Ltd.

Inventor： Su Bin BAE ,  Yun Jong YEO ,  Jung Yun JO

IPC: H01L33/38 ,  H01L33/40 ,  H01L33/42 ,  H01L33/50 ,  H01L33/62

Abstract: A display device includes a substrate; a first circuit part and a second circuit part on the substrate and spaced from each other in a first direction; and an emission part between the first circuit part and the second circuit part, the emission part being located between the first circuit part and the second circuit part in a direction parallel to the substrate, wherein the first circuit part includes a first electrode extending to the emission part, wherein the second circuit part includes a second electrode extending to the emission part, and wherein the emission part includes a light emitting element located between the first electrode and the second electrode.

公开(公告)号：US20180063970A1

公开(公告)日：2018-03-01

申请号：US15676332

申请日：2017-08-14

Applicant: Samsung Display Co., Ltd.

Inventor： Seung-Hwa HA ,  Jeong Do YANG ,  Jung Yun JO ,  Jeong Ho HWANG

IPC: H05K5/00 ,  G01R31/28 ,  H05K1/18 ,  H05K1/11

CPC classification number: H05K5/0017 ,  G01R31/2818 ,  G02F1/1309 ,  G02F1/13452 ,  G02F1/13458 ,  H05K1/0268 ,  H05K1/11 ,  H05K1/111 ,  H05K1/118 ,  H05K1/181 ,  H05K3/361 ,  H05K2201/09481 ,  H05K2201/09709 ,  H05K2201/10128 ,  H05K2201/10954

Abstract: A display device includes a display substrate and a printed circuit board (PCB). The display substrate includes a display area to display an image, and includes a pad area outside the display area. The PCB is bonded to a surface of the display substrate in the pad area. The PCB includes a base film, first terminal wires positioned at the base film, second terminal wires positioned at the base film, first sub-pad terminals electrically connected to the first terminal wires through contact holes formed in the base film, and second sub-pad terminals directly and electrically connected to the second terminal wires without contact holes. The first sub-pad terminals and the second sub-pad terminals are alternately arranged. The first terminal wires and the second terminal wires are, in a view normal to the surface, spaced apart from one another.