公开(公告)号：US09899081B2

公开(公告)日：2018-02-20

申请号：US15450831

申请日：2017-03-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Suk-Soo Pyo

IPC: G11C11/00 ,  G11C13/00

CPC classification number: G11C13/004 ,  G11C11/1655 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1677 ,  G11C11/1693 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0026 ,  G11C13/0028 ,  G11C13/0061 ,  G11C13/0064 ,  G11C13/0069 ,  G11C13/0097 ,  G11C2013/0045 ,  G11C2213/79 ,  G11C2213/82

Abstract: A memory device includes a memory cell array, a read circuit, and a control logic. The memory cell array includes a memory cell having a resistance level that varies depending on data stored therein. The memory cell is connected to a first signal line and a second signal line. The read circuit is configured to read the data. The control logic is configured to precharge a sensing node, connected to the first signal line through a first switching device, and a first node, connected to the second signal line through a second switching device, to different voltage levels during a first period, and develop a voltage of the sensing node based on the resistance level of the memory cell during a second period.

公开(公告)号：US12051456B2

公开(公告)日：2024-07-30

申请号：US17695941

申请日：2022-03-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gyuseong Kang ,  Suk-Soo Pyo

IPC: G11C11/16

CPC classification number: G11C11/1675 ,  G11C11/1655 ,  G11C11/1657 ,  G11C11/1697 ,  G11C11/161

Abstract: A memory device which includes a control logic circuit that generates a write enable signal based on a write command, a first memory cell connected with a first word line and a first column line, a first write circuit that receives first write data to be stored in the first memory cell through a first write input/output line and applies a write voltage to a first data line based on the first write data in response to the write enable signal, and a first column multiplexer circuit that selects the first column line and connects the first column line with the first data line in response to a first column select signal, such that the write voltage is applied to the first memory cell. The first write circuit applies the write voltage to a bulk port of the first column multiplexer circuit in response to the write enable signal.

公开(公告)号：US11727965B2

公开(公告)日：2023-08-15

申请号：US17507216

申请日：2021-10-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eunji Lee ,  Suk-Soo Pyo

IPC: G11C8/08 ,  G11C7/10

CPC classification number: G11C7/1039 ,  G11C7/109 ,  G11C7/1048 ,  G11C7/1063 ,  G11C7/1066 ,  G11C7/1093 ,  G11C8/08

Abstract: A nonvolatile memory device including a memory cell array including a plurality of nonvolatile memory cells and a row decoder connected with the memory cell array through wordlines may be provided. The row decoder may be configured to precharge a first wordline corresponding to a first row address from among the wordlines, in response to receiving the first row address together with a first command, and maintain a precharge state of the first wordline, in response to receiving a second row address being identical to the first row address together with a second command following the first command.

公开(公告)号：US20230142636A1

公开(公告)日：2023-05-11

申请号：US18050489

申请日：2022-10-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Kyu Jang ,  Suk-Soo Pyo

IPC: H03K17/0812 ,  G11C16/30

CPC classification number: H03K17/08122 ,  G11C16/30

Abstract: A power switch circuit and non-volatile memory device including the same are provided. The power switch circuit includes a multi-voltage providing circuit configured to receive a first voltage and a second voltage greater than the first voltage, output a third voltage corresponding to the first voltage to a first output terminal, and output a fourth voltage corresponding to the second voltage to a second output terminal. The power switch circuit also includes a leakage current prevention circuit configured to cut off a leakage current flowing through the multi-voltage providing circuit. The multi-voltage providing circuit includes a first inverter which is driven using the second voltage. The leakage current prevention circuit is configured to cut off the leakage current flowing through the first inverter in response to both the first voltage and the second voltage being provided to the multi-voltage providing circuit.

公开(公告)号：US11139012B2

公开(公告)日：2021-10-05

申请号：US16814678

申请日：2020-03-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Suk-Soo Pyo ,  Hyun Taek Jung

IPC: G11C11/16 ,  H01L43/02 ,  H01L27/22

Abstract: A nonvolatile memory device includes a memory cell comprising a first variable resistor having one end connected to a first node, and the other end connected to a second node through a cell transistor; and a reference cell comprising a second variable resistor having one end connected to a third node, and the other end connected to a fourth node through a reference cell transistor, wherein gates of the cell transistor and the reference cell transistor are connected to a word line. Directions of a first read current flowing in the memory cell and a direction of a second read current flowing in the reference cell are opposite to each other.

公开(公告)号：US11112997B2

公开(公告)日：2021-09-07

申请号：US16394506

申请日：2019-04-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taehyun Kim ,  Chankyung Kim ,  Sang-won Shim ,  Suk-Soo Pyo

IPC: G06F3/06 ,  G06F11/10 ,  G11C29/52

Abstract: An operating method of a storage device which includes a first nonvolatile memory device and a second nonvolatile memory device includes detecting sudden power-off, suspending an operation being performed in the first nonvolatile memory device, in response to the detected sudden power-off, writing suspension information about the suspended operation into the second nonvolatile memory device, and performing a block management operation on the first nonvolatile memory device based on the suspension information written into the second nonvolatile memory device, in power-up after the sudden power-off.

公开(公告)号：US10600466B2

公开(公告)日：2020-03-24

申请号：US16450035

申请日：2019-06-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Suk-Soo Pyo ,  Hyun-Taek Jung ,  Tae-Joong Song

IPC: G11C11/00 ,  G11C11/16 ,  G11C8/08 ,  G11C13/00 ,  G11C11/56

Abstract: A resistive memory device includes: a voltage generator generating a write word line voltage according to activation of a write enable signal; a switch circuit outputting one of the write word line voltage and a read word line voltage in response to the write enable signal as an output voltage; a word line power path connected to the switch circuit to receive the output voltage; and a word line driver driving a word line according to a voltage applied to the word line power path, wherein a write command starts to be received after a certain delay following the activation of the write enable signal, and a write operation is performed within an activation period of the write enable signal in response to the received write command.

公开(公告)号：US09620191B2

公开(公告)日：2017-04-11

申请号：US15068580

申请日：2016-03-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Suk-Soo Pyo

IPC: G11C11/16 ,  G11C11/15

CPC classification number: G11C11/1673 ,  G11C5/04 ,  G11C11/15 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1675 ,  G11C29/023 ,  G11C29/028

Abstract: A memory device may include a data region, a reference region, a resistor circuit, and a sense amplifier. The data region may include a plurality of data memory cells coupled between a first bit line and a first source line. The data region may provide a data voltage corresponding to data stored in each of the data memory cells. The reference region may include a plurality of reference memory cells coupled between a reference bit line and a reference source line. The reference region may provide a reference voltage. The resistor circuit may include one or more resistors, and is coupled between the reference source line and a power source line. The sense amplifier may provide an output voltage by comparing the data voltage and the reference voltage. The power source line may be either a ground voltage or a negative voltage.