公开(公告)号：US10255838B2

公开(公告)日：2019-04-09

申请号：US15654802

申请日：2017-07-20

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Seiichi Yoneda ,  Yuki Okamoto ,  Yoshiyuki Kurokawa

IPC: G09G3/20 ,  G09G3/36 ,  G09G3/34 ,  G09G3/32 ,  G09G3/3225

Abstract: Provided is a semiconductor device in which power consumption and rewrite time needed for changing the parameter for color adjustment, dimming, or the like are reduced. One embodiment of a semiconductor device of the present invention includes an image processing portion including a plurality of functional circuits configured to correct image data, a plurality of scan chains corresponding to the plurality of functional circuits, and a controller controlling operations of the plurality of scan chains. During a state in which the controller controls the scan chains so that one or more scan chains chosen from the plurality of scan chains are driven and the scan chains except for the one or more scan chains are not driven, a parameter stored in one or more functional circuits connected to the one or more scan chains is rewritten.

公开(公告)号：US10163967B2

公开(公告)日：2018-12-25

申请号：US15178801

申请日：2016-06-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuki Okamoto ,  Seiichi Yoneda ,  Yoshiyuki Kurokawa

IPC: H04N5/378 ,  H01L27/146 ,  H01L31/0272 ,  H01L31/032 ,  H04N5/14 ,  H04N5/335 ,  H04N5/3745

Abstract: An imaging device with low power consumption. The imaging device includes a plurality of pixels arranged in a matrix, a first circuit, a second circuit, a third circuit, and a fourth circuit. The first circuit has a function of converting an analog signal into a digital signal. The second circuit has a function of detecting a difference between image data of a first frame and image data of a second frame. The third circuit has a function of controlling the frequency of a clock signal. The fourth circuit has a function of generating clock signals of a plurality of frequencies.

公开(公告)号：US10038402B2

公开(公告)日：2018-07-31

申请号：US15298305

申请日：2016-10-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuki Okamoto ,  Yoshiyuki Kurokawa

IPC: H03B5/06 ,  H03K3/03 ,  H01L27/092 ,  H01L29/786

CPC classification number: H03B5/06 ,  H01L27/092 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/7869 ,  H03K3/014 ,  H03K3/0315

Abstract: An oscillator capable of quick startup is provided. A transistor is provided between an output terminal of a certain stage inverter and an input terminal of the following stage inverter included in the voltage controlled oscillator. With the use of the on resistance of the transistor, the oscillation frequency of the clock signal is controlled. While supply of the power supply voltage is stopped, a signal that is input to the input terminal of the inverter just before supply of the power supply voltage is stopped is stored by turning off the transistor. This operation makes it possible to immediately output a clock signal that has the same frequency as that before supply of the power supply voltage is stopped at the time when the power supply voltage is supplied again.

公开(公告)号：US09595955B2

公开(公告)日：2017-03-14

申请号：US14814609

申请日：2015-07-31

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yoshiyuki Kurokawa ,  Yuki Okamoto

IPC: G11C5/14 ,  H03K17/687 ,  H03L7/099 ,  H03K3/03 ,  H03L7/093

CPC classification number: H03K17/687 ,  G11C7/12 ,  H01L27/1225 ,  H03B5/00 ,  H03K3/0315 ,  H03L7/093 ,  H03L7/0995 ,  H03L2207/06

Abstract: To generate an analog current without restriction by a power supply voltage. A semiconductor device includes a first node, a second node, a first- to an n-th-stage power storage element (n is an integer greater than or equal to 2), and a first- to an n-th-stage switch. The capacities of the first- to the n-th-stage power storage element are different from one another. The first- to the n-th-stage power storage element are electrically connected in parallel between the first node and the second node. A first terminal of a k-th stage power storage element (k is an integer greater than or equal to 1 and less than or equal to n) is electrically connected to the first input node via a k-th stage switch. The on/off states of the first- to the n-th-stage switch are controlled by a first to an n-th signal.

Abstract translation: 产生模拟电流而不受电源电压的限制。 半导体器件包括第一节点，第二节点，第一至第n阶段功率存储元件（n是大于或等于2的整数）以及第一至第n阶段开关 。 第一级到第n级蓄电元件的容量彼此不同。 第一至第n级蓄电元件在第一节点和第二节点之间并联电连接。 第k级功率存储元件的第一端子（k是大于或等于1且小于等于n的整数）通过第k级开关电连接到第一输入节点。 第一至第n级开关的开/关状态由第一至第n信号控制。

公开(公告)号：US09576995B2

公开(公告)日：2017-02-21

申请号：US14837791

申请日：2015-08-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hiroki Inoue ,  Yoshiyuki Kurokawa ,  Takayuki Ikeda ,  Yuki Okamoto

IPC: H01L29/10 ,  H01L27/146 ,  H01L29/786 ,  H01L29/24

CPC classification number: H01L27/14612 ,  H01L27/14614 ,  H01L27/14689 ,  H01L27/14692 ,  H01L29/24 ,  H01L29/7869

Abstract: An imaging device capable of obtaining high-quality imaging data is provided. The imaging device includes a first circuit, a second circuit and a third circuit. The first circuit includes a photoelectric conversion element, a plurality of transistors including an amplifier transistor, and a plurality of capacitors. The second circuit includes a transistor. The third circuit includes a resistor and a transistor for controlling a current flowing in the resistor. The output signal of the imaging device is determined in accordance with the current flowing in the resistor. Variations in electrical characteristics of the amplifier transistor included in the first circuit can be compensated.

Abstract translation: 提供能够获得高质量成像数据的成像装置。 成像装置包括第一电路，第二电路和第三电路。 第一电路包括光电转换元件，包括放大器晶体管的多个晶体管和多个电容器。 第二电路包括晶体管。 第三电路包括用于控制在电阻器中流动的电流的电阻器和晶体管。 成像装置的输出信号根据电阻中流过的电流来确定。 可以补偿包括在第一电路中的放大器晶体管的电特性的变化。

公开(公告)号：US09479145B2

公开(公告)日：2016-10-25

申请号：US14636529

申请日：2015-03-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuki Okamoto ,  Yoshiyuki Kurokawa

IPC: H03B1/00 ,  H03K3/00 ,  H03K3/356 ,  H03K17/0412 ,  H03K17/687 ,  H01L29/786 ,  H03K3/03 ,  H03K5/13 ,  H03L7/099

CPC classification number: H03L7/0995 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/7869 ,  H01L29/78693 ,  H03K3/0315 ,  H03K3/356086 ,  H03K5/131 ,  H03K5/26 ,  H03K17/04123 ,  H03K17/687 ,  H03L7/093 ,  H03L7/099

Abstract: A novel PLL is provided. An oscillator circuit includes first to n-th inverters, and first and second circuits. A first terminal of each of the first and second circuits is electrically connected to an output terminal of the i-th inverter. A second terminal of each of the first and second circuits is electrically connected to an input terminal of the (i+1)-th inverter. The first circuit has functions of storing first data, switching between electrically disconnecting the first terminal and the second terminal from each other and setting a resistance between the first terminal and the second terminal to a value based on the first data. The second circuit has functions of storing second data, switching between electrically disconnecting the first terminal and the second terminal from each other and setting a resistance between the first terminal and the second terminal to a value based on the second data.

Abstract translation: 提供了一种新的PLL。 振荡电路包括第一至第n反相器以及第一和第二电路。 第一和第二电路中的每一个的第一端子电连接到第i个逆变器的输出端子。 第一和第二电路中的每一个的第二端子电连接到第（i + 1）个逆变器的输入端子。 第一电路具有存储第一数据的功能，在第一终端与第二终端电断开之间进行切换，并且将第一终端与第二终端之间的电阻设置为基于第一数据的值。 第二电路具有存储第二数据的功能，在第一端子和第二端子彼此电断开之间切换，并且将第一端子和第二端子之间的电阻设置为基于第二数据的值。

公开(公告)号：US12015012B2

公开(公告)日：2024-06-18

申请号：US17613605

申请日：2020-05-25

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tatsuya Onuki ,  Takanori Matsuzaki ,  Yuki Okamoto ,  Shunpei Yamazaki

IPC: H01L27/108 ,  G11C5/06 ,  H01L25/065 ,  H01L29/786 ,  H10B12/00 ,  H01L23/00

CPC classification number: H01L25/0657 ,  G11C5/063 ,  H01L29/78693 ,  H10B12/315 ,  H10B12/50 ,  H01L24/16 ,  H01L25/0655 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/1431 ,  H01L2924/1436

Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a silicon substrate including a first circuit, a first element layer including a second circuit, and a second element layer including a third circuit. The first circuit includes a first transistor. The second circuit includes a second transistor. The third circuit includes a memory cell. The memory cell includes a third transistor and a capacitor. The first element layer and the second element layer constitute a stacked block stacked and provided in a direction perpendicular or substantially perpendicular to a surface of the silicon substrate. A plurality of stacked blocks are stacked and provided in the direction perpendicular or substantially perpendicular to the surface of the silicon substrate. Each of the plurality of stacked blocks includes a first wiring provided in the direction perpendicular or substantially perpendicular to the surface of the silicon substrate. The plurality of stacked blocks are electrically connected to each other through the wiring.

公开(公告)号：US11867503B2

公开(公告)日：2024-01-09

申请号：US17263170

申请日：2019-07-24

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Takayuki Ikeda ,  Ryota Tajima ,  Yuki Okamoto ,  Shunpei Yamazaki

IPC: G01B7/00 ,  G01B7/16 ,  H01L27/12 ,  H01L29/423 ,  H01L29/786 ,  H03K5/24 ,  H03K21/08 ,  H01M10/48 ,  H10B99/00

CPC classification number: G01B7/18 ,  H01L27/124 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/1255 ,  H01L29/42384 ,  H01L29/7869 ,  H01M10/48 ,  H03K5/24 ,  H03K21/08 ,  H10B99/00

Abstract: An anomaly detection system that outputs an anomaly detection signal before a safety valve of a secondary battery is opened is provided. The anomaly detection system includes a strain sensor, a memory, and a comparator. The memory has a function of retaining an analog potential, and the comparator has a function of comparing a potential output by the strain sensor and the analog potential retained by the memory. The strain sensor is attached to the secondary battery before use, and a predetermined potential is retained in the memory. When a housing of the secondary battery expands while the secondary battery is used, and the potential output by the strain sensor becomes higher (or lower) than the predetermined potential, an anomaly detection signal is output.

公开(公告)号：US11362647B2

公开(公告)日：2022-06-14

申请号：US17312420

申请日：2019-12-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuki Okamoto ,  Kei Takahashi

IPC: H03K5/08 ,  H03K3/0233 ,  H01M10/48 ,  H02J7/02 ,  H03K17/22 ,  H03K19/0185 ,  G06G7/186 ,  H03K19/20

Abstract: To provide a hysteresis comparator having a small circuit area and low power consumption. The hysteresis comparator includes a comparator, a switch, a first capacitor, a second capacitor, and a logic circuit. A first terminal of the switch is electrically connected to one of a pair of conductive regions of the first capacitor, one of a pair of conductive regions of the second capacitor, and a first input terminal of the comparator. An output terminal of the comparator is electrically connected to an input terminal of the logic circuit. An output terminal of the logic circuit is electrically connected to the other of the pair of conductive regions of the second capacitor. The logic circuit has a function of generating an inverted signal of a signal input to the input terminal of the logic circuit and outputting the inverted signal to the output terminal of the logic circuit. A reference potential is input to the first input terminal of the comparator and the reference potential is held by the switch. Due to change in the potential of the output terminal of the comparator, the reference potential is changed by capacitive coupling of the second capacitor.

公开(公告)号：US11204657B2

公开(公告)日：2021-12-21

申请号：US15685792

申请日：2017-08-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takayuki Ikeda ,  Yuki Okamoto ,  Kei Takahashi ,  Shunpei Yamazaki

IPC: G06F3/041 ,  G06F1/3234 ,  G06F3/0488 ,  G06F1/3203 ,  G02F1/1333

Abstract: A display device with excellent visibility can be provided. The display device includes a display region displayed by a light-emitting element. In the display region, a point touched by a user is a first point, a point which has been touched by the user prior to the first point is a second point, a vector that starts at the first point and ends at the second point is a first vector, a vector obtained by multiplying the first vector by k (k is a real number) is a second vector, and a point that is the second vector away from the first point is a third point, the display region includes a first region and a second region obtained by excluding the first region from the display region, The first region includes a first circle and a second circle, the center of the first circle is the first point, and the center of the second circle is the third point. The luminance in the first region is higher than the luminance in the second region.