公开(公告)号：US20140041913A1

公开(公告)日：2014-02-13

申请号：US13958887

申请日：2013-08-05

Applicant: TDK CORPORATION

Inventor： Miyuki YANAGIDA ,  Hisayuki ABE

IPC: H05K1/18

CPC classification number: H05K1/18 ,  H01G2/065 ,  H01G4/232 ,  H01G4/30 ,  H05K3/3442 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613

Abstract: One aspect of an electronic circuit module component is an electronic circuit module component formed by joining a board and an electronic component comprising an element body having a mounting surface and a plurality of side faces to each other with solder; the electronic component comprising a first terminal electrode formed on the mounting surface and one of the plurality of side faces, a second terminal electrode formed on the mounting surface and another side face in the plurality of side faces, and an oxide film covering at least a part of surfaces of side face parts of the first and second terminal electrodes formed on the side faces; wherein mounting parts of the first and second terminal electrodes formed on the mounting surface are joined to the board with the solder.

Abstract translation: 电子电路模块部件的一个方面是电子电路模块部件，该电子电路模块部件通过将焊料与包含具有安装面的元件体和多个侧面的电子部件接合而形成， 所述电子部件包括形成在所述安装面和所述多个侧面中的一个侧面上的第一端子电极，形成在所述安装面上的第二端子电极和所述多个侧面的另一侧面，以及覆盖至少一个 形成在侧面上的第一和第二端子电极的侧面部分的表面的一部分; 其中形成在安装表面上的第一和第二端子电极的安装部分与焊料接合到板上。

公开(公告)号：US20200381266A1

公开(公告)日：2020-12-03

申请号：US16997092

申请日：2020-08-19

Applicant: TDK CORPORATION

Inventor： Takashi DAITOKU ,  Susumu TANIGUCHI ,  Akiko SEKI ,  Atsushi SATO ,  Yuhei HORIKAWA ,  Makoto ORIKASA ,  Hisayuki ABE

IPC: H01L21/48 ,  C23C18/18 ,  C23C18/20 ,  C23C18/16 ,  C23C18/30 ,  C23C18/31 ,  G03F7/00 ,  H01L33/62

Abstract: A method of producing an electroconductive substrate including a base material, and an electroconductive pattern disposed on one main surface side of the base material includes: a step of forming a trench including a bottom surface to which a foundation layer is exposed, and a lateral surface which includes a surface of a trench formation layer, according to an imprint method; and a step of forming an electroconductive pattern layer by growing metal plating from the foundation layer which is exposed to the bottom surface of the trench.

公开(公告)号：US20190013293A1

公开(公告)日：2019-01-10

申请号：US16037537

申请日：2018-07-17

Applicant: TDK CORPORATION

Inventor： Makoto ORIKASA ,  Hideyuki SEIKE ,  Yuhei HORIKAWA ,  Hisayuki ABE

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L24/81 ,  H01L24/11 ,  H01L24/13 ,  H01L24/95 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/05655 ,  H01L2224/11005 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/1181 ,  H01L2224/1184 ,  H01L2224/11849 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/16148 ,  H01L2224/81002 ,  H01L2224/81014 ,  H01L2224/81022 ,  H01L2224/81035 ,  H01L2224/81047 ,  H01L2224/81048 ,  H01L2224/81065 ,  H01L2224/81143 ,  H01L2224/81815 ,  H01L2224/95146 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/00012 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/01029 ,  H01L2924/01083

Abstract: A method for producing a semiconductor chip is a method for producing a semiconductor chip that includes a substrate, a conductive portion formed on the substrate, and a microbump formed on the conductive portion, which includes a smooth surface formation process of forming a smooth surface on the microbump, and the smooth surface formation process includes a heating process of causing a reducing gas to flow in an inert atmosphere into a space where the semiconductor chips are arranged and heated at or higher than a temperature of a melting point of the microbump, and in the heating process, a pressure application member is mounted on the microbump and among principal surfaces of the pressure application member, a principal surface that contacts the microbump is a flat surface.

公开(公告)号：US20180254255A1

公开(公告)日：2018-09-06

申请号：US15449361

申请日：2017-03-03

Applicant: TDK CORPORATION

Inventor： Makoto ORIKASA ,  Hideyuki SEIKE ,  Yuhei HORIKAWA ,  Hisayuki ABE

IPC: H01L23/00 ,  H01L25/00 ,  H01L25/065

CPC classification number: H01L24/81 ,  H01L24/11 ,  H01L24/13 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/05655 ,  H01L2224/11005 ,  H01L2224/11334 ,  H01L2224/1146 ,  H01L2224/1181 ,  H01L2224/1184 ,  H01L2224/11849 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13083 ,  H01L2224/16148 ,  H01L2224/81014 ,  H01L2224/81035 ,  H01L2224/81047 ,  H01L2224/81048 ,  H01L2224/81065 ,  H01L2224/81143 ,  H01L2224/81815 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/00012

Abstract: A method for producing a semiconductor package is a method for producing a semiconductor package in which a plurality of semiconductor chips, each of which includes a substrate, conductive portions formed on the substrate, and microbumps formed on the conductive portions, are laminated, which includes a heating process of causing a reducing gas to flow in an inert atmosphere into a space where the semiconductor chips are arranged and heated at or higher than a temperature of a melting point of the microbump, and in the heating process, a pressure application member is mounted on the microbump.

公开(公告)号：US20160275976A1

公开(公告)日：2016-09-22

申请号：US15071989

申请日：2016-03-16

Applicant: TDK CORPORATION

Inventor： Katsuhiko IGARASHI ,  Makoto ORIKASA ,  Takashi KAWASHIMA ,  Hisayuki ABE

IPC: G11B5/48 ,  G11B5/60

CPC classification number: G11B5/4833 ,  G11B5/4826

Abstract: A magnetic head device with high joint strength in an arm and a suspension is provided. The magnetic head device comprises an arm, a suspension overlapping with a leading end part of the arm, a slider located at a leading end part of the suspension, and a joint part that is located between the leading end part of the arm and the suspension and that joins the arm and the suspension, while the joint part includes Sn.

Abstract translation: 提供了一种在臂和悬架上具有高接合强度的磁头装置。 磁头装置包括臂，与臂的前端部重叠的悬架，位于悬架的前端部的滑块和位于臂的前端部与悬架之间的接合部 并且连接臂和悬架，而接头部分包括Sn。

公开(公告)号：US20140291021A1

公开(公告)日：2014-10-02

申请号：US14219766

申请日：2014-03-19

Applicant: TDK CORPORATION

Inventor： Kenichi YOSHIDA ,  Yuhei HORIKAWA ,  Hisayuki ABE

IPC: H01R4/02

CPC classification number: H01R4/02 ,  B23K35/00 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/13023 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/13171 ,  H01L2224/16238 ,  H01L2224/16502 ,  H01L2224/81193 ,  H01L2224/8121 ,  H01L2224/81805 ,  H01L2224/81825 ,  H01L2924/01322 ,  H05K3/3463 ,  H05K3/4007 ,  H05K2201/0367 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A junction structure for electronic device having an excellent bonding strength is provided. A junction structure for electronic device in accordance with one aspect of the present invention includes a first metal layer containing nickel and a second metal layer containing gold, tin, and nickel, while the second metal layer includes an AuSn eutectic phase.

Abstract translation: 提供了具有优异的接合强度的电子器件的接合结构。 根据本发明的一个方面的用于电子器件的接合结构包括含有镍的第一金属层和含有金，锡和镍的第二金属层，而第二金属层包括AuSn共晶相。

公开(公告)号：US20140054769A1

公开(公告)日：2014-02-27

申请号：US13960291

申请日：2013-08-06

Applicant: TDK CORPORATION

Inventor： Kenichi YOSHIDA ,  Makoto ORIKASA ,  Hideyuki SEIKE ,  Yuhei HORIKAWA ,  Hisayuki ABE

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L2224/03462 ,  H01L2224/0347 ,  H01L2224/0401 ,  H01L2224/05022 ,  H01L2224/05571 ,  H01L2224/05655 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13006 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13111 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/00012 ,  H01L2224/05552

Abstract: A preferred terminal structure comprises a base material; an electrode formed on the base material; an insulating covering layer formed on the base material and on the electrode and having an opening exposing at least part of the electrode; an under bump metal layer containing Ni, filling the opening on the electrode; and a dome-shaped bump containing Sn and Ti, covering the under bump metal layer, wherein at least part of the under bump metal layer has a portion sandwiched between the external electrode and the insulating covering layer.

Abstract translation: 优选的端子结构包括基材; 形成在基材上的电极; 绝缘覆盖层，形成在所述基底材料上和所述电极上，并且具有暴露所述电极的至少一部分的开口; 含有Ni的下凸块金属层，填充电极上的开口; 以及包含Sn和Ti的圆顶状凸起，覆盖下凸块状金属层，其中至少部分下凸块金属层具有夹在外部电极和绝缘覆盖层之间的部分。

公开(公告)号：US20200211951A1

公开(公告)日：2020-07-02

申请号：US16811018

申请日：2020-03-06

Applicant: TDK CORPORATION

Inventor： Takashi DAITOKU ,  Susumu TANIGUCHI ,  Akiko SEKI ,  Atsushi SATO ,  Yuhei HORIKAWA ,  Makoto ORIKASA ,  Hisayuki ABE

IPC: H01L23/498 ,  H01L33/62 ,  H05K1/09 ,  H01L21/48 ,  H05K3/40 ,  G06F3/044

Abstract: An electroconductive substrate, including: a base material; a foundation layer disposed on the base material; a trench formation layer disposed on the foundation layer, and an electroconductive pattern layer including metal plating. A trench including a bottom surface to which the foundation layer is exposed, is formed. The trench is filled with the electroconductive pattern layer. The foundation layer includes a mixed region which is formed from a surface of the foundation layer on the electroconductive pattern layer side towards the inside thereof, and contains metal particles which contain a metal configuring the electroconductive pattern layer, and enter the foundation layer.

公开(公告)号：US20190035719A1

公开(公告)日：2019-01-31

申请号：US16038491

申请日：2018-07-18

Applicant: TDK CORPORATION

Inventor： Takashi DAITOKU ,  Susumu TANIGUCHI ,  Akiko SEKI ,  Atsushi SATO ,  Yuhei HORIKAWA ,  Makoto ORIKASA ,  Hisayuki ABE

IPC: H01L23/498 ,  H01L33/62 ,  H05K1/09 ,  H05K3/40 ,  H01L21/48

Abstract: An electroconductive substrate, including: a base material; a foundation layer disposed on the base material; a trench formation layer disposed on the foundation layer, and an electroconductive pattern layer including metal plating. A trench including a bottom surface to which the foundation layer is exposed, is formed. The trench is filled with the electroconductive pattern layer. The foundation layer includes a mixed region which is formed from a surface of the foundation layer on the electroconductive pattern layer side towards the inside thereof, and contains metal particles which contain a metal configuring the electroconductive pattern layer, and enter the foundation layer.

公开(公告)号：US20190032219A1

公开(公告)日：2019-01-31

申请号：US16046359

申请日：2018-07-26

Applicant: TDK CORPORATION

Inventor： Makoto ORIKASA ,  Yuhei HORIKAWA ,  Yoshihiro KANBAYASHI ,  Hisayuki ABE

IPC: C23C18/16 ,  C23C18/32 ,  C23C18/38 ,  B32B27/08 ,  B32B27/36 ,  B32B27/18 ,  B32B15/09 ,  B32B15/20 ,  B32B3/30 ,  H01L23/52 ,  H01L27/15

Abstract: A sheet material includes a resin layer containing a binder and catalyst particles, an electroless plating film on the side of one main surface of the resin layer and including first electroless plating films and a second electroless plating film, and a base material on the side of the other main surface of the resin layer.