公开(公告)号：US20240347441A1

公开(公告)日：2024-10-17

申请号：US18753858

申请日：2024-06-25

Applicant: Texas Instruments Incorporated

Inventor： Anindya Poddar ,  Ashok Surendra Prabhu ,  Edgar Dorotyao Balidoy ,  Hau Nguyen ,  Makoto Yoshino ,  MING LI

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/00 ,  H05K1/02

CPC classification number: H01L23/49861 ,  H01L21/4839 ,  H01L21/565 ,  H01L23/49844 ,  H01L24/48 ,  H05K1/0204 ,  H01L2224/48177 ,  H01L2224/48178 ,  H01L2224/48248 ,  H01L2224/48465 ,  H01L2924/1811 ,  H01L2924/182

Abstract: A described example includes: a package substrate having a die pad with a die side surface and having an opposite backside surface, having leads arranged along two opposite sides and having die pad straps extending from two opposing ends of the die pad. The leads lie in a first plane, a portion of the die pad straps lie in a second plane that is spaced from the first plane and located closer to the die pad, and the die pad lies in a third plane that is spaced from and parallel to the second plane in a direction away from the first plane. A semiconductor die is mounted to the die side surface and mold compound covers the semiconductor die, a portion of the leads, and the die side surface of the die pad, and the backside surface of the die pad exposed from the mold compound.

公开(公告)号：US12074134B2

公开(公告)日：2024-08-27

申请号：US17364769

申请日：2021-06-30

Applicant: Texas Instruments Incorporated

Inventor： Anindya Poddar ,  Mahmud Chowdhury ,  Hau Nguyen ,  Masamitsu Matsuura ,  Ting-Ta Yen

IPC: H01L23/48 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065

CPC classification number: H01L24/94 ,  H01L21/563 ,  H01L21/565 ,  H01L23/3171 ,  H01L23/49816 ,  H01L23/49822 ,  H01L24/11 ,  H01L24/16 ,  H01L25/0657 ,  H01L24/95 ,  H01L2224/10126 ,  H01L2224/10145 ,  H01L2224/11849 ,  H01L2224/16146 ,  H01L2225/06513 ,  H01L2924/182

Abstract: In a described example, an apparatus includes: a first semiconductor die with a component on a first surface; a second semiconductor die mounted on a package substrate and having a third surface facing away from the package substrate; a solder seal bonded to and extending from the first surface of the first semiconductor die flip chip mounted to the third surface of the second semiconductor die, the solder seal at least partially surrounding the stress sensitive component; a first solder joint formed between the solder seal and the third surface of the second semiconductor die; a second solder joint formed between solder at an end of the post connect and the third surface of the second semiconductor die; and a mold compound covering the second surface of the first semiconductor die, a portion of the second semiconductor die, and an outside periphery of the solder seal.

公开(公告)号：US20240055327A1

公开(公告)日：2024-02-15

申请号：US17818395

申请日：2022-08-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Makoto Yoshino ,  Hiroki Kawano ,  Hau Nguyen

IPC: H01L23/495 ,  H01L21/48

CPC classification number: H01L23/4951 ,  H01L23/49555 ,  H01L21/4842

Abstract: A method for making a semiconductor device is provided. The method generally includes forming a package having a first plurality of leads extending from a first side of the package, the package disposed on a leadframe. The method generally includes making a first cut adjacent to a first side of a first lead of the first plurality of leads, the first side extending from the first side of the package. The method generally includes making a second cut adjacent to a second side of the first lead of the first plurality of the lead, the second side of the lead opposite the first side of the lead and extending from the first side of the package.

公开(公告)号：US20200043878A1

公开(公告)日：2020-02-06

申请号：US16053199

申请日：2018-08-02

Applicant: Texas Instruments Incorporated

Inventor： Daiki Komatsu ,  Makoto Shibuya ,  Yi Yan ,  Hau Nguyen ,  Luu Thanh Nguyen ,  Anindya Poddar

IPC: H01L23/00 ,  H01L23/367 ,  H01L23/498 ,  H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78

Abstract: Described examples provide integrated circuits and methods, including forming a conductive seed layer at least partially above a conductive feature of a wafer, forming a conductive structure on at least a portion of the conductive seed layer, performing a printing process that forms a polymer material on a side of the wafer proximate a side of the conductive structure, curing the deposited polymer material, and attaching a solder ball structure to a side of the conductive structure.

公开(公告)号：US12160219B2

公开(公告)日：2024-12-03

申请号：US18454034

申请日：2023-08-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anindya Poddar ,  Hau Nguyen ,  Masamitsu Matsuura

IPC: H03H9/02 ,  H03H3/007 ,  H03H3/04 ,  H03H9/05 ,  H03H9/10 ,  H03H9/17 ,  H03H9/24

Abstract: In examples, a device comprises a semiconductor die, a thin-film layer, and an air cavity positioned between the semiconductor die and the thin-film layer. The air cavity comprises a resonator positioned on the semiconductor die. A rib couples to a surface of the thin-film layer opposite the air cavity.

公开(公告)号：US20240055331A1

公开(公告)日：2024-02-15

申请号：US17887790

申请日：2022-08-15

Applicant: Texas Instruments Incorporated

Inventor： Hau Nguyen ,  Ashok Prabhu ,  Kurt Sincerbox

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/49568 ,  H01L24/73 ,  H01L24/48 ,  H01L24/32 ,  H01L23/49513 ,  H01L23/49565 ,  H01L23/49562 ,  H01L23/3135 ,  H01L21/4842 ,  H01L21/565 ,  H01L21/561 ,  H01L2924/182 ,  H01L2224/73265 ,  H01L2224/48464 ,  H01L2224/48245 ,  H01L2224/32245

Abstract: An electronic device includes a die attach pad, a semiconductor die, a lead, a package structure, and tie bars, where the die attach pad has opposite first and second sides, the semiconductor die is attached to the second side of the die attach pad, the lead has a first portion connected to a circuit of the semiconductor die by a bond wire, the package structure exposes a portion of the first side of the die attach pad and the second portion of the lead. Four tie bars extend outward from the die attach pad and the tie bars have respective ends exposed outside the package structure.

公开(公告)号：US11736085B2

公开(公告)日：2023-08-22

申请号：US17002357

申请日：2020-08-25

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Anindya Poddar ,  Hau Nguyen ,  Masamitsu Matsuura

IPC: H03H9/02 ,  H03H9/05 ,  H03H9/10 ,  H03H9/17 ,  H03H9/24 ,  H03H3/007 ,  H03H3/04

CPC classification number: H03H9/02133 ,  H03H3/0073 ,  H03H3/04 ,  H03H9/02102 ,  H03H9/02448 ,  H03H9/0523 ,  H03H9/0533 ,  H03H9/0547 ,  H03H9/1021 ,  H03H9/1057 ,  H03H9/17 ,  H03H9/2426 ,  H03H9/2457 ,  H03H2003/0407

Abstract: In examples, a device comprises a semiconductor die, a thin-film layer, and an air cavity positioned between the semiconductor die and the thin-film layer. The air cavity comprises a resonator positioned on the semiconductor die. A rib couples to a surface of the thin-film layer opposite the air cavity.

公开(公告)号：US20230136784A1

公开(公告)日：2023-05-04

申请号：US17515176

申请日：2021-10-29

Applicant: Texas Instruments Incorporated

Inventor： Anindya Poddar ,  Ashok Surendra Prabhu ,  Edgar Dorotyao Balidoy ,  Hau Nguyen ,  Makoto Yoshino ,  MING LI

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L21/56 ,  H05K1/02

Abstract: A described example includes: a package substrate having a die pad with a die side surface and having an opposite backside surface, having leads arranged along two opposite sides and having die pad straps extending from two opposing ends of the die pad. The leads lie in a first plane, a portion of the die pad straps lie in a second plane that is spaced from the first plane and located closer to the die pad, and the die pad lies in a third plane that is spaced from and parallel to the second plane in a direction away from the first plane. A semiconductor die is mounted to the die side surface and mold compound covers the semiconductor die, a portion of the leads, and the die side surface of the die pad, and the backside surface of the die pad exposed from the mold compound.

公开(公告)号：US20200035633A1

公开(公告)日：2020-01-30

申请号：US16047888

申请日：2018-07-27

Applicant: Texas Instruments Incorporated

Inventor： Dibyajat Mishra ,  Ashok Prabhu ,  Tomoko Noguchi ,  Luu Thanh Nguyen ,  Anindya Poddar ,  Makoto Yoshino ,  Hau Nguyen

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/495

Abstract: A microelectronic device has a pillar connected to an external terminal by an intermetallic joint. Either the pillar or the external terminal, or both, include copper in direct contact with the intermetallic joint. The intermetallic joint includes at least 90 weight percent of at least one copper-tin intermetallic compound. The intermetallic joint is free of voids having a combined volume greater than 10 percent of a volume of the intermetallic joint; and free of a void having a volume greater than 5 percent of the volume of the intermetallic joint. The microelectronic device may be formed using solder which includes at least 93 weight percent tin, 0.5 weight percent to 5.0 weight percent silver, and 0.4 weight percent to 1.0 weight percent copper, to form a solder joint between the pillar and the external terminal, followed by thermal aging to convert the solder joint to the intermetallic joint.

公开(公告)号：US10541220B1

公开(公告)日：2020-01-21

申请号：US16053199

申请日：2018-08-02

Applicant: Texas Instruments Incorporated

Inventor： Daiki Komatsu ,  Makoto Shibuya ,  Yi Yan ,  Hau Nguyen ,  Luu Thanh Nguyen ,  Anindya Poddar

IPC: H01L21/48 ,  H01L21/56 ,  H01L21/78 ,  H01L23/00 ,  H01L23/367 ,  H01L23/498 ,  H01L23/495 ,  H01L23/31

Abstract: Described examples provide integrated circuits and methods, including forming a conductive seed layer at least partially above a conductive feature of a wafer, forming a conductive structure on at least a portion of the conductive seed layer, performing a printing process that forms a polymer material on a side of the wafer proximate a side of the conductive structure, curing the deposited polymer material, and attaching a solder ball structure to a side of the conductive structure.