公开(公告)号：US20240222470A1

公开(公告)日：2024-07-04

申请号：US18428198

申请日：2024-01-31

Applicant: Texas Instruments Incorporated

Inventor： Sebastian Meier ,  Helmut Rinck ,  Mike Mittelstaedt

IPC: H01L29/66 ,  C01G55/00 ,  H01L21/02 ,  H01L21/263 ,  H01L21/28 ,  H01L21/285 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/768 ,  H01L23/00 ,  H01L23/532 ,  H01L29/49 ,  H01L29/78 ,  H01L21/8238

CPC classification number: H01L29/665 ,  C01G55/00 ,  C01G55/004 ,  H01L21/02068 ,  H01L21/2633 ,  H01L21/28052 ,  H01L21/28518 ,  H01L21/31122 ,  H01L21/32134 ,  H01L21/32139 ,  H01L21/76885 ,  H01L21/76895 ,  H01L23/53242 ,  H01L24/00 ,  H01L28/24 ,  H01L29/4975 ,  H01L29/6659 ,  H01L29/7833 ,  H01L21/76834 ,  H01L21/823814 ,  H01L21/823835

Abstract: A microelectronic device includes a substrate a platinum-containing layer over the substrate. The platinum-containing layer includes a first segment and a second segment adjacent to the first segment, and has a first surface and a second surface opposite the first surface closer to the substrate than the first surface. A first spacing between the first segment and the second segment at the first surface is greater than a second spacing between the first segment and the second segment at the second surface. A width of the first segment along the first surface is less than twice a thickness of the first segment, and the second spacing is less than twice the thickness of the first segment.

公开(公告)号：US20230194569A1

公开(公告)日：2023-06-22

申请号：US17733999

申请日：2022-04-30

Applicant: Texas Instruments Incorporated

Inventor： Sebastian Meier ,  Helmut Bumberger ,  Heinrich Wachinger

IPC: G01R1/067 ,  G01R31/28 ,  H01L21/66

CPC classification number: G01R1/06783 ,  G01R31/2889 ,  H01L22/14

Abstract: A wafer probe test system has a conductive needle configured to contact a conductive feature on a surface of a wafer, and a fluid probe having a multichannel tube, the fluid probe configured to engage the surface of the wafer to form a fluidic seal between a sensor face on the surface of the wafer and the conductive feature of the wafer, the multichannel tube having a first channel and a second channel configured to create a flow of fluid across the sensor face on the surface of the wafer.

公开(公告)号：US20230184713A1

公开(公告)日：2023-06-15

申请号：US18066206

申请日：2022-12-14

Applicant: Texas Instruments Incorporated

Inventor： Sebastian Meier ,  Ernst Muellner ,  Helmut Rinck ,  Scott Summerfelt ,  Tobias Fritz ,  Baher Haroun

IPC: G01N27/414

CPC classification number: G01N27/4148 ,  G01N27/4146

Abstract: In some examples, an integrated circuit comprises: a semiconductor die including a semiconductor substrate, a dielectric layer on the semiconductor substrate, and a metallization structure encapsulated in the dielectric layer, in which the semiconductor substrate includes a transistor having a first current terminal, a second current terminal, and a channel region between the first and second current terminals, and the dielectric layer has a sensing side facing away from the semiconductor substrate; an insulation layer on the sensing side; a sensor terminal on the sensing side and over the channel region; and a restriction structure including an opening and a rigid silicon-based fluidic structure, in which the silicon-based fluidic structure is on the sensing side and encapsulates a fluid cavity on the sensing side, the sensor terminal is in the fluid cavity, and the restriction structure is configured to transport a fluid by microfluidic diffusion.

公开(公告)号：US20230115102A1

公开(公告)日：2023-04-13

申请号：US17587749

申请日：2022-01-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sebastian Meier ,  Siegmund Maier ,  Heinrich Wachinger

IPC: H01L21/66 ,  G01R27/02 ,  H01L21/321 ,  H01L21/67

Abstract: An integrated circuit (IC) fabrication tool and associated method for facilitating inline contactless sheet resistance measurement. In one arrangement, the tool comprises at least one main chamber, one or more processing chambers detachably coupled to the main chamber, each of the one or more processing chambers configured for effectuating a respective processing operation on a semiconductor wafer, and at least one sensor chamber detachably coupled to the at least one main chamber, the at least one sensor chamber having a contactless sensor assembly for sensing sheet resistance of a process layer of the semiconductor wafer based on eddy currents generated in the process layer.

公开(公告)号：US11525820B2

公开(公告)日：2022-12-13

申请号：US16572303

申请日：2019-09-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sebastian Meier ,  Heinrich Wachinger ,  Bernhard Peter Lange

IPC: G01N33/18 ,  G01N27/07 ,  G01N27/08 ,  H01L21/67

Abstract: In examples, a method of manufacturing a fluid sensing package comprises coupling a semiconductor die to a first set of conductive terminals; positioning the semiconductor die within a socket, a fluid probe extending through a probe orifice in a lid of the socket; positioning a ring of the fluid probe on a fluid sensing portion of the semiconductor die by closing the lid of the socket; and using the fluid probe to apply fluid to an area of the fluid sensing portion circumscribed by the ring.

公开(公告)号：US11011381B2

公开(公告)日：2021-05-18

申请号：US16523867

申请日：2019-07-26

Applicant: Texas Instruments Incorporated

Inventor： Sebastian Meier ,  Helmut Rinck

IPC: H01L21/306 ,  H01L21/308 ,  C23F1/44 ,  C23F1/30 ,  H01L21/24

Abstract: There is provided a method of patterning platinum on a substrate. A platinum layer is deposited on the substrate, and a patterned photoresist layer is formed over the platinum layer leaving partly exposed regions of the platinum layer. An aluminum layer is deposited over the partly exposed regions of the platinum layer. An alloy is formed of aluminum with platinum from the partly exposed regions. The platinum aluminum alloy is etched away leaving a remaining portion of the platinum layer to form a patterned platinum layer on the substrate. In an embodiment, a thin hard mask layer is deposited on the platinum layer on the semiconductor substrate before the patterned photoresist layer is formed.

公开(公告)号：US20200035500A1

公开(公告)日：2020-01-30

申请号：US16523867

申请日：2019-07-26

Applicant: Texas Instruments Incorporated

Inventor： Sebastian Meier ,  Helmut Rinck

IPC: H01L21/306 ,  H01L21/308 ,  H01L21/24 ,  C23F1/30 ,  C23F1/44

Abstract: There is provided a method of patterning platinum on a substrate. A platinum layer is deposited on the substrate, and a patterned photoresist layer is formed over the platinum layer leaving partly exposed regions of the platinum layer. An aluminum layer is deposited over the partly exposed regions of the platinum layer. An alloy is formed of aluminum with platinum from the partly exposed regions. The platinum aluminum alloy is etched away leaving a remaining portion of the platinum layer to form a patterned platinum layer on the substrate. In an embodiment, a thin hard mask layer is deposited on the platinum layer on the semiconductor substrate before the patterned photoresist layer is formed.

公开(公告)号：US11658034B2

公开(公告)日：2023-05-23

申请号：US17234833

申请日：2021-04-20

Applicant: Texas Instruments Incorporated

Inventor： Sebastian Meier ,  Helmut Rinck

IPC: H01L21/306 ,  H01L21/308 ,  C23F1/44 ,  C23F1/30 ,  H01L21/24

CPC classification number: H01L21/30604 ,  C23F1/30 ,  C23F1/44 ,  H01L21/244 ,  H01L21/3081

Abstract: There is provided a method of patterning platinum on a substrate. A platinum layer is deposited on the substrate, and a patterned photoresist layer is formed over the platinum layer leaving partly exposed regions of the platinum layer. An aluminum layer is deposited over the partly exposed regions of the platinum layer. An alloy is formed of aluminum with platinum from the partly exposed regions. The platinum aluminum alloy is etched away leaving a remaining portion of the platinum layer to form a patterned platinum layer on the substrate. In an embodiment, a thin hard mask layer is deposited on the platinum layer on the semiconductor substrate before the patterned photoresist layer is formed.

公开(公告)号：US10811326B1

公开(公告)日：2020-10-20

申请号：US16427119

申请日：2019-05-30

Applicant: Texas Instruments Incorporated

Inventor： Sebastian Meier ,  Michael Garbe

IPC: H01L21/00 ,  H01L21/66 ,  G01H9/00 ,  G01D5/24 ,  B23K26/362 ,  H01L21/268 ,  H01L23/544 ,  G01D5/14

Abstract: A method of detecting undesired surface effects while lasing a semiconductor during a laser marking, (dicing, fuse cutting or otherwise) process. A detection device is placed near the site of semiconductor lasing to detect erroneous laser markings resulting in the undesired surface effects. Upon identifying such a condition, lasing may be interrupted in-process.

公开(公告)号：US10297497B2

公开(公告)日：2019-05-21

申请号：US15658039

申请日：2017-07-24

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sebastian Meier ,  Helmut Rinck ,  Kai-Alexander Schachtschneider ,  Fromund Metz ,  Mario Schmidpeter ,  Javier Gustavo Moreira

IPC: H01L21/285 ,  H01L21/311 ,  H01L21/768 ,  H01L21/3213

Abstract: In accordance with at least one embodiment of the disclosure, a method of patterning platinum on a substrate is disclosed. In an embodiment, an adhesive layer is deposited over the substrate, a sacrificial layer is deposited over the adhesive layer, and a patterned photoresist layer is formed over the sacrificial layer. Then, the sacrificial layer is patterned utilizing the photoresist layer as a mask such that at least a portion of the adhesive layer is exposed. Subsequently, the top and sidewall surfaces of the patterned sacrificial layer and the first portion of the adhesive layer are covered by a platinum layer. Finally, the sacrificial layer and a portion of the platinum layer covering the top and sidewall surfaces of the sacrificial layer are etched, thereby leaving a remaining portion of the platinum layer to form a patterned platinum layer on the substrate.