公开(公告)号：US09573144B2

公开(公告)日：2017-02-21

申请号：US14291575

申请日：2014-05-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Lan-Hai Wang ,  Yong-Hung Yang ,  Ding-I Liu ,  Si-Wen Liao ,  Po-Hsiung Leu ,  Mao-Cheng Lin

IPC: H01L21/31 ,  H01L21/469 ,  B05B1/30 ,  B05B1/18 ,  B05C11/08 ,  C23C18/00 ,  H01L21/67 ,  H01L31/18

CPC classification number: B05B1/14 ,  B05B1/185 ,  B05B1/30 ,  B05B15/60 ,  B05C11/08 ,  C23C18/00 ,  H01L21/67051 ,  H01L21/6715 ,  H01L31/18

Abstract: A method of forming a coating film over a substrate is provided. The method includes spinning the substrate. The method further includes providing a central coating liquid spray over a central portion of the substrate. The method also includes providing first coating liquid sprays over the substrate. The first coating liquid sprays surround the central coating liquid spray and are spaced apart from the central coating liquid spray by a same first distance.

Abstract translation: 提供了在基板上形成涂膜的方法。 该方法包括旋转衬底。 该方法还包括在基底的中心部分上提供中心涂覆液体喷雾。 该方法还包括在衬底上提供第一涂覆液体喷雾。 第一次涂布液体喷雾包围中央喷涂液体喷雾，并与中心喷涂液体喷雾间隔相同的第一距离。

公开(公告)号：US09048185B2

公开(公告)日：2015-06-02

申请号：US14456082

申请日：2014-08-11

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Wei Chiang ,  Kuang-Cheng Wu ,  Wen-Long Lee ,  Po-Hsiung Leu ,  Ding-I Liu

IPC: H01L21/283 ,  H01L21/28 ,  H01L21/768 ,  H01L29/423 ,  H01L29/66 ,  H01L21/8234

CPC classification number: H01L21/28132 ,  H01L21/28114 ,  H01L21/76834 ,  H01L21/823425 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823481 ,  H01L29/42376 ,  H01L29/66545

Abstract: Some embodiments relate to an integrated circuit (IC). The IC includes a semiconductor substrate having an upper surface with a source region and drain region proximate thereto. A channel region is disposed in the substrate between the source region and the drain region. A gate electrode is disposed over the channel region and separated from the channel region by a gate dielectric. Sidewall spacers are formed about opposing sidewalls of the gate electrode. Upper outer edges of the sidewall spacers extend outward beyond corresponding lower outer edges of the sidewall spacers. A liner is disposed about opposing sidewalls of the sidewall spacers and has a first thickness at an upper portion of liner and a second thickness at a lower portion of the liner. The first thickness is less than the second thickness. Other embodiments are also disclosed.

Abstract translation: 一些实施例涉及集成电路（IC）。 IC包括具有上表面的半导体衬底，源表面和漏区附近。 在源极区域和漏极区域之间的衬底中设置沟道区域。 栅电极设置在沟道区上方并通过栅极电介质与沟道区分离。 侧壁间隔件围绕栅电极的相对侧壁形成。 侧壁间隔件的上外边缘向外延伸超过侧壁间隔件的相应的下外边缘。 衬套设置在侧壁间隔物的相对侧壁周围，并且在衬垫的上部具有第一厚度，在衬垫的下部具有第二厚度。 第一厚度小于第二厚度。 还公开了其他实施例。

公开(公告)号：US20140377961A1

公开(公告)日：2014-12-25

申请号：US13923390

申请日：2013-06-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Lan Hai Wang ,  Ding-I Liu ,  Si-Wen Liao ,  Po-Hsiung Leu ,  Yong-Hung Yang ,  Chia-Ming Tai

IPC: H01L21/02 ,  H01L21/67

CPC classification number: H01L21/02271 ,  C23C16/4401 ,  C23C16/4412 ,  C23C16/45508 ,  C23C16/45565 ,  C23C16/45574 ,  H01L21/02181

Abstract: A multi chamber thin film deposition apparatus and a method for depositing films, is provided. Each chamber includes a three dimensional gas delivery system including process gases being delivered downwardly toward the substrate and laterally toward the substrate. A pumping system includes an exhaust port in each chamber that is centrally positioned underneath the substrate being processed and therefore the gas flow around all portions of the edge of the substrate are equally spaced from the exhaust port thereby creating a uniform gas flow profile which results in film thickness uniformity of films deposited on both the front and back surfaces of the substrate. The deposited films demonstrate uniform thickness on the front and back of the substrate and extend inwardly to a uniform distance on the periphery of the backside of the substrate.

Abstract translation: 提供一种多室薄膜沉积设备和一种用于沉积薄膜的方法。 每个室包括三维气体输送系统，其包括朝向衬底向下输送的工艺气体，并横向朝向衬底。 泵送系统包括在每个室中的排气口，其位于正在处理的衬底下的中心位置，因此围绕衬底边缘的所有部分的气流与排气口等间隔开，从而产生均匀的气流分布，其导致 沉积在基板的前表面和后表面上的膜的膜厚度均匀性。 沉积的膜在基板的前后表现出均匀的厚度，并且在基板的背面的周边上向内延伸到均匀的距离。

公开(公告)号：US20230377955A1

公开(公告)日：2023-11-23

申请号：US18227726

申请日：2023-07-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Jen CHEN ,  Kai-Shiung Hsu ,  Ding-I Liu ,  Jyh-nan Lin

IPC: H01L21/768 ,  H01L23/522

CPC classification number: H01L21/76826 ,  H01L23/5226 ,  H01L21/76849 ,  H01L21/76834 ,  H01L21/76832 ,  H01L23/53295

Abstract: A method for improving reliability of interconnect structures for semiconductor devices is disclosed. The method includes forming a contact structure on a transistor and forming a metallization layer on the contact structure. The forming the metallization layer includes depositing an inter-metal dielectric (IMD) layer on the transistor, forming an opening within the IMD layer to expose a top surface of the contact structure, depositing a metallic layer to fill the opening, forming an electron barrier layer within the IMD layer, and forming a capping layer within the metallic layer. The electron barrier layer has a hole carrier concentration higher than a hole carrier concentration of a portion of the IMD layer underlying the electron barrier layer. The capping layer has a hole carrier concentration higher than a hole carrier concentration of a portion of the metallic layer underlying the capping layer.

公开(公告)号：US20220333236A1

公开(公告)日：2022-10-20

申请号：US17232319

申请日：2021-04-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jia-Wei XU ,  Ding-I Liu ,  Kai-Shiung Hsu ,  Yin-Bin Tseng

IPC: C23C16/44 ,  H01L21/285 ,  H01J37/32 ,  C23C16/52 ,  B08B7/00 ,  B08B13/00

Abstract: The present disclosure describes a semiconductor device manufacturing apparatus and a method for handling contamination in the semiconductor device manufacturing apparatus. The semiconductor device manufacturing apparatus can include a deposition apparatus and a processor. The deposition apparatus can include a chamber, a detection module configured to detect impurities in the chamber, and a gas scrubbing device configured to remove the impurities. The processor can be configured to receive, from the detection module, an impurity characteristic associated with the impurities; compare the impurity characteristic to a baseline characteristic; and instruct the gas scrubbing device to supply a decontamination gas in the chamber based on the comparison of the impurity characteristic to the baseline characteristic.

公开(公告)号：US20220181203A1

公开(公告)日：2022-06-09

申请号：US17682823

申请日：2022-02-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Jen Chen ,  Kai-Shiung Hsu ,  Ding-I Liu ,  Jyh-nan Lin

IPC: H01L21/768 ,  H01L23/522

Abstract: A method for improving reliability of interconnect structures for semiconductor devices is disclosed. The method includes forming a contact structure on a transistor and forming a metallization layer on the contact structure. The forming the metallization layer includes depositing an inter-metal dielectric (IMD) layer on the transistor, forming an opening within the IMD layer to expose a top surface of the contact structure, depositing a metallic layer to fill the opening, forming an electron barrier layer within the IMD layer, and forming a capping layer within the metallic layer. The electron barrier layer has a hole carrier concentration higher than a hole carrier concentration of a portion of the IMD layer underlying the electron barrier layer. The capping layer has a hole carrier concentration higher than a hole carrier concentration of a portion of the metallic layer underlying the capping layer.

公开(公告)号：US11194259B2

公开(公告)日：2021-12-07

申请号：US16547301

申请日：2019-08-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chiang Chiu ,  Ding-I Liu ,  Yu-Ying Lu

IPC: G03F7/20

Abstract: An Equipment Front End Module (EFEM) having a Front Opening Unified Pod (FOUP) dock and a tool access port, includes a robotic wafer handling system configured to transfer silicon wafers between a FOUP coupled to the FOUP dock and a process tool positioned for access via the tool access port. An air curtain system inside the EFEM is positioned to produce an air curtain across the tool access port while the port is open, acting to isolate the interior of the EFEM from the tool environment, and prevent passage of airborne contaminants into the EFEM via the access port.

公开(公告)号：US20170084689A1

公开(公告)日：2017-03-23

申请号：US15370244

申请日：2016-12-06

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Po-Chang Chen ,  Po-Hsiung Leu ,  Ding-I Liu

IPC: H01L29/06 ,  H01L29/165 ,  H01L29/78

CPC classification number: H01L29/0653 ,  H01L21/0214 ,  H01L21/02219 ,  H01L21/02282 ,  H01L21/02326 ,  H01L21/0234 ,  H01L21/762 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7848

Abstract: The present disclosure relates to an integrated chip having gate electrodes separated from an epitaxial source/drain region by gaps filled with a flowable dielectric material. In some embodiments, the integrated chip has an epitaxial source/drain region protruding outward from a substrate. A first gate structure, having a conductive gate electrode, is separated from the epitaxial source/drain region by a gap. A flowable dielectric material is disposed within the gap, and a pre-metal dielectric (PMD) layer is arranged above the flowable dielectric material. The PMD layer continuously extends between a sidewall of the first gate structure and a sidewall of a second gate structure, and has an upper surface that is substantially aligned with an upper surface of the conductive gate electrode. A metal contact is electrically coupled to the conductive gate electrode and is disposed within an inter-level dielectric layer over the PMD layer and the first gate structure.

公开(公告)号：US09536771B2

公开(公告)日：2017-01-03

申请号：US13860765

申请日：2013-04-11

Applicant: Taiwan Semiconductor Manufacturing Co. Ltd.

Inventor： Po-Chang Chen ,  Po-Hsiung Leu ,  Ding-I Liu

IPC: H01L29/66 ,  H01L27/02 ,  H01L21/762 ,  H01L21/02 ,  H01L29/78 ,  H01L29/165

CPC classification number: H01L29/0653 ,  H01L21/0214 ,  H01L21/02219 ,  H01L21/02282 ,  H01L21/02326 ,  H01L21/0234 ,  H01L21/762 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7848

Abstract: The present disclosure relates to an integrated chip IC having transistors with structures separated by a flowable dielectric material, and a related method of formation. In some embodiments, an integrated chip has a semiconductor substrate and an embedded silicon germanium (SiGe) region extending as a positive relief from a location within the semiconductor substrate to a position above the semiconductor substrate. A first gate structure is located at a position that is separated from the embedded SiGe region by a first gap. A flowable dielectric material is disposed between the gate structure and the embedded SiGe region and a pre-metal dielectric (PMD) layer disposed above the flowable dielectric material. The flowable dielectric material provides for good gap fill capabilities that mitigate void formation during gap fill between the adjacent gate structures.

Abstract translation: 本公开内容涉及具有由可流动介电材料分离的结构的晶体管的集成芯片IC以及相关的形成方法。 在一些实施例中，集成芯片具有半导体衬底和嵌入硅锗（SiGe）区域，该半导体衬底和半导体衬底上的位置从半导体衬底内的位置以正电位延伸。 第一栅极结构位于通过第一间隙与嵌入的SiGe区分离的位置。 在栅极结构和嵌入的SiGe区域之间设置可流动介电材料，以及设置在可流动介电材料之上的预金属电介质（PMD）层。 可流动介电材料提供良好的间隙填充能力，以减轻相邻栅极结构之间的间隙填充期间的空隙形成。

公开(公告)号：US09324559B2

公开(公告)日：2016-04-26

申请号：US13923390

申请日：2013-06-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Lan Hai Wang ,  Ding-I Liu ,  Si-Wen Liao ,  Po-Hsiung Leu ,  Yong-Hung Yang ,  Chia-Ming Tai

IPC: H01L21/02 ,  C23C16/44 ,  C23C16/455

CPC classification number: H01L21/02271 ,  C23C16/4401 ,  C23C16/4412 ,  C23C16/45508 ,  C23C16/45565 ,  C23C16/45574 ,  H01L21/02181

Abstract: A multi chamber thin film deposition apparatus and a method for depositing films, is provided. Each chamber includes a three dimensional gas delivery system including process gases being delivered downwardly toward the substrate and laterally toward the substrate. A pumping system includes an exhaust port in each chamber that is centrally positioned underneath the substrate being processed and therefore the gas flow around all portions of the edge of the substrate are equally spaced from the exhaust port thereby creating a uniform gas flow profile which results in film thickness uniformity of films deposited on both the front and back surfaces of the substrate. The deposited films demonstrate uniform thickness on the front and back of the substrate and extend inwardly to a uniform distance on the periphery of the backside of the substrate.

Abstract translation: 提供一种多室薄膜沉积设备和一种用于沉积薄膜的方法。 每个室包括三维气体输送系统，其包括朝向衬底向下输送的工艺气体，并横向朝向衬底。 泵送系统包括在每个室中的排气口，其位于正在处理的衬底下的中心位置，因此围绕衬底边缘的所有部分的气流与排气口等间隔开，从而产生均匀的气流分布，其导致 沉积在基板的前表面和后表面上的膜的膜厚度均匀性。 沉积的膜在基板的前后表现出均匀的厚度，并且在基板的背面的周边上向内延伸到均匀的距离。