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11.发明授权公开(公告)号：US10996553B2
公开(公告)日：2021-05-04
申请号：US16128863
申请日：2018-09-12
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Wen-Chang Hsueh , Huan-Ling Lee , Chia-Jen Chen , Hsin-Chang Lee
Abstract: A reticle and a method for manufacturing the same are provided. The reticle includes a mask substrate, a reflective multilayer (ML), a capping layer and an absorption composite structure. The reflective ML is positioned over a front-side surface of the mask substrate. The capping layer is positioned over the reflective ML. The absorption composite structure is positioned over the capping layer. The absorption composite structure includes a first absorption layer, a second absorption layer, a third absorption layer and an etch stop layer. The first absorption layer is positioned over the capping layer. The second absorption layer is positioned over the first absorption layer. The third absorption layer is positioned over the second absorption layer. The etch stop layer is positioned between the first absorption layer and the second absorption layer. The first absorption layer and the second absorption layer are made of the same material.
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公开(公告)号：US10816892B2
公开(公告)日：2020-10-27
申请号：US15966862
申请日：2018-04-30
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor： Chien-Cheng Chen , Chia-Jen Chen , Hsin-Chang Lee , Shih-Ming Chang , Tran-Hui Shen , Yen-CHeng Ho , Chen-Shao Hsu
IPC: G03F1/36 , G03F1/76 , G03F1/78 , H01J37/317 , G03F7/20
Abstract: In a method of manufacturing a photo mask for lithography, circuit pattern data are acquired. A pattern density, which is a total pattern area per predetermined area, is calculated from the circuit pattern data. Dummy pattern data for areas having pattern density less than a threshold density are generated. Mask drawing data is generated from the circuit pattern data and the dummy pattern data. By using an electron beam from an electron beam lithography apparatus, patterns are drawn according to the mask drawing data on a resist layer formed on a mask blank substrate. The drawn resist layer is developed using a developing solution. Dummy patterns included in the dummy pattern data are not printed as a photo mask pattern when the resist layer is exposed with the electron beam and is developed.
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公开(公告)号：US10353285B2
公开(公告)日：2019-07-16
申请号：US16010118
申请日：2018-06-15
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Hsin-Chang Lee , Pei-Cheng Hsu , Yun-Yue Lin , Hsuan-Chen Chen , Hsuan-I Wang , Anthony Yen
Abstract: A structure including an EUV mask and a pellicle attached to the EUV mask. The pellicle includes a pellicle frame and a plurality of pellicle membrane layers attached to the pellicle frame. The plurality of pellicle membrane layers include at least one core pellicle membrane layer and an additional pellicle membrane layer is disposed on the at least one core pellicle membrane layer. In some embodiments, the additional pellicle membrane layer is a material having a thermal emissivity greater than 0.2, a transmittance greater than 80%, and a refractive index (n) for 13.5 nanometer source of greater than 0.9.
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公开(公告)号：US10345695B2
公开(公告)日：2019-07-09
申请号：US15475903
申请日：2017-03-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Yi-Fu Hsieh , Chih-Chiang Tu , Jong-Yuh Chang , Hsin-Chang Lee
Abstract: The present disclosure describes a method to form alignment marks on or in the top layer of an extreme ultraviolet (EUV) mask blank without the use of photolithographic methods. For example, the method can include forming a metal structure on the top layer of the EUV mask blank by dispensing a hexacarbonylchromium vapor on the top layer of the EUV mask and exposing the hexacarbonylchromium vapor to an electron-beam. The hexacarbonylchromium vapor is decomposed to form the metal structure at an area which is proximate to where the hexacarbonylchromium vapors interact with the electron-beam. In another example, the method can include forming a patterned structure in the top layer of an EUV mask blank with the use of an etcher aperture and an etching process.
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公开(公告)号：US10162258B2
公开(公告)日：2018-12-25
申请号：US15381033
申请日：2016-12-15
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Yun-Yue Lin , Hsuan-Chen Chen , Chih-Cheng Lin , Hsin-Chang Lee , Yao-Ching Ku , Wei-Jen Lo , Anthony Yen , Chin-Hsiang Lin , Mark Chien
Abstract: A method for fabricating a pellicle includes forming a first dielectric layer over a back surface of a substrate. After forming the first dielectric layer, and in some embodiments, a graphene layer is formed over a front surface of the substrate. In some examples, after forming the graphene layer, the first dielectric layer is patterned to form an opening in the first dielectric layer that exposes a portion of the back surface of the substrate. Thereafter, while using the patterned first dielectric layer as a mask, an etching process may be performed to the back surface of the substrate to form a pellicle having a pellicle membrane that includes the graphene layer.
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Patent Agency Ranking
公开(公告)号：US10012899B2
公开(公告)日：2018-07-03
申请号：US15356204
申请日：2016-11-18
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Chih-Chiang Tu , Chun-Lang Chen , Chue San Yoo , Jong-Yuh Chang , Chia-Shiung Tsai , Ping-Yin Liu , Hsin-Chang Lee , Chih-Cheng Lin , Yun-Yue Lin
CPC classification number: G03F1/62 , C23C14/16 , C23C14/165 , C23C14/18 , C23C16/01 , C23C16/26 , C23C16/56 , C23C28/32 , G03F1/64 , H01L21/0332 , H01L21/0335 , H01L21/0337
Abstract: A method includes depositing a first material layer over a first substrate; and depositing a graphene layer over the first material layer. The method further includes depositing an amorphous silicon layer over the graphene layer and bonding the amorphous silicon layer to a second substrate, thereby forming an assembly. The method further includes annealing the assembly, thereby converting the amorphous silicon layer to a silicon oxide layer. The method further includes removing the first substrate from the assembly and removing the first material layer from the assembly, thereby exposing the graphene layer.
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公开(公告)号：US09360749B2
公开(公告)日：2016-06-07
申请号：US14260651
申请日：2014-04-24
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd
Inventor： Yun-Yue Lin , Chia-Jen Chen , Hsin-Chang Lee , Anthony Yen
Abstract: A pellicle structure, a pellicle-mask structure, and a method for forming the pellicle structure are provided. The pellicle structure includes a pellicle film made of a carbon-based material. In addition, the pellicle film is configured to protect a mask structure in a lithography process. The pellicle-mask structure includes a mask substrate having a mask pattern formed over the mask substrate and the pellicle frame disposed on the mask substrate. The pellicle-mask structure further includes the pellicle film disposed on the pellicle frame.
Abstract translation: 提供防护薄膜组件，防护薄膜组件，以及防护薄膜组件的形成方法。 防护薄膜组件包括由碳基材料制成的防护薄膜。 此外，防护薄膜被配置为在光刻工艺中保护掩模结构。 防护薄膜组件包括具有形成在掩模基板上的掩模图案和设置在掩模基板上的防护膜框架的掩模基板。 防护薄膜组件还包括设置在防护薄膜组件框架上的防护薄膜。
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18.发明授权Lithography system and method for patterning photoresist layer on EUV mask 有权用于在EUV掩模上图案化光刻胶层的平版印刷系统和方法公开(公告)号：US09341937B2
公开(公告)日：2016-05-17
申请号：US14261809
申请日：2014-04-25
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Yun-Yue Lin , Chia-Jen Chen , Hsin-Chang Lee , Anthony Yen
Abstract: A lithography system for an extreme ultra violet (EUV) mask is provided. The lithography system includes a coupling module. The coupling module includes at least one mask contact element configured to touch a peripheral area of the EUV mask. The lithography system also includes an ammeter having an end electrically connected to the EUV mask through the at least one mask contact element and another end connected to a ground potential. The ammeter includes a sensor configured to measure a current conducting from the EUV mask to the ground potential and a compensation circuit configured to provide a compensation current that is opposite to the current measured by the sensor.
Abstract translation: 提供了用于极紫外（EUV）掩模的光刻系统。 光刻系统包括耦合模块。 耦合模块包括被配置为触摸EUV掩模的外围区域的至少一个掩模接触元件。 光刻系统还包括电流表，其具有通过至少一个掩模接触元件电连接到EUV掩模的端部，另一端连接到接地电位。 电流表包括传感器，其被配置为测量从EUV掩模传导到地电位的电流;以及补偿电路，其被配置为提供与由传感器测量的电流相反的补偿电流。
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公开(公告)号：US12153337B2
公开(公告)日：2024-11-26
申请号：US18395234
申请日：2023-12-22
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Pei-Cheng Hsu , Ta-Cheng Lien , Hsin-Chang Lee
IPC: G03F1/24
Abstract: An extreme ultraviolet mask including a substrate, a reflective multilayer stack on the substrate and a patterned absorber layer on the reflective multilayer stack is provided. The patterned absorber layer includes an alloy comprising tantalum and at least one alloying element. The at least one alloying element includes at least one transition metal element or at least one Group 14 element.
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20.发明授权公开(公告)号：US11960201B2
公开(公告)日：2024-04-16
申请号：US18317368
申请日：2023-05-15
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor： Pei-Cheng Hsu , Chun-Fu Yang , Ta-Cheng Lien , Hsin-Chang Lee
CPC classification number: G03F1/24 , G03F1/70 , G03F7/2004
Abstract: The present disclosure describes a method of patterning a semiconductor wafer using extreme ultraviolet lithography (EUVL). The method includes receiving an EUVL mask that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further includes patterning the absorber layer to form a trench on the EUVL mask, wherein the trench has a first width above a target width. The method further includes treating the EUVL mask with oxygen plasma to reduce the trench to a second width, wherein the second width is below the target width. The method may also include treating the EUVL mask with nitrogen plasma to protect the capping layer, wherein the treating of the EUVL mask with the nitrogen plasma expands the trench to a third width at the target width.
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