Efficiency in Antireflective Coating Layers for Solar Cells
    12.
    发明申请
    Efficiency in Antireflective Coating Layers for Solar Cells 有权
    太阳能电池抗反射涂层的效率

    公开(公告)号:US20120174979A1

    公开(公告)日:2012-07-12

    申请号:US13416354

    申请日:2012-03-09

    IPC分类号: H01L31/0224 H01L31/0232

    摘要: A solar cell includes a substrate having an N-region and a P-region, a first anti-reflective layer disposed on the substrate, a metallic contact disposed on the first anti-reflective layer, a second anti-reflective layer disposed on the first anti-reflective layer and the metallic contact, and a region partially defined by the first anti-reflective layer and the second anti-reflective layer having diffused metallic contact material operative to form a conductive path to the substrate through the first anti-reflective layer, the metallic contact, and the second anti-reflective layer.

    摘要翻译: 太阳能电池包括具有N区和P区的衬底,设置在衬底上的第一抗反射层,设置在第一抗反射层上的金属触点,设置在第一抗反射层上的第二抗反射层 抗反射层和金属接触,以及由第一抗反射层和第二抗反射层局部限定的区域,其具有扩散的金属接触材料,其可操作以通过第一抗反射层形成到衬底的导电路径, 金属触点和第二抗反射层。

    BONDED STRUCTURE EMPLOYING METAL SEMICONDUCTOR ALLOY BONDING
    14.
    发明申请
    BONDED STRUCTURE EMPLOYING METAL SEMICONDUCTOR ALLOY BONDING 有权
    使用金属半导体合金接合的结合结构

    公开(公告)号:US20110168434A1

    公开(公告)日:2011-07-14

    申请号:US12685954

    申请日:2010-01-12

    IPC分类号: H05K1/09 B05D5/12 H05K1/02

    摘要: Vertical stacks of a metal portion and a semiconductor portion formed on a first substrate are brought into physical contact with vertical stacks of a metal portion and a semiconductor portion formed on a second substrate. Alternately, vertical stacks of a metal portion and a semiconductor portion formed on a first substrate are brought into physical contact with metal portions formed on a second substrate. The assembly of the first and second substrates is subjected to an anneal at a temperature that induces formation of a metal semiconductor alloy derived from the semiconductor portions and the metal portions. The first substrate and the second substrate are bonded through metal semiconductor alloy portions that adhere to the first and second substrates.

    摘要翻译: 形成在第一基板上的金属部分和半导体部分的垂直叠层与形成在第二基板上的金属部分和半导体部分的垂直叠层物理接触。 或者,形成在第一基板上的金属部分和半导体部分的垂直堆叠与形成在第二基板上的金属部分物理接触。 在引起由半导体部分和金属部分衍生的金属半导体合金的形成的温度下对第一和第二基板的组装进行退火。 第一基板和第二基板通过粘附到第一和第二基板的金属半导体合金部分接合。

    Efficiency in Antireflective Coating Layers for Solar Cells
    15.
    发明申请
    Efficiency in Antireflective Coating Layers for Solar Cells 有权
    太阳能电池抗反射涂层的效率

    公开(公告)号:US20110174369A1

    公开(公告)日:2011-07-21

    申请号:US12689464

    申请日:2010-01-19

    IPC分类号: H01L31/04 B05D5/12

    摘要: A method for fabricating a cell structure includes doping a substrate to form a N-region and a P-region, disposing a first anti-reflective layer on the substrate, disposing a metallic contact paste on the first anti-reflective layer, drying the metallic contact paste to form contacts, disposing a second anti-reflective layer on the first anti-reflective layer and the metallic contacts, and heating the cell structure, wherein heating the cell structure results in metallic contact material penetrating the first anti-reflective layer and contacting the substrate.

    摘要翻译: 一种电池结构的制造方法,其特征在于,在衬底上掺杂形成N区和P区,在所述衬底上设置第一抗反射层,在所述第一抗反射层上设置金属接触膏,干燥所述金属 接触膏以形成接触,在第一抗反射层和金属触点上设置第二抗反射层,并加热电池结构,其中加热电池结构导致金属接触材料穿透第一抗反射层并接触 底物。

    Field effect structure and method including spacer shaped metal gate with asymmetric source and drain regions
    16.
    发明授权
    Field effect structure and method including spacer shaped metal gate with asymmetric source and drain regions 有权
    场效应结构和方法包括具有不对称源极和漏极区域的间隔金属栅极

    公开(公告)号:US07768006B2

    公开(公告)日:2010-08-03

    申请号:US12129033

    申请日:2008-05-29

    IPC分类号: H01L31/00

    摘要: A semiconductor structure and a method for fabricating the semiconductor structure provide a field effect device, such as a field effect transistor, that includes a spacer shaped metal gate located over a channel within a semiconductor substrate that separates a plurality of source and drain regions within the semiconductor substrate. Within the semiconductor structure, the plurality of source and drain regions is asymmetric with respect to the spacer shaped metal gate. The particular semiconductor structure may be fabricated using a self aligned dummy gate method that uses a portion of a spacer as a self alignment feature when forming the spacer shaped metal gate, which may have a sub-lithographic linewidth.

    摘要翻译: 半导体结构和半导体结构的制造方法提供场效应晶体管等场效应晶体管,该场效应晶体管包括位于半导体衬底内的通道之间的间隔金属栅极,该隔离物形金属栅极将多个源极和漏极区域分隔开, 半导体衬底。 在半导体结构内,多个源极和漏极区域相对于间隔物金属栅极是不对称的。 可以使用自对准的虚拟栅极方法来制造特定的半导体结构,该方法在形成可具有亚光刻线宽的间隔物金属栅极时,使用间隔物的一部分作为自对准特征。

    Enhancing MOSFET performance with corner stresses of STI
    19.
    发明授权
    Enhancing MOSFET performance with corner stresses of STI 有权
    通过STI拐角应力增强MOSFET性能

    公开(公告)号:US09356025B2

    公开(公告)日:2016-05-31

    申请号:US14348579

    申请日:2012-03-29

    摘要: The present invention relates to enhancing MOSFET performance with the corner stresses of STI. A method of manufacturing a MOS device comprises the steps of: providing a semiconductor substrate; forming trenches on the semiconductor substrate and at least a pMOS region and at least an nMOS region surrounded by the trenches; filling the trenches with a dielectric material having a stress; removing at least the dielectric material having a stress in the trenches which is adjacent to a position where a channel is to be formed on each of the pMOS and nMOS regions so as to form exposed regions; filling the exposed regions with a insulating material; and forming pMOS and nMOS devices on the pMOS region and the nMOS region, respectively, wherein each of the pMOS and nMOS devices comprises a channel, a gate formed above the channel, and a source and a drain formed at both sides of the channel; wherein in a channel length direction, the boundary of each exposed region is substantially aligned with the boundary of the position of the channel, or the boundary of each exposed region extends along the channel length direction to be aligned with the boundary of corresponding pMOS or nMOS region.

    摘要翻译: 本发明涉及利用STI的拐角应力来增强MOSFET的性能。 一种制造MOS器件的方法包括以下步骤:提供半导体衬底; 在所述半导体衬底和至少一个pMOS区域和由所述沟槽包围的至少nMOS区域中形成沟槽; 用具有应力的介电材料填充沟槽; 至少去除在沟道中具有应力的介电材料,所述沟槽邻近要在pMOS和nMOS区域中的每一个上形成沟道的位置,以形成暴露区域; 用绝缘材料填充暴露的区域; 以及分别在pMOS区域和nMOS区域上形成pMOS和nMOS器件,其中pMOS和nMOS器件中的每一个包括沟道,形成在沟道上方的栅极以及形成在沟道两侧的源极和漏极; 其中在通道长度方向上,每个曝光区域的边界基本上与通道位置的边界对齐,或者每个曝光​​区域的边界沿着沟道长度方向延伸以与对应的pMOS或nMOS的边界对准 地区。

    MOSFET and method for manufacturing the same
    20.
    发明授权
    MOSFET and method for manufacturing the same 有权
    MOSFET及其制造方法

    公开(公告)号:US09252280B2

    公开(公告)日:2016-02-02

    申请号:US13510461

    申请日:2011-11-18

    摘要: The present disclosure discloses a metal-oxide-semiconductor field-effect transistor (MOSFET) and a method for manufacturing the same. The MOSFET includes: a silicon on insulator (SOI) wafer which comprises a semiconductor substrate, a buried insulating layer, and a semiconductor layer, the buried insulating layer being on the semiconductor substrate, and the semiconductor layer being on the buried insulating layer; a gate stack on the semiconductor layer; a source region and a drain region, which are in the semiconductor layer and on opposite sides of the gate stack; and a channel region, which is in the semiconductor layer and sandwiched by the source region and the drain region, wherein the MOSFET further comprises a back gate, the back gate being located in the semiconductor substrate and having a first doped region in a lower portion of the back gate and a second doped region in an upper portion of the back gate.

    摘要翻译: 本公开公开了一种金属氧化物半导体场效应晶体管(MOSFET)及其制造方法。 所述MOSFET包括:绝缘体上硅(SOI)晶片,其包含半导体衬底,掩埋绝缘层和半导体层,所述掩埋绝缘层位于所述半导体衬底上,所述半导体层位于所述掩埋绝缘层上; 半导体层上的栅极堆叠; 源极区域和漏极区域,其位于半导体层中并且在栅极堆叠的相对侧上; 以及沟道区,其位于所述半导体层中并且被所述源极区和所述漏极区夹持,其中所述MOSFET还包括背栅极,所述后栅极位于所述半导体衬底中,并且在所述半导体衬底的下部具有第一掺杂区域 的背栅极和在后栅极的上部中的第二掺杂区域。