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41 条记录 (耗时 0.038 秒)

    Method for removing dummy poly in a gate last process
    11.
    发明授权
    Method for removing dummy poly in a gate last process 有权
    在门最后一个过程中去除虚拟多边形的方法

    公开(公告)号：US08415254B2

    公开(公告)日：2013-04-09

    申请号：US12275082

    申请日：2008-11-20

    申请人： Matt Yeh ,  Fan-Yi Hsu ,  Shun Wu Lin ,  Shu-Yuan Ku ,  Hui Ouyang

    发明人： Matt Yeh ,  Fan-Yi Hsu ,  Shun Wu Lin ,  Shu-Yuan Ku ,  Hui Ouyang

    IPC分类号： H01L21/302

    CPC分类号： H01L21/32134 ,  H01L21/02071 ,  H01L21/28035 ,  H01L21/823828 ,  H01L21/82385 ,  H01L27/11 ,  H01L29/66583

    摘要： A method is provided for fabricating a semiconductor device. The method includes removing a silicon material from a gate structure located on a substrate through a cycle including: etching the silicon material to remove a portion thereof, where the substrate is spun at a spin rate, applying a cleaning agent to the substrate, and drying the substrate; and repeating the cycle, where a subsequent cycle includes a subsequent spin rate for spinning the substrate during the etching and where the subsequent spin rate does not exceed the spin rate of the previous cycle.

    摘要翻译： 提供了制造半导体器件的方法。 该方法包括通过循环从位于衬底上的栅极结构去除硅材料，包括：蚀刻硅材料以除去其中的一部分，其中衬底以旋转速率纺丝，向衬底施加清洁剂，并干燥 基材; 并重复该循环，其中随后的循环包括用于在蚀刻期间旋转衬底的随后旋转速率，并且其中随后的旋转速率不超过先前循环的旋转速率。

    Methods for a gate replacement process
    12.
    发明授权
    Methods for a gate replacement process 有权
    门更换过程的方法

    公开(公告)号：US08367563B2

    公开(公告)日：2013-02-05

    申请号：US12575280

    申请日：2009-10-07

    申请人： Matt Yeh ,  Hui Ouyang ,  Da-Yuan Lee ,  Kuang Yuan Hsu ,  Hun-Jan Tao ,  Xiong-Fei Yu

    发明人： Matt Yeh ,  Hui Ouyang ,  Da-Yuan Lee ,  Kuang Yuan Hsu ,  Hun-Jan Tao ,  Xiong-Fei Yu

    IPC分类号： H01L21/3205

    CPC分类号： H01L29/401 ,  H01L21/823828 ,  H01L21/823835 ,  H01L21/823842 ,  H01L29/66545

    摘要： A method for fabricating a semiconductor device is disclosed. In one embodiment, the method may include providing a substrate; forming a gate structure including a first dummy gate over the substrate; removing the first dummy gate from the gate structure to form a trench; forming an interfacial layer, high-k dielectric layer, and capping layer to partially fill in the trench; forming a second dummy gate over the capping layer, wherein the second dummy gate fills the trench; and replacing the second dummy gate with a metal gate. In one embodiment, the method may include providing a substrate; forming an interfacial layer over the substrate; forming a high-k dielectric layer over the interfacial layer; forming an etch stop layer over the high-k dielectric layer; forming a capping layer including a low thermal budget silicon over the etch stop layer; forming a dummy gate layer over the capping layer; forming a gate structure; and performing a gate replacement process.

    摘要翻译： 公开了一种制造半导体器件的方法。 在一个实施例中，该方法可以包括提供衬底; 在所述衬底上形成包括第一虚拟栅极的栅极结构; 从栅极结构去除第一伪栅极以形成沟槽; 形成界面层，高k电介质层和覆盖层以部分地填充在沟槽中; 在所述覆盖层上形成第二虚拟栅极，其中所述第二伪栅极填充所述沟槽; 并用金属栅极替换第二虚拟栅极。 在一个实施例中，该方法可以包括提供衬底; 在衬底上形成界面层; 在界面层上形成高k电介质层; 在所述高k电介质层上形成蚀刻停止层; 在所述蚀刻停止层上形成包括低热预算硅的覆盖层; 在覆盖层上形成虚拟栅极层; 形成栅极结构; 并进行门更换处理。

    INTEGRATED CIRCUIT DEVICE WITH WELL CONTROLLED SURFACE PROXIMITY AND METHOD OF MANUFACTURING SAME
    14.
    发明申请
    INTEGRATED CIRCUIT DEVICE WITH WELL CONTROLLED SURFACE PROXIMITY AND METHOD OF MANUFACTURING SAME 有权
    具有良好控制的表面接近度的集成电路装置及其制造方法

    公开(公告)号：US20120273847A1

    公开(公告)日：2012-11-01

    申请号：US13543943

    申请日：2012-07-09

    申请人： Ming-Huan Tsai ,  Hui Ouyang ,  Chun-Fai Cheng ,  Wei-Han Fan

    发明人： Ming-Huan Tsai ,  Hui Ouyang ,  Chun-Fai Cheng ,  Wei-Han Fan

    IPC分类号： H01L27/085

    CPC分类号： H01L21/823807 ,  H01L21/02433 ,  H01L21/02639 ,  H01L21/823814 ,  H01L29/7848

    摘要： An integrated circuit device and method for manufacturing the integrated circuit device is disclosed. The disclosed method provides improved control over a surface proximity and tip depth of integrated circuit devices. An exemplary integrated circuit device achieved by the method has a surface proximity of about 1 nm to about 3 nm and a tip depth of about 5 nm to about 10 nm. The integrated circuit device having such surface proximity and tip depth includes an epi source feature and an epi drain feature defined by a first facet and a second facet of a substrate in a first direction, such as a {111} crystallographic plane of the substrate, and a third facet of the substrate in a second direction, such as a { 100} crystallographic plane of the substrate.

    摘要翻译： 公开了一种用于制造集成电路器件的集成电路器件和方法。 所公开的方法提供对集成电路器件的表面接近度和尖端深度的改进的控制。 通过该方法实现的示例性集成电路器件具有约1nm至约3nm的表面接近度和约5nm至约10nm的尖端深度。 具有这种表面接近度和尖端深度的集成电路器件包括由第一方向（例如衬底的{111}晶体平面）的第一方向上的第一面和第二小面限定的外延源特征和外延漏极特征， 以及在第二方向上的衬底的第三面，例如衬底的{100}晶面。

    Methods for forming metal gate transistors
    15.
    发明授权
    Methods for forming metal gate transistors 有权
    形成金属栅晶体管的方法

    公开(公告)号：US08268085B2

    公开(公告)日：2012-09-18

    申请号：US12719532

    申请日：2010-03-08

    申请人： Matt Yeh ,  Shun Wu Lin ,  Hui Ouyang

    发明人： Matt Yeh ,  Shun Wu Lin ,  Hui Ouyang

    IPC分类号： B08B3/04

    CPC分类号： H01L21/02068 ,  H01L21/823842 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/66545

    摘要： A method for cleaning a diffusion barrier over a gate dielectric of a metal-gate transistor over a substrate is provided. The method includes cleaning the diffusion barrier with a first solution including at least one surfactant. The amount of the surfactant of the first solution is about a critical micelle concentration (CMC) or more. The diffusion barrier is cleaned with a second solution. The second solution has a physical force to remove particles over the diffusion barrier. The second solution is substantially free from interacting with the diffusion barrier.

    摘要翻译： 提供了一种在衬底上清洁金属栅极晶体管的栅极电介质上的扩散阻挡层的方法。 该方法包括用包含至少一种表面活性剂的第一溶液清洗扩散阻挡层。 第一溶液的表面活性剂的量约为临界胶束浓度（CMC）或更高。 扩散阻挡层用第二种溶液清洗。 第二种解决方案具有去除扩散阻挡层上的颗粒的物理力。 第二溶液基本上不与扩散阻挡层相互作用。

    Flexible Authorization Model for Secure Search
    17.
    发明申请
    Flexible Authorization Model for Secure Search 审中-公开
    灵活的安全搜索授权模型

    公开(公告)号：US20070214129A1

    公开(公告)日：2007-09-13

    申请号：US11680558

    申请日：2007-02-28

    申请人： Mark Ture ,  Muralidhar Krishnaprasad ,  Mark Davis ,  Cindy Hsin ,  Meeten Bhavsar ,  Hiroshi Koide ,  Joaquin Delgado ,  Chi-Ming Yang ,  Visar Nimani ,  Hui Ouyang ,  Sachin Bhatkar

    发明人： Mark Ture ,  Muralidhar Krishnaprasad ,  Mark Davis ,  Cindy Hsin ,  Meeten Bhavsar ,  Hiroshi Koide ,  Joaquin Delgado ,  Chi-Ming Yang ,  Visar Nimani ,  Hui Ouyang ,  Sachin Bhatkar

    IPC分类号： G06F17/30

    CPC分类号： G06F16/951

    摘要： A flexible and extensible architecture allows for secure searching across an enterprise. Such an architecture can provide a simple Internet-like search experience to users searching secure content inside (and outside) the enterprise. The architecture allows for the crawling and searching of a variety or sources across an enterprise, regardless of whether any of these sources conform to a conventional user role model. The architecture further allows for security attributes to be submitted at query time, for example, in order to provide real-time secure access to enterprise resources. The user query also can be transformed to provide for dynamic querying that provides for a more current result list than can be obtained for static queries.

    摘要翻译： 灵活可扩展的架构允许跨企业进行安全搜索。 这样的架构可以为在企业内部（和外部）搜索安全内容的用户提供简单的类似Internet的搜索体验。 该架构允许在整个企业中爬行和搜索各种或多个源，无论这些源是否符合常规用户角色模型。 该体系结构进一步允许在查询时提交安全属性，例如为了提供对企业资源的实时安全访问。 用户查询也可以被转换以提供动态查询，其提供比静态查询可获得的更多当前结果列表。