公开(公告)号：US20040124919A1

公开(公告)日：2004-07-01

申请号：US10658837

申请日：2003-09-10

Applicant: Broadcom Corporation

Inventor： Adel Fanous ,  Leonard Dauphinee ,  Lawrence M. Burns ,  Donald McMullin

IPC: H03F003/68

CPC classification number: H03F3/45183 ,  H03F3/45201 ,  H03F3/45475 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2203/45302 ,  H03F2203/45311 ,  H03F2203/45464 ,  H03F2203/45466 ,  H03F2203/45638 ,  H03F2203/45696 ,  H03G1/0029 ,  H03G3/3036 ,  H03G3/3052

Abstract: Provided is a system for implementing gain control in an amplification module comprising a first stage amplifier having a number of first stage input and output ports. The first stage amplifier is configured to provide first stage amplification to a received input signal and produce from the amplified input signal a number of output signals. Also included are a number of second stage amplifiers, each having second stage input and output ports, the second stage input ports being respectively coupled to the first stage output ports and being configured to receive the number of output signals. A gain control device is coupled to at least one from the group including the first stage input ports, the first stage output ports, and the second stage output ports. The gain control device is also configured to control a gain of at least one of the first stage amplifier and one or more of the number of second stage amplifiers.

Abstract translation: 提供了一种用于在放大模块中实现增益控制的系统，其包括具有多个第一级输入和输出端口的第一级放大器。 第一级放大器被配置为向接收的输入信号提供第一级放大，并且从放大的输入信号产生多个输出信号。 还包括多个第二级放大器，每个具有第二级输入和输出端口，第二级输入端口分别耦合到第一级输出端口并且被配置为接收多个输出信号。 增益控制装置耦合到包括第一级输入端口，第一级输出端口和第二级输出端口的组中的至少一个。 增益控制装置还被配置为控制第一级放大器和多个第二级放大器中的至少一个的增益。

公开(公告)号：US20030197560A1

公开(公告)日：2003-10-23

申请号：US10346918

申请日：2003-01-17

Inventor： Jonathon Cheah ,  Eng Chuan Low

IPC: H03F003/45

CPC classification number: H03G3/001 ,  H03F3/45201 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2203/45386 ,  H03F2203/45506 ,  H03F2203/45728 ,  H03G1/0029 ,  H03G1/0088

Abstract: A dual gain amplification low noise amplifier that includes an amplification circuit to a provide dual gain amplificationnullhigh gain amplification for a weak data signal and low gain amplification for a strong data signal. Also included is a control circuit to maintain approximately the same P1dB point for the weak signal during high gain amplification as for the strong signal during low gain amplification.

Abstract translation: 双增益放大低噪声放大器，包括放大电路，为弱数据信号提供双增益放大 - 高增益放大，强数据信号提供低增益放大。 还包括一个控制电路，用于在高增益放大期间为弱信号保持大致相同的P1dB点，对于低增益放大期间的强信号。

公开(公告)号：US06586996B2

公开(公告)日：2003-07-01

申请号：US10214091

申请日：2002-08-08

Applicant: Adel Fanous ,  Leonard Dauphinee ,  Lawrence M. Burns ,  Donald McMullin

Inventor： Adel Fanous ,  Leonard Dauphinee ,  Lawrence M. Burns ,  Donald McMullin

IPC: H03F345

CPC classification number: H03F3/45183 ,  H03F3/45201 ,  H03F3/45475 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2203/45302 ,  H03F2203/45311 ,  H03F2203/45464 ,  H03F2203/45466 ,  H03F2203/45638 ,  H03F2203/45696 ,  H03G1/0029 ,  H03G3/3036 ,  H03G3/3052

Abstract: Provided is a method and system for producing a drive signal for a current steering amplifier. An exemplary method comprises receiving a supply voltage signal and a differential input signal as a circuit input. A differential amplifier drive signal is produced in response to the received supply voltage signal, the received differential input signal, and the received differential control signal. The received differential input signal is adjusted to a value where magnitudes of negative and positive components of the differential control signal become equal to one another and are within a predetermined amount of a magnitude of the supply voltage signal.

Abstract translation: 提供了一种用于产生用于当前转向放大器的驱动信号的方法和系统。 一种示例性方法包括接收电源电压信号和差分输入信号作为电路输入。 响应于所接收的电源电压信号，接收的差分输入信号和接收的差分控制信号产生差分放大器驱动信号。 接收到的差分输入信号被调整为差分控制信号的负分量和正分量的大小变得彼此相等并且在电源电压信号的大小的预定量内的值。

公开(公告)号：US09735989B1

公开(公告)日：2017-08-15

申请号：US15190575

申请日：2016-06-23

Applicant: Oracle International Corporation

Inventor： Jingqiong Xie ,  Ashok V. Krishnamoorthy ,  Xuezhe Zheng ,  Jeffrey W. Denq ,  Kannan Raj

IPC: H04L25/03 ,  H04L27/01 ,  H04B3/14 ,  H03F3/45 ,  H04L25/08 ,  H04L25/02 ,  H04B1/12

CPC classification number: H04L25/03885 ,  H03F1/3211 ,  H03F3/45188 ,  H03F3/45201 ,  H03F2203/45318 ,  H03F2203/45638 ,  H03F2203/45702 ,  H04B1/123 ,  H04B3/14 ,  H04L25/0272 ,  H04L25/03012 ,  H04L25/03878 ,  H04L25/085 ,  H04L27/01

Abstract: The disclosed embodiments relate to the design of an equalizer that uses both cross-coupled cascodes and inductive peaking to reduce distortion in a signal received from a communication channel by attenuating lower frequencies and amplifying higher frequencies. At lower frequencies, when the effects of inductive impedance within the equalizer are negligible, the equalizer essentially functions as a traditional cascode amplifier that presents high gain. At higher frequencies, the increases in inductive impedances within the equalizer act to boost a gain of the equalizer.

公开(公告)号：US20160365859A1

公开(公告)日：2016-12-15

申请号：US14862520

申请日：2015-09-23

Applicant: MEDIATEK INC.

Inventor： Fei Song ,  Osama Shana'a ,  Yuen Hui Chee

IPC: H03K19/0185 ,  H04B1/40

CPC classification number: H03K19/018514 ,  H03F3/195 ,  H03F3/3001 ,  H03F3/3028 ,  H03F3/3033 ,  H03F3/3037 ,  H03F3/45201 ,  H03F3/45475 ,  H03F3/505 ,  H03F2200/21 ,  H03F2200/42 ,  H03F2200/451 ,  H03F2200/498 ,  H03F2200/69 ,  H03F2200/75 ,  H03F2203/45136 ,  H03F2203/45168 ,  H03F2203/45224 ,  H03F2203/45258 ,  H03F2203/45301 ,  H03F2203/45496 ,  H03F2203/45544 ,  H03F2203/45596 ,  H03F2203/45656 ,  H03F2203/45674 ,  H04B1/40 ,  H04B2001/0425

Abstract: A wideband highly-linear buffer circuit exhibiting a low output impedance comprises a first PFET (PFET1), a second PFET (PFET2), a first NFET (NFET1), and a second NFET (NFET2). Sources of PFET1 and PFET2 are coupled to VDD. PFET1's drain is coupled to an output lead. PFET2 acts as a current source. NFET1's drain is coupled to PFET2's drain and to PFET1's gate. NFET1's source is coupled to the output lead. NFET2's source is coupled to ground. NFET2's drain is coupled to NFET1's source and to the output lead. NFET1's gate is AC coupled to a first input lead. In a single-ended input example, NFET2's gate is AC coupled NFET1's drain. In a differential input example, NFET2's gate is AC coupled to a second input lead. In another differential input example, PFET2 is not just a current source, but rather PFET2's gate is AC coupled to the first input lead.

Abstract translation: 呈现低输出阻抗的宽带高线性缓冲电路包括第一PFET（PFET1），第二PFET（PFET2），第一NFET（NFET1）和第二NFET（NFET2）。 PFET1和PFET2的源极耦合到VDD。 PFET1的漏极耦合到输出引线。 PFET2作为电流源。 NFET1的漏极耦合到PFET2的漏极和PFET1的栅极。 NFET1的源极耦合到输出引线。 NFET2的源极耦合到地。 NFET2的漏极耦合到NFET1的源极和输出引线。 NFET1的栅极与第一个输入引线交流耦合。 在单端输入示例中，NFET2的栅极是交流耦合NFET1的漏极。 在差分输入示例中，NFET2的栅极被AC耦合到第二输入引线。 在另一个差分输入示例中，PFET2不仅仅是电流源，而是PFET2的栅极与第一个输入引线交流耦合。

公开(公告)号：US09385665B2

公开(公告)日：2016-07-05

申请号：US14187480

申请日：2014-02-24

Applicant: Telefonaktiebolaget L M Ericsson (publ)

Inventor： Ossi Toivonen ,  Sami Vilhonen

IPC: H03F1/26 ,  H03F1/32 ,  H03F3/19 ,  H03F3/21 ,  H03F3/45 ,  H03F1/02 ,  H03F1/22 ,  H03F3/193 ,  H03F3/24

CPC classification number: H03F1/3241 ,  H03F1/0266 ,  H03F1/223 ,  H03F1/3211 ,  H03F1/3252 ,  H03F3/19 ,  H03F3/193 ,  H03F3/21 ,  H03F3/211 ,  H03F3/24 ,  H03F3/45071 ,  H03F3/45179 ,  H03F3/45183 ,  H03F3/45201 ,  H03F2200/102 ,  H03F2200/18 ,  H03F2200/24 ,  H03F2200/405 ,  H03F2200/453 ,  H03F2200/465 ,  H03F2200/541 ,  H03F2200/555 ,  H03F2200/78 ,  H03F2203/45168 ,  H03F2203/45224 ,  H03F2203/45292 ,  H03F2203/45394

Abstract: A linearization circuit improves the linearity of a power amplifier based on an envelope of an input RF signal. The linearization circuit comprises an RF signal generation circuit, a replica circuit, and an adaptive amplifier. The RF signal generation circuit generates the RF signal from a phase and an amplitude of an input digital signal. The replica circuit extracts the envelope from the RF signal and generates a sensing voltage based on the extracted envelope. The adaptive amplifier generates an adaptive bias voltage for the power amplifier based on the sensing voltage, and applies the adaptive bias voltage to the power amplifier and to the replica circuit to improve the linearity of the power amplifier by regulating the power amplifier and the replica circuit according to the envelope.

Abstract translation: 线性化电路基于输入RF信号的包络改善功率放大器的线性度。 线性化电路包括RF信号产生电路，复制电路和自适应放大器。 RF信号产生电路根据输入数字信号的相位和幅度产生RF信号。 复制电路从RF信号中提取信封，并根据提取的包络产生感测电压。 自适应放大器基于感测电压产生用于功率放大器的自适应偏压，并且通过调节功率放大器和复制电路将自适应偏置电压施加到功率放大器和复制电路以提高功率放大器的线性度 根据信封。

公开(公告)号：US08674743B1

公开(公告)日：2014-03-18

申请号：US13768706

申请日：2013-02-15

Applicant: Marvell International Ltd.

Inventor： Qiang Tang ,  Bo Wang

IPC: H03L5/00

CPC classification number: H03G1/0029 ,  G11B20/10027 ,  G11B20/10324 ,  H03F3/45201 ,  H03F3/45475 ,  H03F2203/45396 ,  H03F2203/45522 ,  H03F2203/45562 ,  H03F2203/45591

Abstract: In one embodiment, an apparatus includes an amplifier configured to receive an asymmetric signal. A first resistance is coupled between an input node and an output node of the amplifier. A second resistance is coupled to the input node of the amplifier. A first switch is configured to be controlled during a first interval to couple the second resistance to a positive resistance to increase a gain of the amplifier to correct the asymmetric signal. The gain is a function of the first resistance and a combination of the second resistance and the positive resistance. A second switch is configured to be controlled during a second interval to couple the second resistance to a negative resistance to decrease the gain of the amplifier to correct the asymmetric signal. The gain is a function of the first resistance and a combination of the second resistance and the negative resistance.

Abstract translation: 在一个实施例中，一种装置包括被配置为接收不对称信号的放大器。 第一电阻耦合在放大器的输入节点和输出节点之间。 第二电阻耦合到放大器的输入节点。 第一开关被配置为在第一间隔期间被控制以将第二电阻耦合到正电阻以增加放大器的增益以校正不对称信号。 增益是第一电阻和第二电阻和正电阻的组合的函数。 第二开关被配置为在第二间隔期间被控制以将第二电阻耦合到负电阻以减小放大器的增益以校正不对称信号。 增益是第一电阻和第二电阻和负电阻的组合的函数。

公开(公告)号：US08378731B1

公开(公告)日：2013-02-19

申请号：US13159241

申请日：2011-06-13

Applicant: Qiang Tang ,  Bo Wang

Inventor： Qiang Tang ,  Bo Wang

IPC: H03L5/00

CPC classification number: H03G1/0029 ,  G11B20/10027 ,  G11B20/10324 ,  H03F3/45201 ,  H03F3/45475 ,  H03F2203/45396 ,  H03F2203/45522 ,  H03F2203/45562 ,  H03F2203/45591

Abstract: In one embodiment, an apparatus includes an amplifier configured to receive an asymmetric signal. A first resistance is coupled between an input node and an output node of the amplifier. A second resistance is coupled to the input node of the amplifier. A first switch is configured to be controlled during a first interval to couple the second resistance to a positive resistance to increase a gain of the amplifier to correct the asymmetric signal. The gain is a function of the first resistance and a combination of the second resistance and the positive resistance. A second switch is configured to be controlled during a second interval to couple the second resistance to a negative resistance to decrease the gain of the amplifier to correct the asymmetric signal. The gain is a function of the first resistance and a combination of the second resistance and the negative resistance.

Abstract translation: 在一个实施例中，一种装置包括被配置为接收不对称信号的放大器。 第一电阻耦合在放大器的输入节点和输出节点之间。 第二电阻耦合到放大器的输入节点。 第一开关被配置为在第一间隔期间被控制以将第二电阻耦合到正电阻以增加放大器的增益以校正不对称信号。 增益是第一电阻和第二电阻和正电阻的组合的函数。 第二开关被配置为在第二间隔期间被控制以将第二电阻耦合到负电阻以减小放大器的增益以校正不对称信号。 增益是第一电阻和第二电阻和负电阻的组合的函数。

公开(公告)号：US20120293233A1

公开(公告)日：2012-11-22

申请号：US13576635

申请日：2011-02-11

Applicant: Dev V. Gupta ,  Zhiguo Lai

Inventor： Dev V. Gupta ,  Zhiguo Lai

IPC: G06G7/14 ,  H04B3/02 ,  G06G7/18

CPC classification number: H03F3/45183 ,  H03F1/223 ,  H03F3/19 ,  H03F3/45188 ,  H03F3/45197 ,  H03F3/45201 ,  H03F2200/264 ,  H03F2200/36 ,  H03F2203/45318 ,  H03F2203/45374 ,  H03F2203/45644 ,  H03F2203/45686 ,  H03F2203/45702 ,  H03H7/24 ,  H03H7/25 ,  H03H7/482 ,  H03H7/487 ,  H03H11/1256 ,  H03H11/53 ,  H03H2210/017 ,  H03H2210/021 ,  H03H2210/028 ,  H03H2210/036 ,  H03H2210/04

Abstract: Broadband analog radio-frequency devices can be used to create building blocks for scalable analog signal processors that operate over bandwidths of 50 MHz to 20 GHz or more. Example devices include integrators (transconductors), digitally controlled attenuators, buffers, and scalable summers implemented using deep sub-micron CMOS technology. Because the devices are implemented in CMOS, the ratio of trace/component size to signal wavelength is about the same as that of low-frequency devices implemented in printed circuit boards. Combining this scaling with high gain/high bandwidth enables implementation of feedback and programmability for broadband analog signal processing.

Abstract translation: 宽带模拟射频设备可用于为可扩展的模拟信号处理器创建构建块，该处理器的工作频率可达50 MHz至20 GHz或更高。 示例器件包括使用深亚微米CMOS技术实现的积分器（跨导体），数字控制衰减器，缓冲器和可扩展的夏季。 由于器件是用CMOS实现的，所以迹线/器件尺寸与信号波长的比率与印刷电路板中实现的低频器件的比率大致相同。 将此扩展与高增益/高带宽相结合，可实现宽带模拟信号处理的反馈和可编程性。

公开(公告)号：US20120025911A1

公开(公告)日：2012-02-02

申请号：US12894144

申请日：2010-09-30

Applicant: Zhongwu Zhao ,  Xiaodong Jin

Inventor： Zhongwu Zhao ,  Xiaodong Jin

IPC: H03F1/22 ,  H03F3/45 ,  H03F3/04

CPC classification number: H03F3/45201 ,  H03F1/223 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2203/45336 ,  H03F2203/45491 ,  H03F2203/45494 ,  H03F2203/45696 ,  H03F2203/45726 ,  H03G1/0029

Abstract: An LNA circuit for providing a wide range of gain while maintaining the output headroom. In a radio frequency (RF) receiver, the signal received by the receiver may be extremely small. For a transmitter in a short distance, the received signal may be relatively strong. A low power amplifier usually is used to amplify the input signal. The LNA has to be designed to accommodate a wide range of gain. A convention LNA circuit supporting a wide range of gain often suffers from reduced output headroom due to increased current through the load resistor. The present invention discloses the use of current bleeding branch to allow a portion of current to flow through the current bleeding branch and consequently reduces the current that would have flown through the load resistor. Consequently, the voltage across the load resistor may be maintained low to allow adequate output headroom.

Abstract translation: LNA电路，用于提供宽范围的增益，同时保持输出净空。 在射频（RF）接收机中，由接收机接收的信号可能非常小。 对于短距离的发射机，接收的信号可能相对较强。 低功率放大器通常用于放大输入信号。 LNA必须设计成适应广泛的收益。 支持宽范围增益的常规LNA电路通常由于通过负载电阻的电流增加而导致输出净空减少。 本发明公开了使用流出血分支以允许电流的一部分流过电流出血支路，从而减少了将流过负载电阻器的电流。 因此，可以将负载电阻器两端的电压维持在低电平以允许足够的输出净空。