公开(公告)号：US20240332271A1

公开(公告)日：2024-10-03

申请号：US18742606

申请日：2024-06-13

申请人： ROHM CO., LTD.

发明人： Hiroto SAKAI ,  Yuta OKAWAUCHI ,  Tetsuo TATEISHI

IPC分类号： H01L25/16 ,  H01L23/00 ,  H01L23/049 ,  H01L23/31 ,  H01L23/367 ,  H01L23/373 ,  H01L25/07

CPC分类号： H01L25/16 ,  H01L23/049 ,  H01L23/3121 ,  H01L23/367 ,  H01L23/3735 ,  H01L24/48 ,  H01L25/072 ,  H01L2224/48225 ,  H01L2924/10272 ,  H01L2924/1207 ,  H01L2924/13091 ,  H01L2924/30101 ,  H01L2924/30107

摘要： A semiconductor device includes two semiconductor elements with a respective switching operation being controlled depending on a first driving signal input to a third electrode. A first conductor and a second conductor are electrically interposed between the third electrodes of the two semiconductor elements. The first conductor is electrically connected to a signal terminal. The electrical connection between the third electrodes of the two semiconductor elements includes a first conduction path through the first conductor and a second conduction path through the second conductor. An inductance value of the second conduction path is smaller than an inductance value of the first conduction path. A resistance value of the second conduction path is larger than a resistance value of the first conduction path.

公开(公告)号：US12108540B2

公开(公告)日：2024-10-01

申请号：US17611813

申请日：2020-05-14

申请人： AMOSENSE CO.,LTD

发明人： Kyung Whan Woo ,  Ji Hyung Lee

IPC分类号： H05K3/20 ,  H01L23/373 ,  H05K3/46 ,  H01L21/48 ,  H05K3/12 ,  H05K3/38

CPC分类号： H05K3/202 ,  H05K3/205 ,  H05K3/4641 ,  H01L21/4867 ,  H01L23/3735 ,  H05K3/1283 ,  H05K3/381 ,  H05K2203/04 ,  H05K2203/0425 ,  H05K2203/0723

摘要： A ceramic substrate manufacturing method is provided in which a copper sheet is etched and then bonded to a ceramic substrate, so that the ceramic substrate has reduced to overall processing time and improved reliability and product lifespan. The ceramic substrate manufacturing method includes the steps of: etching a copper sheet so as to prepare a metal substrate; etching a ceramic substrate so as to prepare a unit ceramic substrate; assembling the metal substrate and the unit ceramic substrate; bonding the metal substrate and the unit ceramic substrate so as to form a stack; partially printing a metal paste on the surface of the stack; and sintering the metal paste.

公开(公告)号：US12107030B2

公开(公告)日：2024-10-01

申请号：US17581970

申请日：2022-01-23

申请人： FUJI ELECTRIC CO., LTD.

发明人： Sho Takano

IPC分类号： H01L23/373 ,  B60L50/00 ,  H01L21/48 ,  H01L23/13 ,  H01L23/24 ,  H01L23/538 ,  H01L25/07

CPC分类号： H01L23/3735 ,  H01L21/4807 ,  H01L23/13 ,  H01L23/24 ,  H01L23/5385 ,  H01L25/072 ,  B60L50/00

摘要： Provided is a semiconductor device including: a laminated substrate in which a circuit layer, an insulating layer, and a metal layer are sequentially laminated. A slit is formed in the circuit layer. A recess recessed from one surface side facing the insulating layer toward the other surface side is formed in the metal layer. The recess of the metal layer has a relaxation portion at least partially overlapping the slit of the circuit layer in a planar view.

公开(公告)号：US20240321676A1

公开(公告)日：2024-09-26

申请号：US18269940

申请日：2021-12-23

申请人： AMOSENSE CO., LTD.

发明人： Jihyung LEE

IPC分类号： H01L23/373 ,  H01L23/15

CPC分类号： H01L23/3736 ,  H01L23/15

摘要： The present invention relates to a method of manufacturing a power semiconductor module and a power semiconductor module manufactured thereby, the method comprising the steps of: removing thermal stress by annealing a base plate; disposing a brazing filler layer on the upper surface of the base plate; and laminating and brazing a ceramic substrate onto the base plate having the brazing filler layer disposed thereon.

公开(公告)号：US20240321671A1

公开(公告)日：2024-09-26

申请号：US18269768

申请日：2021-11-16

申请人： Molex, LLC

发明人： Tetsunori Tsumuraya

IPC分类号： H01L23/367 ,  H01L23/373

CPC分类号： H01L23/3672 ,  H01L23/3735

摘要： The invention comprises: a thermally conductive plate; and a resin coating integrated with the thermally conductive plate so as to cover at least a portion of the surface of the thermally conductive plate, wherein the resin coating includes a ventilation cylinder through which ventilation holes passing through the thermally conductive plate and the resin coating, and wherein at least a portion of the thermally conductive plate is housed inside a cylindrical wall of the ventilation cylinder.

公开(公告)号：US20240321636A1

公开(公告)日：2024-09-26

申请号：US18186656

申请日：2023-03-20

申请人： Applied Materials, Inc.

发明人： Tyler Sherwood ,  Raghav Sreenivasan

IPC分类号： H01L21/768 ,  H01L23/373 ,  H01L23/532

CPC分类号： H01L21/76883 ,  H01L21/7684 ,  H01L23/3736 ,  H01L23/53233 ,  H01L21/02068 ,  H01L21/67161 ,  H01L21/67207 ,  H01L21/76802 ,  H01L21/76843 ,  H01L23/53238

摘要： The present technology includes semiconductor processing methods and devices with improved expansion of the bulk material in substrate features. Methods include cleaning a substrate that is formed from silicon oxide and that defines one or more features and that includes a liner that extends across the silicon oxide and within one or more features and a copper-containing layer deposited on the liner and extending within the one or more features. Methods include depositing a second metal over the substrate, where the second metal has a coefficient of thermal expansion of greater than or about 17. Methods also include diffusing the second metal into the copper containing layer to form a copper alloy.

公开(公告)号：US20240312895A1

公开(公告)日：2024-09-19

申请号：US18672681

申请日：2024-05-23

申请人： Huawei Digital Power Technologies Co., Ltd.

发明人： Huibin Chen ,  Yutao Wang ,  Haiyan Liu ,  Song Chen ,  Zhonghua Yin ,  Zhen Lv ,  Zhaoyue Wang ,  Qiliang Yang

IPC分类号： H01L23/498 ,  H01L23/00 ,  H01L23/373

CPC分类号： H01L23/49838 ,  H01L23/3735 ,  H01L23/49811 ,  H01L24/26 ,  H01L24/32 ,  H01L24/33 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/33181

摘要： A power module is provided that may include a first metal-clad substrate, a chip located on a side of the first metal-clad substrate, and first solder located between the first metal-clad substrate and the chip. A first metal layer is disposed on a surface that is of the first metal-clad substrate and that faces the chip, and the first metal layer includes a groove and a blocking part. A first thickness of the first metal layer is less than a second thickness. The first thickness is a thickness of at least a part of an area in the blocking part, and the second thickness is a thickness of the first metal layer in an area other than the groove and the blocking part. The blocking part is located between the chip and the adjacent groove, and is configured to prevent the first solder from overflowing into the groove.

公开(公告)号：US20240304530A1

公开(公告)日：2024-09-12

申请号：US18425703

申请日：2024-01-29

申请人： FUJI ELECTRIC CO., LTD.

发明人： Hisato INOKUCHI

IPC分类号： H01L23/495 ,  H01L23/00 ,  H01L23/373 ,  H01L25/065 ,  H02M7/00

CPC分类号： H01L23/49575 ,  H01L23/3735 ,  H01L23/4951 ,  H01L23/4952 ,  H01L24/08 ,  H01L24/48 ,  H01L25/0652 ,  H02M7/003 ,  H01L2224/08111 ,  H01L2224/08145 ,  H01L2224/48138 ,  H01L2224/48147 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/13055 ,  H01L2924/13091

摘要： A power converter apparatus includes a first wire connected to first and second conductive portions on a substrate. The first wire includes first and second bonding portions that are bonded respectively to the first and second conductive portions and each have at opposite ends thereof respectively a bonding end and a joining end; and a wiring portion having opposite ends, to which the joining ends of the first and second bonding portions are connected and being located away from the front surface of the substrate. In a plan view, a first extending direction in which the first bonding portion extends is inclined at a first acute angle, from a first direction of a first line passing through the bonding ends of first and second bonding portions, toward a second direction of a force that acts on the first bonding portion due to thermal expansion of the sealing member.

公开(公告)号：US20240304517A1

公开(公告)日：2024-09-12

申请号：US18180024

申请日：2023-03-07

申请人： Texas Instruments Incorporated

发明人： Li Jiang ,  Jie Chen ,  Yutaka Suzuki ,  Rajen Murugan

IPC分类号： H01L23/373 ,  H01L21/56 ,  H01L21/784 ,  H01L23/00 ,  H01L23/29 ,  H01L23/31 ,  H01L23/498 ,  H01L25/16

CPC分类号： H01L23/3737 ,  H01L21/565 ,  H01L21/784 ,  H01L23/293 ,  H01L23/3135 ,  H01L23/49827 ,  H01L24/08 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/94 ,  H01L25/165 ,  H01L2224/08235 ,  H01L2224/273 ,  H01L2224/29193 ,  H01L2224/32221 ,  H01L2224/94 ,  H01L2924/182

摘要： An electronic device includes: a semiconductor die having opposite first and second sides and a conductive terminal along the first side; a conductive lead electrically coupled to the conductive terminal; a package structure that forms a top side of the electronic device and encloses a portion of the semiconductor die, the package structure including a first molding compound having a first thermal conductivity; and a thermally conductive layer on at least a portion of the second side of the semiconductor die, the thermally conductive layer including a second molding compound having a second thermal conductivity that is greater than the first thermal conductivity.

公开(公告)号：US12087660B2

公开(公告)日：2024-09-10

申请号：US17259406

申请日：2019-07-11

申请人： Heraeus Deutschland Gmbh & Co. KG

发明人： Peter Dietrich

IPC分类号： H01L23/373 ,  H05K1/02 ,  H05K1/03 ,  H05K1/05 ,  H05K1/18

CPC分类号： H01L23/3735 ,  H05K1/0201 ,  H05K1/0306 ,  H05K1/053 ,  H05K1/188

摘要： Described is a metal-insulator substrate, which provides a structuring of the metallization for direct cooling. Furthermore, a process for manufacturing this metal-insulator substrate is described.